linux/sound/pci/emu10k1/p17v.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 *  Copyright (c) by James Courtier-Dutton <[email protected]>
 *  Driver p17v chips
 */

/******************************************************************************/
/* Audigy2Value Tina (P17V) pointer-offset register set,                      */
/* accessed through the PTR2 and DATA2 registers                              */
/******************************************************************************/

/* 00 - 07: Not used */
#define P17V_PLAYBACK_FIFO_PTR  
/* 09 - 12: Not used */
#define P17V_CAPTURE_FIFO_PTR  
/* 14 - 17: Not used */
#define P17V_PB_CHN_SEL
#define P17V_SE_SLOT_SEL_L
#define P17V_SE_SLOT_SEL_H
/* 1b - 1f: Not used */
/* 20 - 2f: Not used */
/* 30 - 3b: Not used */
#define P17V_SPI
#define P17V_I2C_ADDR
#define P17V_I2C_0
#define P17V_I2C_1
/* I2C values */
#define I2C_A_ADC_ADD_MASK
#define I2C_A_ADC_RW_MASK
#define I2C_A_ADC_TRANS_MASK
#define I2C_A_ADC_ABORT_MASK
#define I2C_A_ADC_LAST_MASK
#define I2C_A_ADC_BYTE_MASK

#define I2C_A_ADC_ADD
#define I2C_A_ADC_READ
#define I2C_A_ADC_START
#define I2C_A_ADC_ABORT
#define I2C_A_ADC_LAST
#define I2C_A_ADC_BYTE

#define I2C_D_ADC_REG_MASK 
#define I2C_D_ADC_DAT_MASK

#define ADC_TIMEOUT
#define ADC_IFC_CTRL
#define ADC_MASTER
#define ADC_POWER
#define ADC_ATTEN_ADCL
#define ADC_ATTEN_ADCR
#define ADC_ALC_CTRL1
#define ADC_ALC_CTRL2
#define ADC_ALC_CTRL3
#define ADC_NOISE_CTRL
#define ADC_LIMIT_CTRL
#define ADC_MUX
#if 0
/* FIXME: Not tested yet. */
#define ADC_GAIN_MASK
#define ADC_ZERODB
#define ADC_MUTE_MASK
#define ADC_MUTE
#define ADC_OSR
#define ADC_TIMEOUT_DISABLE
#define ADC_HPF_DISABLE
#define ADC_TRANWIN_MASK
#endif

#define ADC_MUX_MASK
#define ADC_MUX_0
#define ADC_MUX_1
#define ADC_MUX_2
#define ADC_MUX_3

#define P17V_START_AUDIO
/* 41 - 47: Reserved */
#define P17V_START_CAPTURE
#define P17V_CAPTURE_FIFO_BASE
#define P17V_CAPTURE_FIFO_SIZE
#define P17V_CAPTURE_FIFO_INDEX
#define P17V_CAPTURE_VOL_H
#define P17V_CAPTURE_VOL_L
/* 4e - 4f: Not used */
/* 50 - 5f: Not used */
#define P17V_SRCSel
#define P17V_MIXER_AC97_10K1_VOL_L
#define P17V_MIXER_AC97_10K1_VOL_H
#define P17V_MIXER_AC97_P17V_VOL_L
#define P17V_MIXER_AC97_P17V_VOL_H
#define P17V_MIXER_AC97_SRP_REC_VOL_L
#define P17V_MIXER_AC97_SRP_REC_VOL_H
/* 67 - 68: Reserved */
#define P17V_MIXER_Spdif_10K1_VOL_L
#define P17V_MIXER_Spdif_10K1_VOL_H
#define P17V_MIXER_Spdif_P17V_VOL_L
#define P17V_MIXER_Spdif_P17V_VOL_H
#define P17V_MIXER_Spdif_SRP_REC_VOL_L
#define P17V_MIXER_Spdif_SRP_REC_VOL_H
/* 6f - 70: Reserved */
#define P17V_MIXER_I2S_10K1_VOL_L
#define P17V_MIXER_I2S_10K1_VOL_H
#define P17V_MIXER_I2S_P17V_VOL_L
#define P17V_MIXER_I2S_P17V_VOL_H
#define P17V_MIXER_I2S_SRP_REC_VOL_L
#define P17V_MIXER_I2S_SRP_REC_VOL_H
/* 77 - 78: Reserved */
#define P17V_MIXER_AC97_ENABLE
#define P17V_MIXER_SPDIF_ENABLE
#define P17V_MIXER_I2S_ENABLE
#define P17V_AUDIO_OUT_ENABLE
#define P17V_MIXER_ATT
#define P17V_SRP_RECORD_SRR
#define P17V_SOFT_RESET_SRP_MIXER

#define P17V_AC97_OUT_MASTER_VOL_L
#define P17V_AC97_OUT_MASTER_VOL_H
#define P17V_SPDIF_OUT_MASTER_VOL_L
#define P17V_SPDIF_OUT_MASTER_VOL_H
#define P17V_I2S_OUT_MASTER_VOL_L
#define P17V_I2S_OUT_MASTER_VOL_H
/* 86 - 87: Not used */
#define P17V_I2S_CHANNEL_SWAP_PHASE_INVERSE
#define P17V_SPDIF_CHANNEL_SWAP_PHASE_INVERSE
/* 8A: Not used */
#define P17V_SRP_P17V_ESR
#define P17V_SRP_REC_ESR
#define P17V_SRP_BYPASS
/* 8E - 92: Not used */
#define P17V_I2S_SRC_SEL