/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* * Copyright (c) 2021, The Linux Foundation. All rights reserved. * Copyright (c) 2023, Linaro Ltd. */ #ifndef __DT_BINDINGS_CLK_QCOM_CAMCC_SC8280XP_H__ #define __DT_BINDINGS_CLK_QCOM_CAMCC_SC8280XP_H__ /* CAMCC clocks */ #define CAMCC_PLL0 … #define CAMCC_PLL0_OUT_EVEN … #define CAMCC_PLL0_OUT_ODD … #define CAMCC_PLL1 … #define CAMCC_PLL1_OUT_EVEN … #define CAMCC_PLL2 … #define CAMCC_PLL3 … #define CAMCC_PLL3_OUT_EVEN … #define CAMCC_PLL4 … #define CAMCC_PLL4_OUT_EVEN … #define CAMCC_PLL5 … #define CAMCC_PLL5_OUT_EVEN … #define CAMCC_PLL6 … #define CAMCC_PLL6_OUT_EVEN … #define CAMCC_PLL7 … #define CAMCC_PLL7_OUT_EVEN … #define CAMCC_PLL7_OUT_ODD … #define CAMCC_BPS_AHB_CLK … #define CAMCC_BPS_AREG_CLK … #define CAMCC_BPS_AXI_CLK … #define CAMCC_BPS_CLK … #define CAMCC_BPS_CLK_SRC … #define CAMCC_CAMNOC_AXI_CLK … #define CAMCC_CAMNOC_AXI_CLK_SRC … #define CAMCC_CAMNOC_DCD_XO_CLK … #define CAMCC_CCI_0_CLK … #define CAMCC_CCI_0_CLK_SRC … #define CAMCC_CCI_1_CLK … #define CAMCC_CCI_1_CLK_SRC … #define CAMCC_CCI_2_CLK … #define CAMCC_CCI_2_CLK_SRC … #define CAMCC_CCI_3_CLK … #define CAMCC_CCI_3_CLK_SRC … #define CAMCC_CORE_AHB_CLK … #define CAMCC_CPAS_AHB_CLK … #define CAMCC_CPHY_RX_CLK_SRC … #define CAMCC_CSI0PHYTIMER_CLK … #define CAMCC_CSI0PHYTIMER_CLK_SRC … #define CAMCC_CSI1PHYTIMER_CLK … #define CAMCC_CSI1PHYTIMER_CLK_SRC … #define CAMCC_CSI2PHYTIMER_CLK … #define CAMCC_CSI2PHYTIMER_CLK_SRC … #define CAMCC_CSI3PHYTIMER_CLK … #define CAMCC_CSI3PHYTIMER_CLK_SRC … #define CAMCC_CSIPHY0_CLK … #define CAMCC_CSIPHY1_CLK … #define CAMCC_CSIPHY2_CLK … #define CAMCC_CSIPHY3_CLK … #define CAMCC_FAST_AHB_CLK_SRC … #define CAMCC_GDSC_CLK … #define CAMCC_ICP_AHB_CLK … #define CAMCC_ICP_CLK … #define CAMCC_ICP_CLK_SRC … #define CAMCC_IFE_0_AXI_CLK … #define CAMCC_IFE_0_CLK … #define CAMCC_IFE_0_CLK_SRC … #define CAMCC_IFE_0_CPHY_RX_CLK … #define CAMCC_IFE_0_CSID_CLK … #define CAMCC_IFE_0_CSID_CLK_SRC … #define CAMCC_IFE_0_DSP_CLK … #define CAMCC_IFE_1_AXI_CLK … #define CAMCC_IFE_1_CLK … #define CAMCC_IFE_1_CLK_SRC … #define CAMCC_IFE_1_CPHY_RX_CLK … #define CAMCC_IFE_1_CSID_CLK … #define CAMCC_IFE_1_CSID_CLK_SRC … #define CAMCC_IFE_1_DSP_CLK … #define CAMCC_IFE_2_AXI_CLK … #define CAMCC_IFE_2_CLK … #define CAMCC_IFE_2_CLK_SRC … #define CAMCC_IFE_2_CPHY_RX_CLK … #define CAMCC_IFE_2_CSID_CLK … #define CAMCC_IFE_2_CSID_CLK_SRC … #define CAMCC_IFE_2_DSP_CLK … #define CAMCC_IFE_3_AXI_CLK … #define CAMCC_IFE_3_CLK … #define CAMCC_IFE_3_CLK_SRC … #define CAMCC_IFE_3_CPHY_RX_CLK … #define CAMCC_IFE_3_CSID_CLK … #define CAMCC_IFE_3_CSID_CLK_SRC … #define CAMCC_IFE_3_DSP_CLK … #define CAMCC_IFE_LITE_0_CLK … #define CAMCC_IFE_LITE_0_CLK_SRC … #define CAMCC_IFE_LITE_0_CPHY_RX_CLK … #define CAMCC_IFE_LITE_0_CSID_CLK … #define CAMCC_IFE_LITE_0_CSID_CLK_SRC … #define CAMCC_IFE_LITE_1_CLK … #define CAMCC_IFE_LITE_1_CLK_SRC … #define CAMCC_IFE_LITE_1_CPHY_RX_CLK … #define CAMCC_IFE_LITE_1_CSID_CLK … #define CAMCC_IFE_LITE_1_CSID_CLK_SRC … #define CAMCC_IFE_LITE_2_CLK … #define CAMCC_IFE_LITE_2_CLK_SRC … #define CAMCC_IFE_LITE_2_CPHY_RX_CLK … #define CAMCC_IFE_LITE_2_CSID_CLK … #define CAMCC_IFE_LITE_2_CSID_CLK_SRC … #define CAMCC_IFE_LITE_3_CLK … #define CAMCC_IFE_LITE_3_CLK_SRC … #define CAMCC_IFE_LITE_3_CPHY_RX_CLK … #define CAMCC_IFE_LITE_3_CSID_CLK … #define CAMCC_IFE_LITE_3_CSID_CLK_SRC … #define CAMCC_IPE_0_AHB_CLK … #define CAMCC_IPE_0_AREG_CLK … #define CAMCC_IPE_0_AXI_CLK … #define CAMCC_IPE_0_CLK … #define CAMCC_IPE_0_CLK_SRC … #define CAMCC_IPE_1_AHB_CLK … #define CAMCC_IPE_1_AREG_CLK … #define CAMCC_IPE_1_AXI_CLK … #define CAMCC_IPE_1_CLK … #define CAMCC_JPEG_CLK … #define CAMCC_JPEG_CLK_SRC … #define CAMCC_LRME_CLK … #define CAMCC_LRME_CLK_SRC … #define CAMCC_MCLK0_CLK … #define CAMCC_MCLK0_CLK_SRC … #define CAMCC_MCLK1_CLK … #define CAMCC_MCLK1_CLK_SRC … #define CAMCC_MCLK2_CLK … #define CAMCC_MCLK2_CLK_SRC … #define CAMCC_MCLK3_CLK … #define CAMCC_MCLK3_CLK_SRC … #define CAMCC_MCLK4_CLK … #define CAMCC_MCLK4_CLK_SRC … #define CAMCC_MCLK5_CLK … #define CAMCC_MCLK5_CLK_SRC … #define CAMCC_MCLK6_CLK … #define CAMCC_MCLK6_CLK_SRC … #define CAMCC_MCLK7_CLK … #define CAMCC_MCLK7_CLK_SRC … #define CAMCC_SLEEP_CLK … #define CAMCC_SLEEP_CLK_SRC … #define CAMCC_SLOW_AHB_CLK_SRC … #define CAMCC_XO_CLK_SRC … /* CAMCC resets */ #define CAMCC_BPS_BCR … #define CAMCC_CAMNOC_BCR … #define CAMCC_CCI_BCR … #define CAMCC_CPAS_BCR … #define CAMCC_CSI0PHY_BCR … #define CAMCC_CSI1PHY_BCR … #define CAMCC_CSI2PHY_BCR … #define CAMCC_CSI3PHY_BCR … #define CAMCC_ICP_BCR … #define CAMCC_IFE_0_BCR … #define CAMCC_IFE_1_BCR … #define CAMCC_IFE_2_BCR … #define CAMCC_IFE_3_BCR … #define CAMCC_IFE_LITE_0_BCR … #define CAMCC_IFE_LITE_1_BCR … #define CAMCC_IFE_LITE_2_BCR … #define CAMCC_IFE_LITE_3_BCR … #define CAMCC_IPE_0_BCR … #define CAMCC_IPE_1_BCR … #define CAMCC_JPEG_BCR … #define CAMCC_LRME_BCR … /* CAMCC GDSCRs */ #define BPS_GDSC … #define IFE_0_GDSC … #define IFE_1_GDSC … #define IFE_2_GDSC … #define IFE_3_GDSC … #define IPE_0_GDSC … #define IPE_1_GDSC … #define TITAN_TOP_GDSC … #endif /* __DT_BINDINGS_CLK_QCOM_CAMCC_SC8280XP_H__ */
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