linux/drivers/clk/qcom/gpucc-sa8775p.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2021-2022, 2024, Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2023, Linaro Limited
 */

#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>

#include <dt-bindings/clock/qcom,sa8775p-gpucc.h>

#include "clk-alpha-pll.h"
#include "clk-branch.h"
#include "clk-rcg.h"
#include "clk-regmap.h"
#include "clk-regmap-divider.h"
#include "common.h"
#include "reset.h"
#include "gdsc.h"

/* Need to match the order of clocks in DT binding */
enum {};

enum {};

static const struct clk_parent_data parent_data_tcxo =;

static const struct pll_vco lucid_evo_vco[] =;

/* 810MHz configuration */
static struct alpha_pll_config gpu_cc_pll0_config =;

static struct clk_alpha_pll gpu_cc_pll0 =;

/* 1000MHz configuration */
static struct alpha_pll_config gpu_cc_pll1_config =;

static struct clk_alpha_pll gpu_cc_pll1 =;

static const struct parent_map gpu_cc_parent_map_0[] =;

static const struct clk_parent_data gpu_cc_parent_data_0[] =;

static const struct parent_map gpu_cc_parent_map_1[] =;

static const struct clk_parent_data gpu_cc_parent_data_1[] =;

static const struct parent_map gpu_cc_parent_map_2[] =;

static const struct clk_parent_data gpu_cc_parent_data_2[] =;

static const struct parent_map gpu_cc_parent_map_3[] =;

static const struct clk_parent_data gpu_cc_parent_data_3[] =;

static const struct freq_tbl ftbl_gpu_cc_ff_clk_src[] =;

static struct clk_rcg2 gpu_cc_ff_clk_src =;

static const struct freq_tbl ftbl_gpu_cc_gmu_clk_src[] =;

static struct clk_rcg2 gpu_cc_gmu_clk_src =;

static const struct freq_tbl ftbl_gpu_cc_hub_clk_src[] =;

static struct clk_rcg2 gpu_cc_hub_clk_src =;

static const struct freq_tbl ftbl_gpu_cc_xo_clk_src[] =;

static struct clk_rcg2 gpu_cc_xo_clk_src =;

static struct clk_regmap_div gpu_cc_demet_div_clk_src =;

static struct clk_regmap_div gpu_cc_hub_ahb_div_clk_src =;

static struct clk_regmap_div gpu_cc_hub_cx_int_div_clk_src =;

static struct clk_branch gpu_cc_ahb_clk =;

static struct clk_branch gpu_cc_cb_clk =;

static struct clk_branch gpu_cc_crc_ahb_clk =;

static struct clk_branch gpu_cc_cx_ff_clk =;

static struct clk_branch gpu_cc_cx_gmu_clk =;

static struct clk_branch gpu_cc_cx_snoc_dvm_clk =;

static struct clk_branch gpu_cc_cxo_aon_clk =;

static struct clk_branch gpu_cc_cxo_clk =;

static struct clk_branch gpu_cc_demet_clk =;

static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_clk =;

static struct clk_branch gpu_cc_hub_aon_clk =;

static struct clk_branch gpu_cc_hub_cx_int_clk =;

static struct clk_branch gpu_cc_memnoc_gfx_clk =;

static struct clk_branch gpu_cc_sleep_clk =;

static struct clk_regmap *gpu_cc_sa8775p_clocks[] =;

static struct gdsc cx_gdsc =;

static struct gdsc gx_gdsc =;

static struct gdsc *gpu_cc_sa8775p_gdscs[] =;

static const struct qcom_reset_map gpu_cc_sa8775p_resets[] =;

static const struct regmap_config gpu_cc_sa8775p_regmap_config =;

static const struct qcom_cc_desc gpu_cc_sa8775p_desc =;

static const struct of_device_id gpu_cc_sa8775p_match_table[] =;
MODULE_DEVICE_TABLE(of, gpu_cc_sa8775p_match_table);

static int gpu_cc_sa8775p_probe(struct platform_device *pdev)
{}

static struct platform_driver gpu_cc_sa8775p_driver =;

module_platform_driver();

MODULE_DESCRIPTION();
MODULE_LICENSE();