linux/include/dt-bindings/clock/qcom,mmcc-sdm660.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_MSM_MMCC_660_H
#define _DT_BINDINGS_CLK_MSM_MMCC_660_H

#define AHB_CLK_SRC
#define BYTE0_CLK_SRC
#define BYTE1_CLK_SRC
#define CAMSS_GP0_CLK_SRC
#define CAMSS_GP1_CLK_SRC
#define CCI_CLK_SRC
#define CPP_CLK_SRC
#define CSI0_CLK_SRC
#define CSI0PHYTIMER_CLK_SRC
#define CSI1_CLK_SRC
#define CSI1PHYTIMER_CLK_SRC
#define CSI2_CLK_SRC
#define CSI2PHYTIMER_CLK_SRC
#define CSI3_CLK_SRC
#define CSIPHY_CLK_SRC
#define DP_AUX_CLK_SRC
#define DP_CRYPTO_CLK_SRC
#define DP_GTC_CLK_SRC
#define DP_LINK_CLK_SRC
#define DP_PIXEL_CLK_SRC
#define ESC0_CLK_SRC
#define ESC1_CLK_SRC
#define JPEG0_CLK_SRC
#define MCLK0_CLK_SRC
#define MCLK1_CLK_SRC
#define MCLK2_CLK_SRC
#define MCLK3_CLK_SRC
#define MDP_CLK_SRC
#define MMPLL0_PLL
#define MMPLL10_PLL
#define MMPLL1_PLL
#define MMPLL3_PLL
#define MMPLL4_PLL
#define MMPLL5_PLL
#define MMPLL6_PLL
#define MMPLL7_PLL
#define MMPLL8_PLL
#define BIMC_SMMU_AHB_CLK
#define BIMC_SMMU_AXI_CLK
#define CAMSS_AHB_CLK
#define CAMSS_CCI_AHB_CLK
#define CAMSS_CCI_CLK
#define CAMSS_CPHY_CSID0_CLK
#define CAMSS_CPHY_CSID1_CLK
#define CAMSS_CPHY_CSID2_CLK
#define CAMSS_CPHY_CSID3_CLK
#define CAMSS_CPP_AHB_CLK
#define CAMSS_CPP_AXI_CLK
#define CAMSS_CPP_CLK
#define CAMSS_CPP_VBIF_AHB_CLK
#define CAMSS_CSI0_AHB_CLK
#define CAMSS_CSI0_CLK
#define CAMSS_CSI0PHYTIMER_CLK
#define CAMSS_CSI0PIX_CLK
#define CAMSS_CSI0RDI_CLK
#define CAMSS_CSI1_AHB_CLK
#define CAMSS_CSI1_CLK
#define CAMSS_CSI1PHYTIMER_CLK
#define CAMSS_CSI1PIX_CLK
#define CAMSS_CSI1RDI_CLK
#define CAMSS_CSI2_AHB_CLK
#define CAMSS_CSI2_CLK
#define CAMSS_CSI2PHYTIMER_CLK
#define CAMSS_CSI2PIX_CLK
#define CAMSS_CSI2RDI_CLK
#define CAMSS_CSI3_AHB_CLK
#define CAMSS_CSI3_CLK
#define CAMSS_CSI3PIX_CLK
#define CAMSS_CSI3RDI_CLK
#define CAMSS_CSI_VFE0_CLK
#define CAMSS_CSI_VFE1_CLK
#define CAMSS_CSIPHY0_CLK
#define CAMSS_CSIPHY1_CLK
#define CAMSS_CSIPHY2_CLK
#define CAMSS_GP0_CLK
#define CAMSS_GP1_CLK
#define CAMSS_ISPIF_AHB_CLK
#define CAMSS_JPEG0_CLK
#define CAMSS_JPEG_AHB_CLK
#define CAMSS_JPEG_AXI_CLK
#define CAMSS_MCLK0_CLK
#define CAMSS_MCLK1_CLK
#define CAMSS_MCLK2_CLK
#define CAMSS_MCLK3_CLK
#define CAMSS_MICRO_AHB_CLK
#define CAMSS_TOP_AHB_CLK
#define CAMSS_VFE0_AHB_CLK
#define CAMSS_VFE0_CLK
#define CAMSS_VFE0_STREAM_CLK
#define CAMSS_VFE1_AHB_CLK
#define CAMSS_VFE1_CLK
#define CAMSS_VFE1_STREAM_CLK
#define CAMSS_VFE_VBIF_AHB_CLK
#define CAMSS_VFE_VBIF_AXI_CLK
#define CSIPHY_AHB2CRIF_CLK
#define CXO_CLK
#define MDSS_AHB_CLK
#define MDSS_AXI_CLK
#define MDSS_BYTE0_CLK
#define MDSS_BYTE0_INTF_CLK
#define MDSS_BYTE0_INTF_DIV_CLK
#define MDSS_BYTE1_CLK
#define MDSS_BYTE1_INTF_CLK
#define MDSS_DP_AUX_CLK
#define MDSS_DP_CRYPTO_CLK
#define MDSS_DP_GTC_CLK
#define MDSS_DP_LINK_CLK
#define MDSS_DP_LINK_INTF_CLK
#define MDSS_DP_PIXEL_CLK
#define MDSS_ESC0_CLK
#define MDSS_ESC1_CLK
#define MDSS_HDMI_DP_AHB_CLK
#define MDSS_MDP_CLK
#define MDSS_PCLK0_CLK
#define MDSS_PCLK1_CLK
#define MDSS_ROT_CLK
#define MDSS_VSYNC_CLK
#define MISC_AHB_CLK
#define MISC_CXO_CLK
#define MNOC_AHB_CLK
#define SNOC_DVM_AXI_CLK
#define THROTTLE_CAMSS_AHB_CLK
#define THROTTLE_CAMSS_AXI_CLK
#define THROTTLE_MDSS_AHB_CLK
#define THROTTLE_MDSS_AXI_CLK
#define THROTTLE_VIDEO_AHB_CLK
#define THROTTLE_VIDEO_AXI_CLK
#define VIDEO_AHB_CLK
#define VIDEO_AXI_CLK
#define VIDEO_CORE_CLK
#define VIDEO_SUBCORE0_CLK
#define PCLK0_CLK_SRC
#define PCLK1_CLK_SRC
#define ROT_CLK_SRC
#define VFE0_CLK_SRC
#define VFE1_CLK_SRC
#define VIDEO_CORE_CLK_SRC
#define VSYNC_CLK_SRC
#define MDSS_BYTE1_INTF_DIV_CLK
#define AXI_CLK_SRC

#define VENUS_GDSC
#define VENUS_CORE0_GDSC
#define MDSS_GDSC
#define CAMSS_TOP_GDSC
#define CAMSS_VFE0_GDSC
#define CAMSS_VFE1_GDSC
#define CAMSS_CPP_GDSC
#define BIMC_SMMU_GDSC

#define CAMSS_MICRO_BCR

#endif