/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __SOUND_VT1724_H #define __SOUND_VT1724_H /* * ALSA driver for ICEnsemble VT1724 (Envy24) * * Copyright (c) 2000 Jaroslav Kysela <[email protected]> */ #include <sound/control.h> #include <sound/ac97_codec.h> #include <sound/rawmidi.h> #include <sound/i2c.h> #include <sound/pcm.h> #include "ice1712.h" enum { … }; /* * Direct registers */ #define ICEREG1724(ice, x) … #define VT1724_REG_CONTROL … #define VT1724_RESET … #define VT1724_REG_IRQMASK … #define VT1724_IRQ_MPU_RX … #define VT1724_IRQ_MPU_TX … #define VT1724_IRQ_MTPCM … #define VT1724_REG_IRQSTAT … /* look to VT1724_IRQ_* */ #define VT1724_REG_SYS_CFG … #define VT1724_CFG_CLOCK … #define VT1724_CFG_CLOCK512 … #define VT1724_CFG_CLOCK384 … #define VT1724_CFG_MPU401 … #define VT1724_CFG_ADC_MASK … #define VT1724_CFG_ADC_NONE … #define VT1724_CFG_DAC_MASK … #define VT1724_REG_AC97_CFG … #define VT1724_CFG_PRO_I2S … #define VT1724_CFG_AC97_PACKED … #define VT1724_REG_I2S_FEATURES … #define VT1724_CFG_I2S_VOLUME … #define VT1724_CFG_I2S_96KHZ … #define VT1724_CFG_I2S_RESMASK … #define VT1724_CFG_I2S_192KHZ … #define VT1724_CFG_I2S_OTHER … #define VT1724_REG_SPDIF_CFG … #define VT1724_CFG_SPDIF_OUT_EN … #define VT1724_CFG_SPDIF_OUT_INT … #define VT1724_CFG_I2S_CHIPID … #define VT1724_CFG_SPDIF_IN … #define VT1724_CFG_SPDIF_OUT … /*there is no consumer AC97 codec with the VT1724*/ //#define VT1724_REG_AC97_INDEX 0x08 /* byte */ //#define VT1724_REG_AC97_CMD 0x09 /* byte */ #define VT1724_REG_MPU_TXFIFO … #define VT1724_REG_MPU_RXFIFO … #define VT1724_REG_MPU_DATA … #define VT1724_REG_MPU_CTRL … #define VT1724_MPU_UART … #define VT1724_MPU_TX_EMPTY … #define VT1724_MPU_TX_FULL … #define VT1724_MPU_RX_EMPTY … #define VT1724_MPU_RX_FULL … #define VT1724_REG_MPU_FIFO_WM … #define VT1724_MPU_RX_FIFO … #define VT1724_MPU_FIFO_MASK … #define VT1724_REG_I2C_DEV_ADDR … #define VT1724_I2C_WRITE … #define VT1724_REG_I2C_BYTE_ADDR … #define VT1724_REG_I2C_DATA … #define VT1724_REG_I2C_CTRL … #define VT1724_I2C_EEPROM … #define VT1724_I2C_BUSY … #define VT1724_REG_GPIO_DATA … #define VT1724_REG_GPIO_WRITE_MASK … #define VT1724_REG_GPIO_DIRECTION … #define VT1724_REG_POWERDOWN … #define VT1724_REG_GPIO_DATA_22 … #define VT1724_REG_GPIO_WRITE_MASK_22 … /* * Professional multi-track direct control registers */ #define ICEMT1724(ice, x) … #define VT1724_MT_IRQ … #define VT1724_MULTI_PDMA4 … #define VT1724_MULTI_PDMA3 … #define VT1724_MULTI_PDMA2 … #define VT1724_MULTI_PDMA1 … #define VT1724_MULTI_FIFO_ERR … #define VT1724_MULTI_RDMA1 … #define VT1724_MULTI_RDMA0 … #define VT1724_MULTI_PDMA0 … #define VT1724_MT_RATE … #define VT1724_SPDIF_MASTER … #define VT1724_MT_I2S_FORMAT … #define VT1724_MT_I2S_MCLK_128X … #define VT1724_MT_I2S_FORMAT_MASK … #define VT1724_MT_I2S_FORMAT_I2S … #define VT1724_MT_DMA_INT_MASK … /* lool to VT1724_MULTI_* */ #define VT1724_MT_AC97_INDEX … #define VT1724_MT_AC97_CMD … #define VT1724_AC97_COLD … #define VT1724_AC97_WARM … #define VT1724_AC97_WRITE … #define VT1724_AC97_READ … #define VT1724_AC97_READY … #define VT1724_AC97_ID_MASK … #define VT1724_MT_AC97_DATA … #define VT1724_MT_PLAYBACK_ADDR … #define VT1724_MT_PLAYBACK_SIZE … #define VT1724_MT_DMA_CONTROL … #define VT1724_PDMA4_START … #define VT1724_PDMA3_START … #define VT1724_PDMA2_START … #define VT1724_PDMA1_START … #define VT1724_RDMA1_START … #define VT1724_RDMA0_START … #define VT1724_PDMA0_START … #define VT1724_MT_BURST … #define VT1724_MT_DMA_FIFO_ERR … #define VT1724_PDMA4_UNDERRUN … #define VT1724_PDMA2_UNDERRUN … #define VT1724_PDMA3_UNDERRUN … #define VT1724_PDMA1_UNDERRUN … #define VT1724_RDMA1_UNDERRUN … #define VT1724_RDMA0_UNDERRUN … #define VT1724_PDMA0_UNDERRUN … #define VT1724_MT_DMA_PAUSE … #define VT1724_PDMA4_PAUSE … #define VT1724_PDMA3_PAUSE … #define VT1724_PDMA2_PAUSE … #define VT1724_PDMA1_PAUSE … #define VT1724_RDMA1_PAUSE … #define VT1724_RDMA0_PAUSE … #define VT1724_PDMA0_PAUSE … #define VT1724_MT_PLAYBACK_COUNT … #define VT1724_MT_CAPTURE_ADDR … #define VT1724_MT_CAPTURE_SIZE … #define VT1724_MT_CAPTURE_COUNT … #define VT1724_MT_ROUTE_PLAYBACK … #define VT1724_MT_RDMA1_ADDR … #define VT1724_MT_RDMA1_SIZE … #define VT1724_MT_RDMA1_COUNT … #define VT1724_MT_SPDIF_CTRL … #define VT1724_MT_MONITOR_PEAKINDEX … #define VT1724_MT_MONITOR_PEAKDATA … /* concurrent stereo channels */ #define VT1724_MT_PDMA4_ADDR … #define VT1724_MT_PDMA4_SIZE … #define VT1724_MT_PDMA4_COUNT … #define VT1724_MT_PDMA3_ADDR … #define VT1724_MT_PDMA3_SIZE … #define VT1724_MT_PDMA3_COUNT … #define VT1724_MT_PDMA2_ADDR … #define VT1724_MT_PDMA2_SIZE … #define VT1724_MT_PDMA2_COUNT … #define VT1724_MT_PDMA1_ADDR … #define VT1724_MT_PDMA1_SIZE … #define VT1724_MT_PDMA1_COUNT … unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, unsigned char dev, unsigned char addr); void snd_vt1724_write_i2c(struct snd_ice1712 *ice, unsigned char dev, unsigned char addr, unsigned char data); #endif /* __SOUND_VT1724_H */
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