/* SPDX-License-Identifier: GPL-2.0 */ #define CS4245_CHIP_ID … #define CS4245_POWER_CTRL … #define CS4245_DAC_CTRL_1 … #define CS4245_ADC_CTRL … #define CS4245_MCLK_FREQ … #define CS4245_SIGNAL_SEL … #define CS4245_PGA_B_CTRL … #define CS4245_PGA_A_CTRL … #define CS4245_ANALOG_IN … #define CS4245_DAC_A_CTRL … #define CS4245_DAC_B_CTRL … #define CS4245_DAC_CTRL_2 … #define CS4245_INT_STATUS … #define CS4245_INT_MASK … #define CS4245_INT_MODE_MSB … #define CS4245_INT_MODE_LSB … /* Chip ID */ #define CS4245_CHIP_PART_MASK … #define CS4245_CHIP_REV_MASK … /* Power Control */ #define CS4245_FREEZE … #define CS4245_PDN_MIC … #define CS4245_PDN_ADC … #define CS4245_PDN_DAC … #define CS4245_PDN … /* DAC Control */ #define CS4245_DAC_FM_MASK … #define CS4245_DAC_FM_SINGLE … #define CS4245_DAC_FM_DOUBLE … #define CS4245_DAC_FM_QUAD … #define CS4245_DAC_DIF_MASK … #define CS4245_DAC_DIF_LJUST … #define CS4245_DAC_DIF_I2S … #define CS4245_DAC_DIF_RJUST_16 … #define CS4245_DAC_DIF_RJUST_24 … #define CS4245_RESERVED_1 … #define CS4245_MUTE_DAC … #define CS4245_DEEMPH … #define CS4245_DAC_MASTER … /* ADC Control */ #define CS4245_ADC_FM_MASK … #define CS4245_ADC_FM_SINGLE … #define CS4245_ADC_FM_DOUBLE … #define CS4245_ADC_FM_QUAD … #define CS4245_ADC_DIF_MASK … #define CS4245_ADC_DIF_LJUST … #define CS4245_ADC_DIF_I2S … #define CS4245_MUTE_ADC … #define CS4245_HPF_FREEZE … #define CS4245_ADC_MASTER … /* MCLK Frequency */ #define CS4245_MCLK1_MASK … #define CS4245_MCLK1_SHIFT … #define CS4245_MCLK2_MASK … #define CS4245_MCLK2_SHIFT … #define CS4245_MCLK_1 … #define CS4245_MCLK_1_5 … #define CS4245_MCLK_2 … #define CS4245_MCLK_3 … #define CS4245_MCLK_4 … /* Signal Selection */ #define CS4245_A_OUT_SEL_MASK … #define CS4245_A_OUT_SEL_HIZ … #define CS4245_A_OUT_SEL_DAC … #define CS4245_A_OUT_SEL_PGA … #define CS4245_LOOP … #define CS4245_ASYNCH … /* Channel B/A PGA Control */ #define CS4245_PGA_GAIN_MASK … /* ADC Input Control */ #define CS4245_PGA_SOFT … #define CS4245_PGA_ZERO … #define CS4245_SEL_MASK … #define CS4245_SEL_MIC … #define CS4245_SEL_INPUT_1 … #define CS4245_SEL_INPUT_2 … #define CS4245_SEL_INPUT_3 … #define CS4245_SEL_INPUT_4 … #define CS4245_SEL_INPUT_5 … #define CS4245_SEL_INPUT_6 … /* DAC Channel A/B Volume Control */ #define CS4245_VOL_MASK … /* DAC Control 2 */ #define CS4245_DAC_SOFT … #define CS4245_DAC_ZERO … #define CS4245_INVERT_DAC … #define CS4245_INT_ACTIVE_HIGH … /* Interrupt Status/Mask/Mode */ #define CS4245_ADC_CLK_ERR … #define CS4245_DAC_CLK_ERR … #define CS4245_ADC_OVFL … #define CS4245_ADC_UNDRFL … #define CS4245_SPI_ADDRESS_S … #define CS4245_SPI_WRITE_S … #define CS4245_SPI_ADDRESS … #define CS4245_SPI_WRITE … #define CS4245_SPI_READ …
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