linux/sound/pci/pcxhr/pcxhr_core.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * Driver for Digigram pcxhr compatible soundcards
 *
 * low level interface with interrupt and message handling
 *
 * Copyright (c) 2004 by Digigram <[email protected]>
 */

#ifndef __SOUND_PCXHR_CORE_H
#define __SOUND_PCXHR_CORE_H

struct firmware;
struct pcxhr_mgr;

/* init and firmware download commands */
void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr);
void pcxhr_reset_dsp(struct pcxhr_mgr *mgr);
void pcxhr_enable_dsp(struct pcxhr_mgr *mgr);
int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, const struct firmware *xilinx, int second);
int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, const struct firmware *eeprom);
int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot);
int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp);

/* DSP time available on MailBox4 register : 24 bit time samples() */
#define PCXHR_DSP_TIME_MASK
#define PCXHR_DSP_TIME_INVALID


#define PCXHR_SIZE_MAX_CMD
#define PCXHR_SIZE_MAX_STATUS
#define PCXHR_SIZE_MAX_LONG_STATUS

struct pcxhr_rmh {};

enum {};

#define MASK_DSP_WORD
#define MASK_ALL_STREAM
#define MASK_DSP_WORD_LEVEL
#define MASK_FIRST_FIELD
#define FIELD_SIZE

/*
 init the rmh struct; by default cmd_len is set to 1
 */
void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd);

void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh* rmh, int capture, unsigned int param1,
			       unsigned int param2, unsigned int param3);

#define DSP_EXT_CMD_SET(x)

/*
 send the rmh
 */
int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh);


/* values used for CMD_ACCESS_IO_WRITE and CMD_ACCESS_IO_READ */
#define IO_NUM_REG_CONT
#define IO_NUM_REG_GENCLK
#define IO_NUM_REG_MUTE_OUT
#define IO_NUM_SPEED_RATIO
#define IO_NUM_REG_STATUS
#define IO_NUM_REG_CUER
#define IO_NUM_UER_CHIP_REG
#define IO_NUM_REG_CONFIG_SRC
#define IO_NUM_REG_OUT_ANA_LEVEL
#define IO_NUM_REG_IN_ANA_LEVEL

#define REG_CONT_VALSMPTE
#define REG_CONT_UNMUTE_INPUTS

/* parameters used with register IO_NUM_REG_STATUS */
#define REG_STATUS_OPTIONS
#define REG_STATUS_AES_SYNC
#define REG_STATUS_AES_1
#define REG_STATUS_AES_2
#define REG_STATUS_AES_3
#define REG_STATUS_AES_4
#define REG_STATUS_WORD_CLOCK
#define REG_STATUS_INTER_SYNC
#define REG_STATUS_CURRENT
/* results */
#define REG_STATUS_OPT_NO_VIDEO_SIGNAL
#define REG_STATUS_OPT_DAUGHTER_MASK
#define REG_STATUS_OPT_ANALOG_BOARD
#define REG_STATUS_OPT_NO_DAUGHTER
#define REG_STATUS_OPT_COMPANION_MASK
#define REG_STATUS_OPT_NO_COMPANION
#define REG_STATUS_SYNC_32000
#define REG_STATUS_SYNC_44100
#define REG_STATUS_SYNC_48000
#define REG_STATUS_SYNC_64000
#define REG_STATUS_SYNC_88200
#define REG_STATUS_SYNC_96000
#define REG_STATUS_SYNC_128000
#define REG_STATUS_SYNC_176400
#define REG_STATUS_SYNC_192000

int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, int capture_mask, int start);

int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask,
				unsigned int value, int *changed);

/* codec parameters */
#define CS8416_RUN
#define CS8416_FORMAT_DETECT
#define CS8416_CSB0
#define CS8416_CSB1
#define CS8416_CSB2
#define CS8416_CSB3
#define CS8416_CSB4
#define CS8416_VERSION

#define CS8420_DATA_FLOW_CTL
#define CS8420_CLOCK_SRC_CTL
#define CS8420_RECEIVER_ERRORS
#define CS8420_SRC_RATIO
#define CS8420_CSB0
#define CS8420_CSB1
#define CS8420_CSB2
#define CS8420_CSB3
#define CS8420_CSB4
#define CS8420_VERSION

#define CS4271_MODE_CTL_1
#define CS4271_DAC_CTL
#define CS4271_VOLMIX
#define CS4271_VOLMUTE_LEFT
#define CS4271_VOLMUTE_RIGHT
#define CS4271_ADC_CTL
#define CS4271_MODE_CTL_2

#define CHIP_SIG_AND_MAP_SPI

/* codec selection */
#define CS4271_01_CS
#define CS4271_23_CS
#define CS4271_45_CS
#define CS4271_67_CS
#define CS4271_89_CS
#define CS4271_AB_CS
#define CS8420_01_CS
#define CS8420_23_CS
#define CS8420_45_CS
#define CS8420_67_CS
#define CS8416_01_CS


/* interrupt handling */
irqreturn_t pcxhr_interrupt(int irq, void *dev_id);
irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id);

#endif /* __SOUND_PCXHR_CORE_H */