// SPDX-License-Identifier: GPL-2.0-or-later /* * Driver for C-Media CMI8338 and 8738 PCI soundcards. * Copyright (c) 2000 by Takashi Iwai <[email protected]> */ /* Does not work. Warning may block system in capture mode */ /* #define USE_VAR48KRATE */ #include <linux/io.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/slab.h> #include <linux/gameport.h> #include <linux/module.h> #include <linux/mutex.h> #include <sound/core.h> #include <sound/info.h> #include <sound/control.h> #include <sound/pcm.h> #include <sound/rawmidi.h> #include <sound/mpu401.h> #include <sound/opl3.h> #include <sound/sb.h> #include <sound/asoundef.h> #include <sound/initval.h> MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; #if IS_REACHABLE(CONFIG_GAMEPORT) #define SUPPORT_JOYSTICK … #endif static int index[SNDRV_CARDS] = …; /* Index 0-MAX */ static char *id[SNDRV_CARDS] = …; /* ID for this card */ static bool enable[SNDRV_CARDS] = …; /* Enable switches */ static long mpu_port[SNDRV_CARDS] = …; static long fm_port[SNDRV_CARDS] = …; static bool soft_ac3[SNDRV_CARDS] = …; #ifdef SUPPORT_JOYSTICK static int joystick_port[SNDRV_CARDS]; #endif module_param_array(…); MODULE_PARM_DESC(…) …; module_param_array(…); MODULE_PARM_DESC(…) …; module_param_array(…); MODULE_PARM_DESC(…) …; module_param_hw_array(mpu_port, long, ioport, NULL, 0444); MODULE_PARM_DESC(…) …; module_param_hw_array(fm_port, long, ioport, NULL, 0444); MODULE_PARM_DESC(…) …; module_param_array(…); MODULE_PARM_DESC(…) …; #ifdef SUPPORT_JOYSTICK module_param_hw_array(joystick_port, int, ioport, NULL, 0444); MODULE_PARM_DESC(…) …; #endif /* * CM8x38 registers definition */ #define CM_REG_FUNCTRL0 … #define CM_RST_CH1 … #define CM_RST_CH0 … #define CM_CHEN1 … #define CM_CHEN0 … #define CM_PAUSE1 … #define CM_PAUSE0 … #define CM_CHADC1 … #define CM_CHADC0 … #define CM_REG_FUNCTRL1 … #define CM_DSFC_MASK … #define CM_DSFC_SHIFT … #define CM_ASFC_MASK … #define CM_ASFC_SHIFT … #define CM_SPDF_1 … #define CM_SPDF_0 … #define CM_SPDFLOOP … #define CM_SPDO2DAC … #define CM_INTRM … #define CM_BREQ … #define CM_VOICE_EN … #define CM_UART_EN … #define CM_JYSTK_EN … #define CM_ZVPORT … #define CM_REG_CHFORMAT … #define CM_CHB3D5C … #define CM_FMOFFSET2 … #define CM_CHB3D … #define CM_CHIP_MASK1 … #define CM_CHIP_037 … #define CM_SETLAT48 … #define CM_EDGEIRQ … #define CM_SPD24SEL39 … #define CM_AC3EN1 … #define CM_SPDIF_SELECT1 … #define CM_SPD24SEL … /* #define CM_SPDIF_INVERSE 0x00010000 */ /* ??? */ #define CM_ADCBITLEN_MASK … #define CM_ADCBITLEN_16 … #define CM_ADCBITLEN_15 … #define CM_ADCBITLEN_14 … #define CM_ADCBITLEN_13 … #define CM_ADCDACLEN_MASK … #define CM_ADCDACLEN_060 … #define CM_ADCDACLEN_066 … #define CM_ADCDACLEN_130 … #define CM_ADCDACLEN_280 … #define CM_ADCDLEN_MASK … #define CM_ADCDLEN_ORIGINAL … #define CM_ADCDLEN_EXTRA … #define CM_ADCDLEN_24K … #define CM_ADCDLEN_WEIGHT … #define CM_CH1_SRATE_176K … #define CM_CH1_SRATE_96K … #define CM_CH1_SRATE_88K … #define CM_CH0_SRATE_176K … #define CM_CH0_SRATE_96K … #define CM_CH0_SRATE_88K … #define CM_CH0_SRATE_128K … #define CM_CH0_SRATE_MASK … #define CM_SPDIF_INVERSE2 … #define CM_DBLSPDS … #define CM_POLVALID … #define CM_SPDLOCKED … #define CM_CH1FMT_MASK … #define CM_CH1FMT_SHIFT … #define CM_CH0FMT_MASK … #define CM_CH0FMT_SHIFT … #define CM_REG_INT_HLDCLR … #define CM_CHIP_MASK2 … #define CM_CHIP_8768 … #define CM_CHIP_055 … #define CM_CHIP_039 … #define CM_CHIP_039_6CH … #define CM_UNKNOWN_INT_EN … #define CM_TDMA_INT_EN … #define CM_CH1_INT_EN … #define CM_CH0_INT_EN … #define CM_REG_INT_STATUS … #define CM_INTR … #define CM_VCO … #define CM_MCBINT … #define CM_UARTINT … #define CM_LTDMAINT … #define CM_HTDMAINT … #define CM_XDO46 … #define CM_LHBTOG … #define CM_LEG_HDMA … #define CM_LEG_STEREO … #define CM_CH1BUSY … #define CM_CH0BUSY … #define CM_CHINT1 … #define CM_CHINT0 … #define CM_REG_LEGACY_CTRL … #define CM_NXCHG … #define CM_VMPU_MASK … #define CM_VMPU_330 … #define CM_VMPU_320 … #define CM_VMPU_310 … #define CM_VMPU_300 … #define CM_ENWR8237 … #define CM_VSBSEL_MASK … #define CM_VSBSEL_220 … #define CM_VSBSEL_240 … #define CM_VSBSEL_260 … #define CM_VSBSEL_280 … #define CM_FMSEL_MASK … #define CM_FMSEL_388 … #define CM_FMSEL_3C8 … #define CM_FMSEL_3E0 … #define CM_FMSEL_3E8 … #define CM_ENSPDOUT … #define CM_SPDCOPYRHT … #define CM_DAC2SPDO … #define CM_INVIDWEN … #define CM_SETRETRY … #define CM_C_EEACCESS … #define CM_C_EECS … #define CM_C_EEDI46 … #define CM_C_EECK46 … #define CM_CHB3D6C … #define CM_CENTR2LIN … #define CM_BASE2LIN … #define CM_EXBASEN … #define CM_REG_MISC_CTRL … #define CM_PWD … #define CM_RESET … #define CM_SFIL_MASK … #define CM_VMGAIN … #define CM_TXVX … #define CM_N4SPK3D … #define CM_SPDO5V … #define CM_SPDIF48K … #define CM_SPATUS48K … #define CM_ENDBDAC … #define CM_XCHGDAC … #define CM_SPD32SEL … #define CM_SPDFLOOPI … #define CM_FM_EN … #define CM_AC3EN2 … #define CM_ENWRASID … #define CM_VIDWPDSB … #define CM_SPDF_AC97 … #define CM_MASK_EN … #define CM_ENWRMSID … #define CM_VIDWPPRT … #define CM_SFILENB … #define CM_MMODE_MASK … #define CM_SPDIF_SELECT2 … #define CM_ENCENTER … #define CM_FLINKON … #define CM_MUTECH1 … #define CM_FLINKOFF … #define CM_MIDSMP … #define CM_UPDDMA_MASK … #define CM_UPDDMA_2048 … #define CM_UPDDMA_1024 … #define CM_UPDDMA_512 … #define CM_UPDDMA_256 … #define CM_TWAIT_MASK … #define CM_TWAIT1 … #define CM_TWAIT0 … #define CM_REG_TDMA_POSITION … #define CM_TDMA_CNT_MASK … #define CM_TDMA_ADR_MASK … /* byte */ #define CM_REG_MIXER0 … #define CM_REG_SBVR … #define CM_REG_DEV … #define CM_REG_MIXER21 … #define CM_UNKNOWN_21_MASK … #define CM_X_ADPCM … #define CM_PROINV … #define CM_X_SB16 … #define CM_REG_SB16_DATA … #define CM_REG_SB16_ADDR … #define CM_REFFREQ_XIN … #define CM_ADCMULT_XIN … #define CM_TOLERANCE_RATE … #define CM_MAXIMUM_RATE … #define CM_REG_MIXER1 … #define CM_FMMUTE … #define CM_FMMUTE_SHIFT … #define CM_WSMUTE … #define CM_WSMUTE_SHIFT … #define CM_REAR2LIN … #define CM_REAR2LIN_SHIFT … #define CM_REAR2FRONT … #define CM_REAR2FRONT_SHIFT … #define CM_WAVEINL … #define CM_WAVEINL_SHIFT … #define CM_WAVEINR … #define CM_WAVEINR_SHIFT … #define CM_X3DEN … #define CM_X3DEN_SHIFT … #define CM_CDPLAY … #define CM_CDPLAY_SHIFT … #define CM_REG_MIXER2 … #define CM_RAUXREN … #define CM_RAUXREN_SHIFT … #define CM_RAUXLEN … #define CM_RAUXLEN_SHIFT … #define CM_VAUXRM … #define CM_VAUXRM_SHIFT … #define CM_VAUXLM … #define CM_VAUXLM_SHIFT … #define CM_VADMIC_MASK … #define CM_VADMIC_SHIFT … #define CM_MICGAINZ … #define CM_MICGAINZ_SHIFT … #define CM_REG_AUX_VOL … #define CM_VAUXL_MASK … #define CM_VAUXR_MASK … #define CM_REG_MISC … #define CM_UNKNOWN_27_MASK … #define CM_XGPO1 … // #define CM_XGPBIO 0x04 #define CM_MIC_CENTER_LFE … #define CM_SPDIF_INVERSE … #define CM_SPDVALID … #define CM_DMAUTO … #define CM_REG_AC97 … /* * For CMI-8338 (0x28 - 0x2b) .. is this valid for CMI-8738 * or identical with AC97 codec? */ #define CM_REG_EXTERN_CODEC … /* * MPU401 pci port index address 0x40 - 0x4f (CMI-8738 spec ver. 0.6) */ #define CM_REG_MPU_PCI … /* * FM pci port index address 0x50 - 0x5f (CMI-8738 spec ver. 0.6) */ #define CM_REG_FM_PCI … /* * access from SB-mixer port */ #define CM_REG_EXTENT_IND … #define CM_VPHONE_MASK … #define CM_VPHONE_SHIFT … #define CM_VPHOM … #define CM_VSPKM … #define CM_RLOOPREN … #define CM_RLOOPLEN … #define CM_VADMIC3 … /* * CMI-8338 spec ver 0.5 (this is not valid for CMI-8738): * the 8 registers 0xf8 - 0xff are used for programming m/n counter by the PLL * unit (readonly?). */ #define CM_REG_PLL … /* * extended registers */ #define CM_REG_CH0_FRAME1 … #define CM_REG_CH0_FRAME2 … #define CM_REG_CH1_FRAME1 … #define CM_REG_CH1_FRAME2 … #define CM_REG_EXT_MISC … #define CM_ADC48K44K … #define CM_CHB3D8C … #define CM_SPD32FMT … #define CM_ADC2SPDIF … #define CM_SHAREADC … #define CM_REALTCMP … #define CM_INVLRCK … #define CM_UNKNOWN_90_MASK … /* * size of i/o region */ #define CM_EXTENT_CODEC … #define CM_EXTENT_MIDI … #define CM_EXTENT_SYNTH … /* * channels for playback / capture */ #define CM_CH_PLAY … #define CM_CH_CAPT … /* * flags to check device open/close */ #define CM_OPEN_NONE … #define CM_OPEN_CH_MASK … #define CM_OPEN_DAC … #define CM_OPEN_ADC … #define CM_OPEN_SPDIF … #define CM_OPEN_MCHAN … #define CM_OPEN_PLAYBACK … #define CM_OPEN_PLAYBACK2 … #define CM_OPEN_PLAYBACK_MULTI … #define CM_OPEN_CAPTURE … #define CM_OPEN_SPDIF_PLAYBACK … #define CM_OPEN_SPDIF_CAPTURE … #if CM_CH_PLAY == 1 #define CM_PLAYBACK_SRATE_176K … #define CM_PLAYBACK_SPDF … #define CM_CAPTURE_SPDF … #else #define CM_PLAYBACK_SRATE_176K … #define CM_PLAYBACK_SPDF … #define CM_CAPTURE_SPDF … #endif /* * driver data */ struct cmipci_pcm { … }; /* mixer elements toggled/resumed during ac3 playback */ struct cmipci_mixer_auto_switches { … }; static const struct cmipci_mixer_auto_switches cm_saved_mixer[] = …; #define CM_SAVED_MIXERS … struct cmipci { … }; /* read/write operations for dword register */ static inline void snd_cmipci_write(struct cmipci *cm, unsigned int cmd, unsigned int data) { … } static inline unsigned int snd_cmipci_read(struct cmipci *cm, unsigned int cmd) { … } /* read/write operations for word register */ static inline void snd_cmipci_write_w(struct cmipci *cm, unsigned int cmd, unsigned short data) { … } static inline unsigned short snd_cmipci_read_w(struct cmipci *cm, unsigned int cmd) { … } /* read/write operations for byte register */ static inline void snd_cmipci_write_b(struct cmipci *cm, unsigned int cmd, unsigned char data) { … } static inline unsigned char snd_cmipci_read_b(struct cmipci *cm, unsigned int cmd) { … } /* bit operations for dword register */ static int snd_cmipci_set_bit(struct cmipci *cm, unsigned int cmd, unsigned int flag) { … } static int snd_cmipci_clear_bit(struct cmipci *cm, unsigned int cmd, unsigned int flag) { … } /* bit operations for byte register */ static int snd_cmipci_set_bit_b(struct cmipci *cm, unsigned int cmd, unsigned char flag) { … } static int snd_cmipci_clear_bit_b(struct cmipci *cm, unsigned int cmd, unsigned char flag) { … } /* * PCM interface */ /* * calculate frequency */ static const unsigned int rates[] = …; static unsigned int snd_cmipci_rate_freq(unsigned int rate) { … } #ifdef USE_VAR48KRATE /* * Determine PLL values for frequency setup, maybe the CMI8338 (CMI8738???) * does it this way .. maybe not. Never get any information from C-Media about * that <[email protected]>. */ static int snd_cmipci_pll_rmn(unsigned int rate, unsigned int adcmult, int *r, int *m, int *n) { unsigned int delta, tolerance; int xm, xn, xr; for (*r = 0; rate < CM_MAXIMUM_RATE/adcmult; *r += (1<<5)) rate <<= 1; *n = -1; if (*r > 0xff) goto out; tolerance = rate*CM_TOLERANCE_RATE; for (xn = (1+2); xn < (0x1f+2); xn++) { for (xm = (1+2); xm < (0xff+2); xm++) { xr = ((CM_REFFREQ_XIN/adcmult) * xm) / xn; if (xr < rate) delta = rate - xr; else delta = xr - rate; /* * If we found one, remember this, * and try to find a closer one */ if (delta < tolerance) { tolerance = delta; *m = xm - 2; *n = xn - 2; } } } out: return (*n > -1); } /* * Program pll register bits, I assume that the 8 registers 0xf8 up to 0xff * are mapped onto the 8 ADC/DAC sampling frequency which can be chosen * at the register CM_REG_FUNCTRL1 (0x04). * Problem: other ways are also possible (any information about that?) */ static void snd_cmipci_set_pll(struct cmipci *cm, unsigned int rate, unsigned int slot) { unsigned int reg = CM_REG_PLL + slot; /* * Guess that this programs at reg. 0x04 the pos 15:13/12:10 * for DSFC/ASFC (000 up to 111). */ /* FIXME: Init (Do we've to set an other register first before programming?) */ /* FIXME: Is this correct? Or shouldn't the m/n/r values be used for that? */ snd_cmipci_write_b(cm, reg, rate>>8); snd_cmipci_write_b(cm, reg, rate&0xff); /* FIXME: Setup (Do we've to set an other register first to enable this?) */ } #endif /* USE_VAR48KRATE */ static int snd_cmipci_playback2_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *hw_params) { … } static void snd_cmipci_ch_reset(struct cmipci *cm, int ch) { … } /* */ static const unsigned int hw_channels[] = …; static const struct snd_pcm_hw_constraint_list hw_constraints_channels_4 = …; static const struct snd_pcm_hw_constraint_list hw_constraints_channels_6 = …; static const struct snd_pcm_hw_constraint_list hw_constraints_channels_8 = …; static int set_dac_channels(struct cmipci *cm, struct cmipci_pcm *rec, int channels) { … } /* * prepare playback/capture channel * channel to be used must have been set in rec->ch. */ static int snd_cmipci_pcm_prepare(struct cmipci *cm, struct cmipci_pcm *rec, struct snd_pcm_substream *substream) { … } /* * PCM trigger/stop */ static int snd_cmipci_pcm_trigger(struct cmipci *cm, struct cmipci_pcm *rec, int cmd) { … } /* * return the current pointer */ static snd_pcm_uframes_t snd_cmipci_pcm_pointer(struct cmipci *cm, struct cmipci_pcm *rec, struct snd_pcm_substream *substream) { … } /* * playback */ static int snd_cmipci_playback_trigger(struct snd_pcm_substream *substream, int cmd) { … } static snd_pcm_uframes_t snd_cmipci_playback_pointer(struct snd_pcm_substream *substream) { … } /* * capture */ static int snd_cmipci_capture_trigger(struct snd_pcm_substream *substream, int cmd) { … } static snd_pcm_uframes_t snd_cmipci_capture_pointer(struct snd_pcm_substream *substream) { … } /* * hw preparation for spdif */ static int snd_cmipci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_spdif_default_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_spdif_default_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const struct snd_kcontrol_new snd_cmipci_spdif_default = …; static int snd_cmipci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const struct snd_kcontrol_new snd_cmipci_spdif_mask = …; static int snd_cmipci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const struct snd_kcontrol_new snd_cmipci_spdif_stream = …; /* */ /* save mixer setting and mute for AC3 playback */ static int save_mixer_state(struct cmipci *cm) { … } /* restore the previously saved mixer status */ static void restore_mixer_state(struct cmipci *cm) { … } /* spinlock held! */ static void setup_ac3(struct cmipci *cm, struct snd_pcm_substream *subs, int do_ac3, int rate) { … } static int setup_spdif_playback(struct cmipci *cm, struct snd_pcm_substream *subs, int up, int do_ac3) { … } /* * preparation */ /* playback - enable spdif only on the certain condition */ static int snd_cmipci_playback_prepare(struct snd_pcm_substream *substream) { … } /* playback (via device #2) - enable spdif always */ static int snd_cmipci_playback_spdif_prepare(struct snd_pcm_substream *substream) { … } /* * Apparently, the samples last played on channel A stay in some buffer, even * after the channel is reset, and get added to the data for the rear DACs when * playing a multichannel stream on channel B. This is likely to generate * wraparounds and thus distortions. * To avoid this, we play at least one zero sample after the actual stream has * stopped. */ static void snd_cmipci_silence_hack(struct cmipci *cm, struct cmipci_pcm *rec) { … } static int snd_cmipci_playback_hw_free(struct snd_pcm_substream *substream) { … } static int snd_cmipci_playback2_hw_free(struct snd_pcm_substream *substream) { … } /* capture */ static int snd_cmipci_capture_prepare(struct snd_pcm_substream *substream) { … } /* capture with spdif (via device #2) */ static int snd_cmipci_capture_spdif_prepare(struct snd_pcm_substream *substream) { … } static int snd_cmipci_capture_spdif_hw_free(struct snd_pcm_substream *subs) { … } /* * interrupt handler */ static irqreturn_t snd_cmipci_interrupt(int irq, void *dev_id) { … } /* * h/w infos */ /* playback on channel A */ static const struct snd_pcm_hardware snd_cmipci_playback = …; /* capture on channel B */ static const struct snd_pcm_hardware snd_cmipci_capture = …; /* playback on channel B - stereo 16bit only? */ static const struct snd_pcm_hardware snd_cmipci_playback2 = …; /* spdif playback on channel A */ static const struct snd_pcm_hardware snd_cmipci_playback_spdif = …; /* spdif playback on channel A (32bit, IEC958 subframes) */ static const struct snd_pcm_hardware snd_cmipci_playback_iec958_subframe = …; /* spdif capture on channel B */ static const struct snd_pcm_hardware snd_cmipci_capture_spdif = …; static const unsigned int rate_constraints[] = …; static const struct snd_pcm_hw_constraint_list hw_constraints_rates = …; /* * check device open/close */ static int open_device_check(struct cmipci *cm, int mode, struct snd_pcm_substream *subs) { … } static void close_device_check(struct cmipci *cm, int mode) { … } /* */ static int snd_cmipci_playback_open(struct snd_pcm_substream *substream) { … } static int snd_cmipci_capture_open(struct snd_pcm_substream *substream) { … } static int snd_cmipci_playback2_open(struct snd_pcm_substream *substream) { … } static int snd_cmipci_playback_spdif_open(struct snd_pcm_substream *substream) { … } static int snd_cmipci_capture_spdif_open(struct snd_pcm_substream *substream) { … } /* */ static int snd_cmipci_playback_close(struct snd_pcm_substream *substream) { … } static int snd_cmipci_capture_close(struct snd_pcm_substream *substream) { … } static int snd_cmipci_playback2_close(struct snd_pcm_substream *substream) { … } static int snd_cmipci_playback_spdif_close(struct snd_pcm_substream *substream) { … } static int snd_cmipci_capture_spdif_close(struct snd_pcm_substream *substream) { … } /* */ static const struct snd_pcm_ops snd_cmipci_playback_ops = …; static const struct snd_pcm_ops snd_cmipci_capture_ops = …; static const struct snd_pcm_ops snd_cmipci_playback2_ops = …; static const struct snd_pcm_ops snd_cmipci_playback_spdif_ops = …; static const struct snd_pcm_ops snd_cmipci_capture_spdif_ops = …; /* */ static int snd_cmipci_pcm_new(struct cmipci *cm, int device) { … } static int snd_cmipci_pcm2_new(struct cmipci *cm, int device) { … } static int snd_cmipci_pcm_spdif_new(struct cmipci *cm, int device) { … } /* * mixer interface: * - CM8338/8738 has a compatible mixer interface with SB16, but * lack of some elements like tone control, i/o gain and AGC. * - Access to native registers: * - A 3D switch * - Output mute switches */ static void snd_cmipci_mixer_write(struct cmipci *s, unsigned char idx, unsigned char data) { … } static unsigned char snd_cmipci_mixer_read(struct cmipci *s, unsigned char idx) { … } /* * general mixer element */ struct cmipci_sb_reg { … }; #define COMPOSE_SB_REG(lreg,rreg,lshift,rshift,mask,invert,stereo) … #define CMIPCI_DOUBLE(xname, left_reg, right_reg, left_shift, right_shift, mask, invert, stereo) … #define CMIPCI_SB_VOL_STEREO(xname,reg,shift,mask) … #define CMIPCI_SB_VOL_MONO(xname,reg,shift,mask) … #define CMIPCI_SB_SW_STEREO(xname,lshift,rshift) … #define CMIPCI_SB_SW_MONO(xname,shift) … static void cmipci_sb_reg_decode(struct cmipci_sb_reg *r, unsigned long val) { … } static int snd_cmipci_info_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_get_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_put_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } /* * input route (left,right) -> (left,right) */ #define CMIPCI_SB_INPUT_SW(xname, left_shift, right_shift) … static int snd_cmipci_info_input_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_get_input_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_put_input_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } /* * native mixer switches/volumes */ #define CMIPCI_MIXER_SW_STEREO(xname, reg, lshift, rshift, invert) … #define CMIPCI_MIXER_SW_MONO(xname, reg, shift, invert) … #define CMIPCI_MIXER_VOL_STEREO(xname, reg, lshift, rshift, mask) … #define CMIPCI_MIXER_VOL_MONO(xname, reg, shift, mask) … static int snd_cmipci_info_native_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_get_native_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_put_native_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } /* * special case - check mixer sensitivity */ static int snd_cmipci_get_native_mixer_sensitive(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_put_native_mixer_sensitive(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const struct snd_kcontrol_new snd_cmipci_mixers[] = …; /* * other switches */ struct cmipci_switch_args { … }; #define snd_cmipci_uswitch_info … static int _snd_cmipci_uswitch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol, struct cmipci_switch_args *args) { … } static int snd_cmipci_uswitch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int _snd_cmipci_uswitch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol, struct cmipci_switch_args *args) { … } static int snd_cmipci_uswitch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } #define DEFINE_SWITCH_ARG(sname, xreg, xmask, xmask_on, xis_byte, xac3) … #define DEFINE_BIT_SWITCH_ARG(sname, xreg, xmask, xis_byte, xac3) … #if 0 /* these will be controlled in pcm device */ DEFINE_BIT_SWITCH_ARG(spdif_in, CM_REG_FUNCTRL1, CM_SPDF_1, 0, 0); DEFINE_BIT_SWITCH_ARG(spdif_out, CM_REG_FUNCTRL1, CM_SPDF_0, 0, 0); #endif DEFINE_BIT_SWITCH_ARG(spdif_in_sel1, CM_REG_CHFORMAT, CM_SPDIF_SELECT1, 0, 0); DEFINE_BIT_SWITCH_ARG(spdif_in_sel2, CM_REG_MISC_CTRL, CM_SPDIF_SELECT2, 0, 0); DEFINE_BIT_SWITCH_ARG(spdif_enable, CM_REG_LEGACY_CTRL, CM_ENSPDOUT, 0, 0); DEFINE_BIT_SWITCH_ARG(spdo2dac, CM_REG_FUNCTRL1, CM_SPDO2DAC, 0, 1); DEFINE_BIT_SWITCH_ARG(spdi_valid, CM_REG_MISC, CM_SPDVALID, 1, 0); DEFINE_BIT_SWITCH_ARG(spdif_copyright, CM_REG_LEGACY_CTRL, CM_SPDCOPYRHT, 0, 0); DEFINE_BIT_SWITCH_ARG(spdif_dac_out, CM_REG_LEGACY_CTRL, CM_DAC2SPDO, 0, 1); DEFINE_SWITCH_ARG(spdo_5v, CM_REG_MISC_CTRL, CM_SPDO5V, 0, 0, 0); /* inverse: 0 = 5V */ // DEFINE_BIT_SWITCH_ARG(spdo_48k, CM_REG_MISC_CTRL, CM_SPDF_AC97|CM_SPDIF48K, 0, 1); DEFINE_BIT_SWITCH_ARG(spdif_loop, CM_REG_FUNCTRL1, CM_SPDFLOOP, 0, 1); DEFINE_BIT_SWITCH_ARG(spdi_monitor, CM_REG_MIXER1, CM_CDPLAY, 1, 0); /* DEFINE_BIT_SWITCH_ARG(spdi_phase, CM_REG_CHFORMAT, CM_SPDIF_INVERSE, 0, 0); */ DEFINE_BIT_SWITCH_ARG(spdi_phase, CM_REG_MISC, CM_SPDIF_INVERSE, 1, 0); DEFINE_BIT_SWITCH_ARG(spdi_phase2, CM_REG_CHFORMAT, CM_SPDIF_INVERSE2, 0, 0); #if CM_CH_PLAY == 1 DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, 0, 0, 0); /* reversed */ #else DEFINE_SWITCH_ARG(exchange_dac, CM_REG_MISC_CTRL, CM_XCHGDAC, CM_XCHGDAC, 0, 0); #endif DEFINE_BIT_SWITCH_ARG(fourch, CM_REG_MISC_CTRL, CM_N4SPK3D, 0, 0); // DEFINE_BIT_SWITCH_ARG(line_rear, CM_REG_MIXER1, CM_REAR2LIN, 1, 0); // DEFINE_BIT_SWITCH_ARG(line_bass, CM_REG_LEGACY_CTRL, CM_CENTR2LIN|CM_BASE2LIN, 0, 0); // DEFINE_BIT_SWITCH_ARG(joystick, CM_REG_FUNCTRL1, CM_JYSTK_EN, 0, 0); /* now module option */ DEFINE_SWITCH_ARG(modem, CM_REG_MISC_CTRL, CM_FLINKON|CM_FLINKOFF, CM_FLINKON, 0, 0); #define DEFINE_SWITCH(sname, stype, sarg) … #define DEFINE_CARD_SWITCH(sname, sarg) … #define DEFINE_MIXER_SWITCH(sname, sarg) … /* * callbacks for spdif output switch * needs toggle two registers.. */ static int snd_cmipci_spdout_enable_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_spdout_enable_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_line_in_mode_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static inline unsigned int get_line_in_mode(struct cmipci *cm) { … } static int snd_cmipci_line_in_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_line_in_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_mic_in_mode_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { … } static int snd_cmipci_mic_in_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int snd_cmipci_mic_in_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } /* both for CM8338/8738 */ static const struct snd_kcontrol_new snd_cmipci_mixer_switches[] = …; /* for non-multichannel chips */ static const struct snd_kcontrol_new snd_cmipci_nomulti_switch = …; /* only for CM8738 */ static const struct snd_kcontrol_new snd_cmipci_8738_mixer_switches[] = …; /* only for model 033/037 */ static const struct snd_kcontrol_new snd_cmipci_old_mixer_switches[] = …; /* only for model 039 or later */ static const struct snd_kcontrol_new snd_cmipci_extra_mixer_switches[] = …; /* card control switches */ static const struct snd_kcontrol_new snd_cmipci_modem_switch = …; static int snd_cmipci_mixer_new(struct cmipci *cm, int pcm_spdif_device) { … } /* * proc interface */ static void snd_cmipci_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) { … } static void snd_cmipci_proc_init(struct cmipci *cm) { … } static const struct pci_device_id snd_cmipci_ids[] = …; /* * check chip version and capabilities * driver name is modified according to the chip model */ static void query_chip(struct cmipci *cm) { … } #ifdef SUPPORT_JOYSTICK static int snd_cmipci_create_gameport(struct cmipci *cm, int dev) { … } static void snd_cmipci_free_gameport(struct cmipci *cm) { … } #else static inline int snd_cmipci_create_gameport(struct cmipci *cm, int dev) { return -ENOSYS; } static inline void snd_cmipci_free_gameport(struct cmipci *cm) { } #endif static void snd_cmipci_free(struct snd_card *card) { … } static int snd_cmipci_create_fm(struct cmipci *cm, long fm_port) { … } static int snd_cmipci_create(struct snd_card *card, struct pci_dev *pci, int dev) { … } /* */ MODULE_DEVICE_TABLE(pci, snd_cmipci_ids); static int snd_cmipci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { … } /* * power management */ static const unsigned char saved_regs[] = …; static const unsigned char saved_mixers[] = …; static int snd_cmipci_suspend(struct device *dev) { … } static int snd_cmipci_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(snd_cmipci_pm, snd_cmipci_suspend, snd_cmipci_resume); static struct pci_driver cmipci_driver = …; module_pci_driver(…) …;
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