linux/include/dt-bindings/clock/qcom,sm6375-dispcc.h

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
 * Copyright (c) 2022, Linaro Limited
 */

#ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H
#define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H

/* Clocks */
#define DISP_CC_PLL0 …
#define DISP_CC_MDSS_AHB_CLK …
#define DISP_CC_MDSS_AHB_CLK_SRC …
#define DISP_CC_MDSS_BYTE0_CLK …
#define DISP_CC_MDSS_BYTE0_CLK_SRC …
#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC …
#define DISP_CC_MDSS_BYTE0_INTF_CLK …
#define DISP_CC_MDSS_ESC0_CLK …
#define DISP_CC_MDSS_ESC0_CLK_SRC …
#define DISP_CC_MDSS_MDP_CLK …
#define DISP_CC_MDSS_MDP_CLK_SRC …
#define DISP_CC_MDSS_MDP_LUT_CLK …
#define DISP_CC_MDSS_NON_GDSC_AHB_CLK …
#define DISP_CC_MDSS_PCLK0_CLK …
#define DISP_CC_MDSS_PCLK0_CLK_SRC …
#define DISP_CC_MDSS_ROT_CLK …
#define DISP_CC_MDSS_ROT_CLK_SRC …
#define DISP_CC_MDSS_RSCC_AHB_CLK …
#define DISP_CC_MDSS_RSCC_VSYNC_CLK …
#define DISP_CC_MDSS_VSYNC_CLK …
#define DISP_CC_MDSS_VSYNC_CLK_SRC …
#define DISP_CC_SLEEP_CLK …
#define DISP_CC_XO_CLK …

/* Resets */
#define DISP_CC_MDSS_CORE_BCR …
#define DISP_CC_MDSS_RSCC_BCR …

/* GDSCs */
#define MDSS_GDSC …

#endif