/* SPDX-License-Identifier: GPL-2.0 */ /* * cs35l45.h - CS35L45 ALSA SoC audio driver * * Copyright 2019-2022 Cirrus Logic, Inc. * * Author: James Schulman <[email protected]> * */ #ifndef CS35L45_H #define CS35L45_H #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <dt-bindings/sound/cs35l45.h> #include "wm_adsp.h" #define CS35L45_DEVID … #define CS35L45_REVID … #define CS35L45_RELID … #define CS35L45_OTPID … #define CS35L45_SFT_RESET … #define CS35L45_GLOBAL_ENABLES … #define CS35L45_BLOCK_ENABLES … #define CS35L45_BLOCK_ENABLES2 … #define CS35L45_ERROR_RELEASE … #define CS35L45_SYNC_GPIO1 … #define CS35L45_INTB_GPIO2_MCLK_REF … #define CS35L45_GPIO3 … #define CS35L45_PWRMGT_CTL … #define CS35L45_WAKESRC_CTL … #define CS35L45_WKI2C_CTL … #define CS35L45_PWRMGT_STS … #define CS35L45_REFCLK_INPUT … #define CS35L45_GLOBAL_SAMPLE_RATE … #define CS35L45_BOOST_CCM_CFG … #define CS35L45_BOOST_DCM_CFG … #define CS35L45_BOOST_OV_CFG … #define CS35L45_ASP_ENABLES1 … #define CS35L45_ASP_CONTROL1 … #define CS35L45_ASP_CONTROL2 … #define CS35L45_ASP_CONTROL3 … #define CS35L45_ASP_FRAME_CONTROL1 … #define CS35L45_ASP_FRAME_CONTROL2 … #define CS35L45_ASP_FRAME_CONTROL5 … #define CS35L45_ASP_DATA_CONTROL1 … #define CS35L45_ASP_DATA_CONTROL5 … #define CS35L45_DACPCM1_INPUT … #define CS35L45_ASPTX1_INPUT … #define CS35L45_ASPTX2_INPUT … #define CS35L45_ASPTX3_INPUT … #define CS35L45_ASPTX4_INPUT … #define CS35L45_ASPTX5_INPUT … #define CS35L45_DSP1RX1_INPUT … #define CS35L45_DSP1RX2_INPUT … #define CS35L45_DSP1RX3_INPUT … #define CS35L45_DSP1RX4_INPUT … #define CS35L45_DSP1RX5_INPUT … #define CS35L45_DSP1RX6_INPUT … #define CS35L45_DSP1RX7_INPUT … #define CS35L45_DSP1RX8_INPUT … #define CS35L45_HVLV_CONFIG … #define CS35L45_LDPM_CONFIG … #define CS35L45_AMP_PCM_CONTROL … #define CS35L45_AMP_PCM_HPF_TST … #define CS35L45_AMP_GAIN … #define CS35L45_IRQ1_CFG … #define CS35L45_IRQ1_STATUS … #define CS35L45_IRQ1_EINT_1 … #define CS35L45_IRQ1_EINT_2 … #define CS35L45_IRQ1_EINT_3 … #define CS35L45_IRQ1_EINT_4 … #define CS35L45_IRQ1_EINT_5 … #define CS35L45_IRQ1_EINT_7 … #define CS35L45_IRQ1_EINT_8 … #define CS35L45_IRQ1_EINT_18 … #define CS35L45_IRQ1_STS_1 … #define CS35L45_IRQ1_STS_2 … #define CS35L45_IRQ1_STS_3 … #define CS35L45_IRQ1_STS_4 … #define CS35L45_IRQ1_STS_5 … #define CS35L45_IRQ1_STS_7 … #define CS35L45_IRQ1_STS_8 … #define CS35L45_IRQ1_STS_18 … #define CS35L45_IRQ1_MASK_1 … #define CS35L45_IRQ1_MASK_2 … #define CS35L45_IRQ1_MASK_3 … #define CS35L45_IRQ1_MASK_4 … #define CS35L45_IRQ1_MASK_5 … #define CS35L45_IRQ1_MASK_6 … #define CS35L45_IRQ1_MASK_7 … #define CS35L45_IRQ1_MASK_8 … #define CS35L45_IRQ1_MASK_9 … #define CS35L45_IRQ1_MASK_10 … #define CS35L45_IRQ1_MASK_11 … #define CS35L45_IRQ1_MASK_12 … #define CS35L45_IRQ1_MASK_13 … #define CS35L45_IRQ1_MASK_14 … #define CS35L45_IRQ1_MASK_15 … #define CS35L45_IRQ1_MASK_16 … #define CS35L45_IRQ1_MASK_17 … #define CS35L45_IRQ1_MASK_18 … #define CS35L45_GPIO_STATUS1 … #define CS35L45_GPIO1_CTRL1 … #define CS35L45_GPIO2_CTRL1 … #define CS35L45_GPIO3_CTRL1 … #define CS35L45_DSP_MBOX_1 … #define CS35L45_DSP_MBOX_2 … #define CS35L45_DSP_VIRT1_MBOX_1 … #define CS35L45_DSP_VIRT1_MBOX_2 … #define CS35L45_DSP_VIRT1_MBOX_3 … #define CS35L45_DSP_VIRT1_MBOX_4 … #define CS35L45_DSP_VIRT2_MBOX_1 … #define CS35L45_DSP_VIRT2_MBOX_2 … #define CS35L45_DSP_VIRT2_MBOX_3 … #define CS35L45_DSP_VIRT2_MBOX_4 … #define CS35L45_DSP1_XMEM_PACK_0 … #define CS35L45_DSP1_XMEM_PACK_4607 … #define CS35L45_DSP1_XMEM_UNPACK32_0 … #define CS35L45_DSP1_XMEM_UNPACK32_3071 … #define CS35L45_DSP1_SYS_ID … #define CS35L45_DSP1_XMEM_UNPACK24_0 … #define CS35L45_DSP1_XMEM_UNPACK24_6143 … #define CS35L45_DSP1_CLOCK_FREQ … #define CS35L45_DSP1_RX1_RATE … #define CS35L45_DSP1_RX2_RATE … #define CS35L45_DSP1_RX3_RATE … #define CS35L45_DSP1_RX4_RATE … #define CS35L45_DSP1_RX5_RATE … #define CS35L45_DSP1_RX6_RATE … #define CS35L45_DSP1_RX7_RATE … #define CS35L45_DSP1_RX8_RATE … #define CS35L45_DSP1_TX1_RATE … #define CS35L45_DSP1_TX2_RATE … #define CS35L45_DSP1_TX3_RATE … #define CS35L45_DSP1_TX4_RATE … #define CS35L45_DSP1_TX5_RATE … #define CS35L45_DSP1_TX6_RATE … #define CS35L45_DSP1_TX7_RATE … #define CS35L45_DSP1_TX8_RATE … #define CS35L45_DSP1_SCRATCH1 … #define CS35L45_DSP1_SCRATCH2 … #define CS35L45_DSP1_SCRATCH3 … #define CS35L45_DSP1_SCRATCH4 … #define CS35L45_DSP1_CCM_CORE_CONTROL … #define CS35L45_DSP1_YMEM_PACK_0 … #define CS35L45_DSP1_YMEM_PACK_1532 … #define CS35L45_DSP1_YMEM_UNPACK32_0 … #define CS35L45_DSP1_YMEM_UNPACK32_1022 … #define CS35L45_DSP1_YMEM_UNPACK24_0 … #define CS35L45_DSP1_YMEM_UNPACK24_2043 … #define CS35L45_DSP1_PMEM_0 … #define CS35L45_DSP1_PMEM_3834 … #define CS35L45_LASTREG … /* SFT_RESET */ #define CS35L45_SOFT_RESET_TRIGGER … /* GLOBAL_ENABLES */ #define CS35L45_GLOBAL_EN_SHIFT … #define CS35L45_GLOBAL_EN_MASK … /* BLOCK_ENABLES */ #define CS35L45_IMON_EN_SHIFT … #define CS35L45_VMON_EN_SHIFT … #define CS35L45_TEMPMON_EN_SHIFT … #define CS35L45_VDD_BSTMON_EN_SHIFT … #define CS35L45_VDD_BATTMON_EN_SHIFT … #define CS35L45_BST_EN_SHIFT … #define CS35L45_BST_EN_MASK … #define CS35L45_RCV_EN_SHIFT … #define CS35L45_RCV_EN_MASK … #define CS35L45_AMP_EN_SHIFT … #define CS35L45_AMP_EN_MASK … #define CS35L45_BST_DISABLE_FET_OFF … #define CS35L45_BST_DISABLE_FET_ON … #define CS35L45_BST_ENABLE … /* BLOCK_ENABLES2 */ #define CS35L45_ASP_EN_SHIFT … #define CS35L45_AMP_DRE_EN_SHIFT … #define CS35L45_AMP_DRE_EN_MASK … #define CS35L45_MEM_RDY_SHIFT … #define CS35L45_MEM_RDY_MASK … /* ERROR_RELEASE */ #define CS35L45_GLOBAL_ERR_RLS_MASK … /* CCM_CORE */ #define CS35L45_CCM_CORE_RESET_SHIFT … #define CS35L45_CCM_CORE_RESET_MASK … #define CS35L45_CCM_PM_REMAP_SHIFT … #define CS35L45_CCM_PM_REMAP_MASK … #define CS35L45_CCM_CORE_EN_SHIFT … #define CS35L45_CCM_CORE_EN_MASK … /* REFCLK_INPUT */ #define CS35L45_PLL_FORCE_EN_SHIFT … #define CS35L45_PLL_FORCE_EN_MASK … #define CS35L45_PLL_OPEN_LOOP_SHIFT … #define CS35L45_PLL_OPEN_LOOP_MASK … #define CS35L45_PLL_REFCLK_FREQ_SHIFT … #define CS35L45_PLL_REFCLK_FREQ_MASK … #define CS35L45_PLL_REFCLK_EN_SHIFT … #define CS35L45_PLL_REFCLK_EN_MASK … #define CS35L45_PLL_REFCLK_SEL_SHIFT … #define CS35L45_PLL_REFCLK_SEL_MASK … #define CS35L45_PLL_REFCLK_SEL_BCLK … /* GLOBAL_SAMPLE_RATE */ #define CS35L45_GLOBAL_FS_SHIFT … #define CS35L45_GLOBAL_FS_MASK … #define CS35L45_48P0_KHZ … #define CS35L45_96P0_KHZ … #define CS35L45_44P100_KHZ … #define CS35L45_88P200_KHZ … /* ASP_ENABLES_1 */ #define CS35L45_ASP_RX2_EN_SHIFT … #define CS35L45_ASP_RX1_EN_SHIFT … #define CS35L45_ASP_TX5_EN_SHIFT … #define CS35L45_ASP_TX4_EN_SHIFT … #define CS35L45_ASP_TX3_EN_SHIFT … #define CS35L45_ASP_TX2_EN_SHIFT … #define CS35L45_ASP_TX1_EN_SHIFT … /* ASP_CONTROL2 */ #define CS35L45_ASP_WIDTH_RX_SHIFT … #define CS35L45_ASP_WIDTH_RX_MASK … #define CS35L45_ASP_WIDTH_TX_SHIFT … #define CS35L45_ASP_WIDTH_TX_MASK … #define CS35L45_ASP_FMT_SHIFT … #define CS35L45_ASP_FMT_MASK … #define CS35L45_ASP_BCLK_INV_SHIFT … #define CS35L45_ASP_BCLK_INV_MASK … #define CS35L45_ASP_FSYNC_INV_SHIFT … #define CS35L45_ASP_FSYNC_INV_MASK … #define CS35l45_ASP_FMT_DSP_A … #define CS35L45_ASP_FMT_I2S … /* ASP_CONTROL3 */ #define CS35L45_ASP_DOUT_HIZ_CTRL_SHIFT … #define CS35L45_ASP_DOUT_HIZ_CTRL_MASK … /* ASP_FRAME_CONTROL1 */ #define CS35L45_ASP_TX4_SLOT_SHIFT … #define CS35L45_ASP_TX4_SLOT_MASK … #define CS35L45_ASP_TX3_SLOT_SHIFT … #define CS35L45_ASP_TX3_SLOT_MASK … #define CS35L45_ASP_TX2_SLOT_SHIFT … #define CS35L45_ASP_TX2_SLOT_MASK … #define CS35L45_ASP_TX1_SLOT_SHIFT … #define CS35L45_ASP_TX1_SLOT_MASK … #define CS35L45_ASP_TX_ALL_SLOTS … /* ASP_FRAME_CONTROL5 */ #define CS35L45_ASP_RX2_SLOT_SHIFT … #define CS35L45_ASP_RX2_SLOT_MASK … #define CS35L45_ASP_RX1_SLOT_SHIFT … #define CS35L45_ASP_RX1_SLOT_MASK … #define CS35L45_ASP_RX_ALL_SLOTS … /* ASP_DATA_CONTROL1 */ /* ASP_DATA_CONTROL5 */ #define CS35L45_ASP_WL_SHIFT … #define CS35L45_ASP_WL_MASK … /* HVLV_CONFIG */ #define CS35L45_FORCE_LV_OPERATION … #define CS35L45_FORCE_HV_OPERATION … #define CS35L45_HVLV_OPERATION … #define CS35L45_HVLV_MODE_SHIFT … #define CS35L45_HVLV_MODE_MASK … /* AMP_PCM_CONTROL */ #define CS35L45_AMP_VOL_PCM_SHIFT … #define CS35L45_AMP_VOL_PCM_WIDTH … /* AMP_PCM_HPF_TST */ #define CS35l45_HPF_DEFAULT … #define CS35L45_HPF_44P1 … #define CS35L45_HPF_88P2 … /* AMP_GAIN_PCM */ #define CS35L45_AMP_GAIN_PCM_10DBV … #define CS35L45_AMP_GAIN_PCM_13DBV … #define CS35L45_AMP_GAIN_PCM_16DBV … #define CS35L45_AMP_GAIN_PCM_19DBV … #define CS35L45_AMP_GAIN_PCM_SHIFT … #define CS35L45_AMP_GAIN_PCM_MASK … /* IRQ1_EINT_4 */ #define CS35L45_OTP_BOOT_DONE_STS_MASK … #define CS35L45_OTP_BUSY_MASK … /* GPIOX_CTRL1 */ #define CS35L45_GPIO_DIR_SHIFT … #define CS35L45_GPIO_DIR_MASK … #define CS35L45_GPIO_LVL_SHIFT … #define CS35L45_GPIO_LVL_MASK … #define CS35L45_GPIO_OP_CFG_SHIFT … #define CS35L45_GPIO_OP_CFG_MASK … #define CS35L45_GPIO_POL_SHIFT … #define CS35L45_GPIO_POL_MASK … /* SYNC_GPIO1, INTB_GPIO2_MCLK_REF, GPIO3 */ #define CS35L45_GPIO_CTRL_SHIFT … #define CS35L45_GPIO_CTRL_MASK … #define CS35L45_GPIO_INVERT_SHIFT … #define CS35L45_GPIO_INVERT_MASK … /* CS35L45_IRQ1_EINT_1 */ #define CS35L45_BST_UVP_ERR_SHIFT … #define CS35L45_BST_UVP_ERR_MASK … #define CS35L45_BST_SHORT_ERR_SHIFT … #define CS35L45_BST_SHORT_ERR_MASK … #define CS35L45_TEMP_ERR_SHIFT … #define CS35L45_TEMP_ERR_MASK … #define CS35L45_MSM_GLOBAL_EN_ASSERT_SHIFT … #define CS35L45_MSM_GLOBAL_EN_ASSERT_MASK … #define CS35L45_UVLO_VDDBATT_ERR_SHIFT … #define CS35L45_UVLO_VDDBATT_ERR_MASK … #define CS35L45_AMP_SHORT_ERR_SHIFT … #define CS35L45_AMP_SHORT_ERR_MASK … /* CS35L45_IRQ1_EINT_2 */ #define CS35L45_DSP_WDT_EXPIRE_SHIFT … #define CS35L45_DSP_WDT_EXPIRE_MASK … #define CS35L45_DSP_VIRT2_MBOX_SHIFT … #define CS35L45_DSP_VIRT2_MBOX_MASK … /* CS35L45_IRQ1_EINT_3 */ #define CS35L45_PLL_LOCK_FLAG_SHIFT … #define CS35L45_PLL_LOCK_FLAG_MASK … #define CS35L45_PLL_UNLOCK_FLAG_RISE_SHIFT … #define CS35L45_PLL_UNLOCK_FLAG_RISE_MASK … #define CS35L45_AMP_CAL_ERR_SHIFT … #define CS35L45_AMP_CAL_ERR_MASK … /* CS35L45_IRQ1_EINT_18 */ #define CS35L45_GLOBAL_ERROR_SHIFT … #define CS35L45_GLOBAL_ERROR_MASK … #define CS35L45_UVLO_VDDLV_ERR_SHIFT … #define CS35L45_UVLO_VDDLV_ERR_MASK … /* Mixer sources */ #define CS35L45_PCM_SRC_MASK … #define CS35L45_PCM_SRC_ZERO … #define CS35L45_PCM_SRC_ASP_RX1 … #define CS35L45_PCM_SRC_ASP_RX2 … #define CS35L45_PCM_SRC_VMON … #define CS35L45_PCM_SRC_IMON … #define CS35L45_PCM_SRC_ERR_VOL … #define CS35L45_PCM_SRC_CLASSH_TGT … #define CS35L45_PCM_SRC_VDD_BATTMON … #define CS35L45_PCM_SRC_VDD_BSTMON … #define CS35L45_PCM_SRC_DSP_TX1 … #define CS35L45_PCM_SRC_DSP_TX2 … #define CS35L45_PCM_SRC_TEMPMON … #define CS35L45_PCM_SRC_INTERPOLATOR … #define CS35L45_PCM_SRC_IL_TARGET … #define CS35L45_RESET_HOLD_US … #define CS35L45_RESET_US … #define CS35L45_POST_GLOBAL_EN_US … #define CS35L45_PRE_GLOBAL_DIS_US … /* WAKESRC_CTL */ #define CS35L45_WKSRC_SYNC_GPIO1 … #define CS35L45_WKSRC_INT_GPIO2 … #define CS35L45_WKSRC_GPIO3 … #define CS35L45_WKSRC_SPI … #define CS35L45_WKSRC_I2C … #define CS35L45_UPDT_WKCTL_SHIFT … #define CS35L45_UPDT_WKCTL_MASK … #define CS35L45_WKSRC_EN_SHIFT … #define CS35L45_WKSRC_EN_MASK … #define CS35L45_WKSRC_POL_SHIFT … #define CS35L45_WKSRC_POL_MASK … /* WAKEI2C_CTL */ #define CS35L45_UPDT_WKI2C_SHIFT … #define CS35L45_UPDT_WKI2C_MASK … #define CS35L45_WKI2C_ADDR_SHIFT … #define CS35L45_WKI2C_ADDR_MASK … #define CS35L45_SPI_MAX_FREQ … enum cs35l45_cspl_mboxstate { … }; enum cs35l45_cspl_mboxcmd { … }; enum control_bus_type { … }; enum amp_mode { … }; #define CS35L45_FORMATS … #define CS35L45_RATES … /* * IRQs */ #define CS35L45_IRQ(_irq, _name, _hand) … struct cs35l45_irq { … }; #define CS35L45_REG_IRQ(_reg, _irq) … enum cs35l45_irq_list { … }; #define CS35L45_MBOX3_CMD_MASK … #define CS35L45_MBOX3_CMD_SHIFT … #define CS35L45_MBOX3_DATA_MASK … #define CS35L45_MBOX3_DATA_SHIFT … enum mbox3_events { … }; struct cs35l45_private { … }; extern const struct dev_pm_ops cs35l45_pm_ops; extern const struct regmap_config cs35l45_i2c_regmap; extern const struct regmap_config cs35l45_spi_regmap; int cs35l45_apply_patch(struct cs35l45_private *cs35l45); unsigned int cs35l45_get_clk_freq_id(unsigned int freq); int cs35l45_probe(struct cs35l45_private *cs35l45); void cs35l45_remove(struct cs35l45_private *cs35l45); #endif /* CS35L45_H */
Codebase Browser
linux