/* SPDX-License-Identifier: GPL-2.0-only */ /* * cs42l52.h -- CS42L52 ALSA SoC audio driver * * Copyright 2012 CirrusLogic, Inc. * * Author: Georgi Vlaev <[email protected]> * Author: Brian Austin <[email protected]> */ #ifndef __CS42L52_H__ #define __CS42L52_H__ #define CS42L52_NAME … #define CS42L52_DEFAULT_CLK … #define CS42L52_MIN_CLK … #define CS42L52_MAX_CLK … #define CS42L52_DEFAULT_FORMAT … #define CS42L52_DEFAULT_MAX_CHANS … #define CS42L52_SYSCLK … #define CS42L52_CHIP_SWICTH … #define CS42L52_ALL_IN_ONE … #define CS42L52_CHIP_ONE … #define CS42L52_CHIP_TWO … #define CS42L52_CHIP_THR … #define CS42L52_CHIP_MASK … #define CS42L52_FIX_BITS_CTL … #define CS42L52_CHIP … #define CS42L52_CHIP_ID … #define CS42L52_CHIP_ID_MASK … #define CS42L52_CHIP_REV_A0 … #define CS42L52_CHIP_REV_A1 … #define CS42L52_CHIP_REV_B0 … #define CS42L52_CHIP_REV_MASK … #define CS42L52_PWRCTL1 … #define CS42L52_PWRCTL1_PDN_ALL … #define CS42L52_PWRCTL1_PDN_CHRG … #define CS42L52_PWRCTL1_PDN_PGAB … #define CS42L52_PWRCTL1_PDN_PGAA … #define CS42L52_PWRCTL1_PDN_ADCB … #define CS42L52_PWRCTL1_PDN_ADCA … #define CS42L52_PWRCTL1_PDN_CODEC … #define CS42L52_PWRCTL2 … #define CS42L52_PWRCTL2_OVRDB … #define CS42L52_PWRCTL2_OVRDA … #define CS42L52_PWRCTL2_PDN_MICB … #define CS42L52_PWRCTL2_PDN_MICB_SHIFT … #define CS42L52_PWRCTL2_PDN_MICA … #define CS42L52_PWRCTL2_PDN_MICA_SHIFT … #define CS42L52_PWRCTL2_PDN_MICBIAS … #define CS42L52_PWRCTL2_PDN_MICBIAS_SHIFT … #define CS42L52_PWRCTL3 … #define CS42L52_PWRCTL3_HPB_PDN_SHIFT … #define CS42L52_PWRCTL3_HPB_ON_LOW … #define CS42L52_PWRCTL3_HPB_ON_HIGH … #define CS42L52_PWRCTL3_HPB_ALWAYS_ON … #define CS42L52_PWRCTL3_HPB_ALWAYS_OFF … #define CS42L52_PWRCTL3_HPA_PDN_SHIFT … #define CS42L52_PWRCTL3_HPA_ON_LOW … #define CS42L52_PWRCTL3_HPA_ON_HIGH … #define CS42L52_PWRCTL3_HPA_ALWAYS_ON … #define CS42L52_PWRCTL3_HPA_ALWAYS_OFF … #define CS42L52_PWRCTL3_SPKB_PDN_SHIFT … #define CS42L52_PWRCTL3_SPKB_ON_LOW … #define CS42L52_PWRCTL3_SPKB_ON_HIGH … #define CS42L52_PWRCTL3_SPKB_ALWAYS_ON … #define CS42L52_PWRCTL3_PDN_SPKB … #define CS42L52_PWRCTL3_PDN_SPKA … #define CS42L52_PWRCTL3_SPKA_PDN_SHIFT … #define CS42L52_PWRCTL3_SPKA_ON_LOW … #define CS42L52_PWRCTL3_SPKA_ON_HIGH … #define CS42L52_PWRCTL3_SPKA_ALWAYS_ON … #define CS42L52_DEFAULT_OUTPUT_STATE … #define CS42L52_PWRCTL3_CONF_MASK … #define CS42L52_CLK_CTL … #define CLK_AUTODECT_ENABLE … #define CLK_SPEED_SHIFT … #define CLK_DS_MODE … #define CLK_SS_MODE … #define CLK_HS_MODE … #define CLK_QS_MODE … #define CLK_32K_SR_SHIFT … #define CLK_32K … #define CLK_NO_32K … #define CLK_27M_MCLK_SHIFT … #define CLK_27M_MCLK … #define CLK_NO_27M … #define CLK_RATIO_SHIFT … #define CLK_R_128 … #define CLK_R_125 … #define CLK_R_132 … #define CLK_R_136 … #define CS42L52_IFACE_CTL1 … #define CS42L52_IFACE_CTL1_MASTER … #define CS42L52_IFACE_CTL1_SLAVE … #define CS42L52_IFACE_CTL1_INV_SCLK … #define CS42L52_IFACE_CTL1_ADC_FMT_I2S … #define CS42L52_IFACE_CTL1_ADC_FMT_LEFT_J … #define CS42L52_IFACE_CTL1_DSP_MODE_EN … #define CS42L52_IFACE_CTL1_DAC_FMT_LEFT_J … #define CS42L52_IFACE_CTL1_DAC_FMT_I2S … #define CS42L52_IFACE_CTL1_DAC_FMT_RIGHT_J … #define CS42L52_IFACE_CTL1_WL_32BIT … #define CS42L52_IFACE_CTL1_WL_24BIT … #define CS42L52_IFACE_CTL1_WL_20BIT … #define CS42L52_IFACE_CTL1_WL_16BIT … #define CS42L52_IFACE_CTL1_WL_MASK … #define CS42L52_IFACE_CTL2 … #define CS42L52_IFACE_CTL2_SC_MC_EQ … #define CS42L52_IFACE_CTL2_LOOPBACK … #define CS42L52_IFACE_CTL2_S_MODE_OUTPUT_EN … #define CS42L52_IFACE_CTL2_S_MODE_OUTPUT_HIZ … #define CS42L52_IFACE_CTL2_HP_SW_INV … #define CS42L52_IFACE_CTL2_BIAS_LVL … #define CS42L52_ADC_PGA_A … #define CS42L52_ADC_PGA_B … #define CS42L52_ADC_SEL_SHIFT … #define CS42L52_ADC_SEL_AIN1 … #define CS42L52_ADC_SEL_AIN2 … #define CS42L52_ADC_SEL_AIN3 … #define CS42L52_ADC_SEL_AIN4 … #define CS42L52_ADC_SEL_PGA … #define CS42L52_ANALOG_HPF_CTL … #define CS42L52_HPF_CTL_ANLGSFTB … #define CS42L52_HPF_CTL_ANLGSFTA … #define CS42L52_ADC_HPF_FREQ … #define CS42L52_ADC_MISC_CTL … #define CS42L52_ADC_MISC_CTL_SOURCE_DSP … #define CS42L52_PB_CTL1 … #define CS42L52_PB_CTL1_HP_GAIN_SHIFT … #define CS42L52_PB_CTL1_HP_GAIN_03959 … #define CS42L52_PB_CTL1_HP_GAIN_04571 … #define CS42L52_PB_CTL1_HP_GAIN_05111 … #define CS42L52_PB_CTL1_HP_GAIN_06047 … #define CS42L52_PB_CTL1_HP_GAIN_07099 … #define CS42L52_PB_CTL1_HP_GAIN_08399 … #define CS42L52_PB_CTL1_HP_GAIN_10000 … #define CS42L52_PB_CTL1_HP_GAIN_11430 … #define CS42L52_PB_CTL1_INV_PCMB … #define CS42L52_PB_CTL1_INV_PCMA … #define CS42L52_PB_CTL1_MSTB_MUTE … #define CS42L52_PB_CTL1_MSTA_MUTE … #define CS42L52_PB_CTL1_MUTE_MASK … #define CS42L52_PB_CTL1_MUTE … #define CS42L52_PB_CTL1_UNMUTE … #define CS42L52_MISC_CTL … #define CS42L52_MISC_CTL_DEEMPH … #define CS42L52_MISC_CTL_DIGSFT … #define CS42L52_MISC_CTL_DIGZC … #define CS42L52_PB_CTL2 … #define CS42L52_PB_CTL2_HPB_MUTE … #define CS42L52_PB_CTL2_HPA_MUTE … #define CS42L52_PB_CTL2_SPKB_MUTE … #define CS42L52_PB_CTL2_SPKA_MUTE … #define CS42L52_PB_CTL2_SPK_SWAP … #define CS42L52_PB_CTL2_SPK_MONO … #define CS42L52_PB_CTL2_SPK_MUTE50 … #define CS42L52_MICA_CTL … #define CS42L52_MICB_CTL … #define CS42L52_MIC_CTL_MIC_SEL_MASK … #define CS42L52_MIC_CTL_MIC_SEL_SHIFT … #define CS42L52_MIC_CTL_TYPE_MASK … #define CS42L52_MIC_CTL_TYPE_SHIFT … #define CS42L52_PGAA_CTL … #define CS42L52_PGAB_CTL … #define CS42L52_PGAX_CTL_VOL_12DB … #define CS42L52_PGAX_CTL_VOL_6DB … #define CS42L52_PASSTHRUA_VOL … #define CS42L52_PASSTHRUB_VOL … #define CS42L52_ADCA_VOL … #define CS42L52_ADCB_VOL … #define CS42L52_ADCX_VOL_24DB … #define CS42L52_ADCX_VOL_12DB … #define CS42L52_ADCX_VOL_6DB … #define CS42L52_ADCA_MIXER_VOL … #define CS42L52_ADCB_MIXER_VOL … #define CS42L52_ADC_MIXER_VOL_12DB … #define CS42L52_PCMA_MIXER_VOL … #define CS42L52_PCMB_MIXER_VOL … #define CS42L52_BEEP_FREQ … #define CS42L52_BEEP_VOL … #define CS42L52_BEEP_TONE_CTL … #define CS42L52_BEEP_RATE_SHIFT … #define CS42L52_BEEP_RATE_MASK … #define CS42L52_TONE_CTL … #define CS42L52_BEEP_EN_MASK … #define CS42L52_MASTERA_VOL … #define CS42L52_MASTERB_VOL … #define CS42L52_HPA_VOL … #define CS42L52_HPB_VOL … #define CS42L52_DEFAULT_HP_VOL … #define CS42L52_SPKA_VOL … #define CS42L52_SPKB_VOL … #define CS42L52_DEFAULT_SPK_VOL … #define CS42L52_ADC_PCM_MIXER … #define CS42L52_LIMITER_CTL1 … #define CS42L52_LIMITER_CTL2 … #define CS42L52_LIMITER_AT_RATE … #define CS42L52_ALC_CTL … #define CS42L52_ALC_CTL_ALCB_ENABLE_SHIFT … #define CS42L52_ALC_CTL_ALCA_ENABLE_SHIFT … #define CS42L52_ALC_CTL_FASTEST_ATTACK … #define CS42L52_ALC_RATE … #define CS42L52_ALC_SLOWEST_RELEASE … #define CS42L52_ALC_THRESHOLD … #define CS42L52_ALC_MAX_RATE_SHIFT … #define CS42L52_ALC_MIN_RATE_SHIFT … #define CS42L52_ALC_RATE_0DB … #define CS42L52_ALC_RATE_3DB … #define CS42L52_ALC_RATE_6DB … #define CS42L52_NOISE_GATE_CTL … #define CS42L52_NG_ENABLE_SHIFT … #define CS42L52_NG_THRESHOLD_SHIFT … #define CS42L52_NG_MIN_70DB … #define CS42L52_NG_DELAY_SHIFT … #define CS42L52_NG_DELAY_100MS … #define CS42L52_CLK_STATUS … #define CS42L52_BATT_COMPEN … #define CS42L52_BATT_LEVEL … #define CS42L52_SPK_STATUS … #define CS42L52_SPK_STATUS_PIN_SHIFT … #define CS42L52_SPK_STATUS_PIN_HIGH … #define CS42L52_TEM_CTL … #define CS42L52_TEM_CTL_SET … #define CS42L52_THE_FOLDBACK … #define CS42L52_CHARGE_PUMP … #define CS42L52_CHARGE_PUMP_MASK … #define CS42L52_CHARGE_PUMP_SHIFT … #define CS42L52_FIX_BITS1 … #define CS42L52_FIX_BITS2 … #define CS42L52_MAX_REGISTER … #endif
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