linux/sound/soc/codecs/cs42l73.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * ALSA SoC CS42L73 codec driver
 *
 * Copyright 2011 Cirrus Logic, Inc.
 *
 * Author: Georgi Vlaev <[email protected]>
 *	   Brian Austin <[email protected]>
 */

#ifndef __CS42L73_H__
#define __CS42L73_H__

/* I2C Registers */
/* I2C Address: 1001010[R/W] - 10010100 = 0x94(Write); 10010101 = 0x95(Read) */
#define CS42L73_CHIP_ID
#define CS42L73_DEVID_AB
#define CS42L73_DEVID_CD
#define CS42L73_DEVID_E
#define CS42L73_REVID
#define CS42L73_PWRCTL1
#define CS42L73_PWRCTL2
#define CS42L73_PWRCTL3
#define CS42L73_CPFCHC
#define CS42L73_OLMBMSDC
#define CS42L73_DMMCC
#define CS42L73_XSPC
#define CS42L73_XSPMMCC
#define CS42L73_ASPC
#define CS42L73_ASPMMCC
#define CS42L73_VSPC
#define CS42L73_VSPMMCC
#define CS42L73_VXSPFS
#define CS42L73_MIOPC
#define CS42L73_ADCIPC
#define CS42L73_MICAPREPGAAVOL
#define CS42L73_MICBPREPGABVOL
#define CS42L73_IPADVOL
#define CS42L73_IPBDVOL
#define CS42L73_PBDC
#define CS42L73_HLADVOL
#define CS42L73_HLBDVOL
#define CS42L73_SPKDVOL
#define CS42L73_ESLDVOL
#define CS42L73_HPAAVOL
#define CS42L73_HPBAVOL
#define CS42L73_LOAAVOL
#define CS42L73_LOBAVOL
#define CS42L73_STRINV
#define CS42L73_XSPINV
#define CS42L73_ASPINV
#define CS42L73_VSPINV
#define CS42L73_LIMARATEHL
#define CS42L73_LIMRRATEHL
#define CS42L73_LMAXHL
#define CS42L73_LIMARATESPK
#define CS42L73_LIMRRATESPK
#define CS42L73_LMAXSPK
#define CS42L73_LIMARATEESL
#define CS42L73_LIMRRATEESL
#define CS42L73_LMAXESL
#define CS42L73_ALCARATE
#define CS42L73_ALCRRATE
#define CS42L73_ALCMINMAX
#define CS42L73_NGCAB
#define CS42L73_ALCNGMC
#define CS42L73_MIXERCTL
#define CS42L73_HLAIPAA
#define CS42L73_HLBIPBA
#define CS42L73_HLAXSPAA
#define CS42L73_HLBXSPBA
#define CS42L73_HLAASPAA
#define CS42L73_HLBASPBA
#define CS42L73_HLAVSPMA
#define CS42L73_HLBVSPMA
#define CS42L73_XSPAIPAA
#define CS42L73_XSPBIPBA
#define CS42L73_XSPAXSPAA
#define CS42L73_XSPBXSPBA
#define CS42L73_XSPAASPAA
#define CS42L73_XSPAASPBA
#define CS42L73_XSPAVSPMA
#define CS42L73_XSPBVSPMA
#define CS42L73_ASPAIPAA
#define CS42L73_ASPBIPBA
#define CS42L73_ASPAXSPAA
#define CS42L73_ASPBXSPBA
#define CS42L73_ASPAASPAA
#define CS42L73_ASPBASPBA
#define CS42L73_ASPAVSPMA
#define CS42L73_ASPBVSPMA
#define CS42L73_VSPAIPAA
#define CS42L73_VSPBIPBA
#define CS42L73_VSPAXSPAA
#define CS42L73_VSPBXSPBA
#define CS42L73_VSPAASPAA
#define CS42L73_VSPBASPBA
#define CS42L73_VSPAVSPMA
#define CS42L73_VSPBVSPMA
#define CS42L73_MMIXCTL
#define CS42L73_SPKMIPMA
#define CS42L73_SPKMXSPA
#define CS42L73_SPKMASPA
#define CS42L73_SPKMVSPMA
#define CS42L73_ESLMIPMA
#define CS42L73_ESLMXSPA
#define CS42L73_ESLMASPA
#define CS42L73_ESLMVSPMA
#define CS42L73_IM1
#define CS42L73_IM2
#define CS42L73_IS1
#define CS42L73_IS2
#define CS42L73_MAX_REGISTER
/* Bitfield Definitions */

/* CS42L73_PWRCTL1 */
#define CS42L73_PDN_ADCB
#define CS42L73_PDN_DMICB
#define CS42L73_PDN_ADCA
#define CS42L73_PDN_DMICA
#define CS42L73_PDN_LDO
#define CS42L73_DISCHG_FILT
#define CS42L73_PDN

/* CS42L73_PWRCTL2 */
#define CS42L73_PDN_MIC2_BIAS
#define CS42L73_PDN_MIC1_BIAS
#define CS42L73_PDN_VSP
#define CS42L73_PDN_ASP_SDOUT
#define CS42L73_PDN_ASP_SDIN
#define CS42L73_PDN_XSP_SDOUT
#define CS42L73_PDN_XSP_SDIN

/* CS42L73_PWRCTL3 */
#define CS42L73_PDN_THMS
#define CS42L73_PDN_SPKLO
#define CS42L73_PDN_EAR
#define CS42L73_PDN_SPK
#define CS42L73_PDN_LO
#define CS42L73_PDN_HP

/* Thermal Overload Detect. Requires interrupt ... */
#define CS42L73_THMOVLD_150C
#define CS42L73_THMOVLD_132C
#define CS42L73_THMOVLD_115C
#define CS42L73_THMOVLD_098C

#define CS42L73_CHARGEPUMP_MASK

/* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */
#define CS42L73_SP_3ST
#define CS42L73_SPDIF_I2S
#define CS42L73_SPDIF_PCM
#define CS42L73_PCM_MODE0
#define CS42L73_PCM_MODE1
#define CS42L73_PCM_MODE2
#define CS42L73_PCM_MODE_MASK
#define CS42L73_PCM_BIT_ORDER
#define CS42L73_MCK_SCLK_64FS
#define CS42L73_MCK_SCLK_MCLK
#define CS42L73_MCK_SCLK_PREMCLK

/* CS42L73_xSPMMCC */
#define CS42L73_MS_MASTER


/* CS42L73_DMMCC */
#define CS42L73_MCLKDIS
#define CS42L73_MCLKSEL_MCLK2
#define CS42L73_MCLKSEL_MCLK1

/* CS42L73 MCLK derived from MCLK1 or MCLK2 */
#define CS42L73_CLKID_MCLK1
#define CS42L73_CLKID_MCLK2

#define CS42L73_MCLKXDIV
#define CS42L73_MMCCDIV

#define CS42L73_XSP
#define CS42L73_ASP
#define CS42L73_VSP

/* IS1, IM1 */
#define CS42L73_MIC2_SDET
#define CS42L73_THMOVLD
#define CS42L73_DIGMIXOVFL
#define CS42L73_IPBOVFL
#define CS42L73_IPAOVFL

/* Analog Softramp */
#define CS42L73_ANLGOSFT

/* HP A/B Analog Mute */
#define CS42L73_HPA_MUTE
/* LO A/B Analog Mute	*/
#define CS42L73_LOA_MUTE
/* Digital Mute */
#define CS42L73_HLAD_MUTE
#define CS42L73_HLBD_MUTE
#define CS42L73_SPKD_MUTE
#define CS42L73_ESLD_MUTE

/* Misc defines for codec */
#define CS42L73_DEVID
#define CS42L73_MCLKX_MIN
#define CS42L73_MCLKX_MAX

#define CS42L73_SPC(id)
#define CS42L73_MMCC(id)
#define CS42L73_SPFS(id)

#endif	/* __CS42L73_H__ */