linux/sound/soc/codecs/cs4271.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * CS4271 ASoC codec driver
 *
 * Copyright (c) 2010 Alexander Sverdlin <[email protected]>
 *
 * This driver support CS4271 codec being master or slave, working
 * in control port mode, connected either via SPI or I2C.
 * The data format accepted is I2S or left-justified.
 * DAPM support not implemented.
 */

#include <linux/module.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>
#include <linux/regulator/consumer.h>
#include <sound/pcm.h>
#include <sound/soc.h>
#include <sound/tlv.h>
#include <sound/cs4271.h>
#include "cs4271.h"

#define CS4271_PCM_FORMATS
#define CS4271_PCM_RATES

/*
 * CS4271 registers
 */
#define CS4271_MODE1
#define CS4271_DACCTL
#define CS4271_DACVOL
#define CS4271_VOLA
#define CS4271_VOLB
#define CS4271_ADCCTL
#define CS4271_MODE2
#define CS4271_CHIPID

#define CS4271_FIRSTREG
#define CS4271_LASTREG
#define CS4271_NR_REGS

/* Bit masks for the CS4271 registers */
#define CS4271_MODE1_MODE_MASK
#define CS4271_MODE1_MODE_1X
#define CS4271_MODE1_MODE_2X
#define CS4271_MODE1_MODE_4X

#define CS4271_MODE1_DIV_MASK
#define CS4271_MODE1_DIV_1
#define CS4271_MODE1_DIV_15
#define CS4271_MODE1_DIV_2
#define CS4271_MODE1_DIV_3

#define CS4271_MODE1_MASTER

#define CS4271_MODE1_DAC_DIF_MASK
#define CS4271_MODE1_DAC_DIF_LJ
#define CS4271_MODE1_DAC_DIF_I2S
#define CS4271_MODE1_DAC_DIF_RJ16
#define CS4271_MODE1_DAC_DIF_RJ24
#define CS4271_MODE1_DAC_DIF_RJ20
#define CS4271_MODE1_DAC_DIF_RJ18

#define CS4271_DACCTL_AMUTE
#define CS4271_DACCTL_IF_SLOW

#define CS4271_DACCTL_DEM_MASK
#define CS4271_DACCTL_DEM_DIS
#define CS4271_DACCTL_DEM_441
#define CS4271_DACCTL_DEM_48
#define CS4271_DACCTL_DEM_32

#define CS4271_DACCTL_SVRU
#define CS4271_DACCTL_SRD
#define CS4271_DACCTL_INVA
#define CS4271_DACCTL_INVB

#define CS4271_DACVOL_BEQUA
#define CS4271_DACVOL_SOFT
#define CS4271_DACVOL_ZEROC

#define CS4271_DACVOL_ATAPI_MASK
#define CS4271_DACVOL_ATAPI_M_M
#define CS4271_DACVOL_ATAPI_M_BR
#define CS4271_DACVOL_ATAPI_M_BL
#define CS4271_DACVOL_ATAPI_M_BLR2
#define CS4271_DACVOL_ATAPI_AR_M
#define CS4271_DACVOL_ATAPI_AR_BR
#define CS4271_DACVOL_ATAPI_AR_BL
#define CS4271_DACVOL_ATAPI_AR_BLR2
#define CS4271_DACVOL_ATAPI_AL_M
#define CS4271_DACVOL_ATAPI_AL_BR
#define CS4271_DACVOL_ATAPI_AL_BL
#define CS4271_DACVOL_ATAPI_AL_BLR2
#define CS4271_DACVOL_ATAPI_ALR2_M
#define CS4271_DACVOL_ATAPI_ALR2_BR
#define CS4271_DACVOL_ATAPI_ALR2_BL
#define CS4271_DACVOL_ATAPI_ALR2_BLR2

#define CS4271_VOLA_MUTE
#define CS4271_VOLA_VOL_MASK
#define CS4271_VOLB_MUTE
#define CS4271_VOLB_VOL_MASK

#define CS4271_ADCCTL_DITHER16

#define CS4271_ADCCTL_ADC_DIF_MASK
#define CS4271_ADCCTL_ADC_DIF_LJ
#define CS4271_ADCCTL_ADC_DIF_I2S

#define CS4271_ADCCTL_MUTEA
#define CS4271_ADCCTL_MUTEB
#define CS4271_ADCCTL_HPFDA
#define CS4271_ADCCTL_HPFDB

#define CS4271_MODE2_LOOP
#define CS4271_MODE2_MUTECAEQUB
#define CS4271_MODE2_FREEZE
#define CS4271_MODE2_CPEN
#define CS4271_MODE2_PDN

#define CS4271_CHIPID_PART_MASK
#define CS4271_CHIPID_REV_MASK

/*
 * Default CS4271 power-up configuration
 * Array contains non-existing in hw register at address 0
 * Array do not include Chip ID, as codec driver does not use
 * registers read operations at all
 */
static const struct reg_default cs4271_reg_defaults[] =;

static bool cs4271_volatile_reg(struct device *dev, unsigned int reg)
{}

static const char * const supply_names[] =;

struct cs4271_private {};

static const struct snd_soc_dapm_widget cs4271_dapm_widgets[] =;

static const struct snd_soc_dapm_route cs4271_dapm_routes[] =;

/*
 * @freq is the desired MCLK rate
 * MCLK rate should (c) be the sample rate, multiplied by one of the
 * ratios listed in cs4271_mclk_fs_ratios table
 */
static int cs4271_set_dai_sysclk(struct snd_soc_dai *codec_dai,
				 int clk_id, unsigned int freq, int dir)
{}

static int cs4271_set_dai_fmt(struct snd_soc_dai *codec_dai,
			      unsigned int format)
{}

static int cs4271_deemph[] =;

static int cs4271_set_deemph(struct snd_soc_component *component)
{}

static int cs4271_get_deemph(struct snd_kcontrol *kcontrol,
			     struct snd_ctl_elem_value *ucontrol)
{}

static int cs4271_put_deemph(struct snd_kcontrol *kcontrol,
			     struct snd_ctl_elem_value *ucontrol)
{}

struct cs4271_clk_cfg {};

static struct cs4271_clk_cfg cs4271_clk_tab[] =;

#define CS4271_NR_RATIOS

static int cs4271_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{}

static int cs4271_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{}

/* CS4271 controls */
static DECLARE_TLV_DB_SCALE(cs4271_dac_tlv, -12700, 100, 0);

static const struct snd_kcontrol_new cs4271_snd_controls[] =;

static const struct snd_soc_dai_ops cs4271_dai_ops =;

static struct snd_soc_dai_driver cs4271_dai =;

static int cs4271_reset(struct snd_soc_component *component)
{}

#ifdef CONFIG_PM
static int cs4271_soc_suspend(struct snd_soc_component *component)
{}

static int cs4271_soc_resume(struct snd_soc_component *component)
{}
#else
#define cs4271_soc_suspend
#define cs4271_soc_resume
#endif /* CONFIG_PM */

#ifdef CONFIG_OF
const struct of_device_id cs4271_dt_ids[] =;
MODULE_DEVICE_TABLE(of, cs4271_dt_ids);
EXPORT_SYMBOL_GPL();
#endif

static int cs4271_component_probe(struct snd_soc_component *component)
{}

static void cs4271_component_remove(struct snd_soc_component *component)
{
	struct cs4271_private *cs4271 = snd_soc_component_get_drvdata(component);

	/* Set codec to the reset state */
	gpiod_set_value(cs4271->reset, 1);

	regcache_mark_dirty(cs4271->regmap);
	regulator_bulk_disable(ARRAY_SIZE(cs4271->supplies), cs4271->supplies);
};

static const struct snd_soc_component_driver soc_component_dev_cs4271 =;

static int cs4271_common_probe(struct device *dev,
			       struct cs4271_private **c)
{}

const struct regmap_config cs4271_regmap_config =;
EXPORT_SYMBOL_GPL();

int cs4271_probe(struct device *dev, struct regmap *regmap)
{}
EXPORT_SYMBOL_GPL();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();