/* * cs42xx8.h - Cirrus Logic CS42448/CS42888 Audio CODEC driver header file * * Copyright (C) 2014 Freescale Semiconductor, Inc. * * Author: Nicolin Chen <[email protected]> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ #ifndef _CS42XX8_H #define _CS42XX8_H struct cs42xx8_driver_data { … }; extern const struct dev_pm_ops cs42xx8_pm; extern const struct cs42xx8_driver_data cs42448_data; extern const struct cs42xx8_driver_data cs42888_data; extern const struct regmap_config cs42xx8_regmap_config; int cs42xx8_probe(struct device *dev, struct regmap *regmap, struct cs42xx8_driver_data *drvdata); /* CS42888 register map */ #define CS42XX8_CHIPID … #define CS42XX8_PWRCTL … #define CS42XX8_FUNCMOD … #define CS42XX8_INTF … #define CS42XX8_ADCCTL … #define CS42XX8_TXCTL … #define CS42XX8_DACMUTE … #define CS42XX8_VOLAOUT1 … #define CS42XX8_VOLAOUT2 … #define CS42XX8_VOLAOUT3 … #define CS42XX8_VOLAOUT4 … #define CS42XX8_VOLAOUT5 … #define CS42XX8_VOLAOUT6 … #define CS42XX8_VOLAOUT7 … #define CS42XX8_VOLAOUT8 … #define CS42XX8_DACINV … #define CS42XX8_VOLAIN1 … #define CS42XX8_VOLAIN2 … #define CS42XX8_VOLAIN3 … #define CS42XX8_VOLAIN4 … #define CS42XX8_VOLAIN5 … #define CS42XX8_VOLAIN6 … #define CS42XX8_ADCINV … #define CS42XX8_STATUSCTL … #define CS42XX8_STATUS … #define CS42XX8_STATUSM … #define CS42XX8_MUTEC … #define CS42XX8_FIRSTREG … #define CS42XX8_LASTREG … #define CS42XX8_NUMREGS … #define CS42XX8_I2C_INCR … /* Chip I.D. and Revision Register (Address 01h) */ #define CS42XX8_CHIPID_CHIP_ID_MASK … #define CS42XX8_CHIPID_REV_ID_MASK … /* Power Control (Address 02h) */ #define CS42XX8_PWRCTL_PDN_ADC3_SHIFT … #define CS42XX8_PWRCTL_PDN_ADC3_MASK … #define CS42XX8_PWRCTL_PDN_ADC3 … #define CS42XX8_PWRCTL_PDN_ADC2_SHIFT … #define CS42XX8_PWRCTL_PDN_ADC2_MASK … #define CS42XX8_PWRCTL_PDN_ADC2 … #define CS42XX8_PWRCTL_PDN_ADC1_SHIFT … #define CS42XX8_PWRCTL_PDN_ADC1_MASK … #define CS42XX8_PWRCTL_PDN_ADC1 … #define CS42XX8_PWRCTL_PDN_DAC4_SHIFT … #define CS42XX8_PWRCTL_PDN_DAC4_MASK … #define CS42XX8_PWRCTL_PDN_DAC4 … #define CS42XX8_PWRCTL_PDN_DAC3_SHIFT … #define CS42XX8_PWRCTL_PDN_DAC3_MASK … #define CS42XX8_PWRCTL_PDN_DAC3 … #define CS42XX8_PWRCTL_PDN_DAC2_SHIFT … #define CS42XX8_PWRCTL_PDN_DAC2_MASK … #define CS42XX8_PWRCTL_PDN_DAC2 … #define CS42XX8_PWRCTL_PDN_DAC1_SHIFT … #define CS42XX8_PWRCTL_PDN_DAC1_MASK … #define CS42XX8_PWRCTL_PDN_DAC1 … #define CS42XX8_PWRCTL_PDN_SHIFT … #define CS42XX8_PWRCTL_PDN_MASK … #define CS42XX8_PWRCTL_PDN … /* Functional Mode (Address 03h) */ #define CS42XX8_FUNCMOD_DAC_FM_SHIFT … #define CS42XX8_FUNCMOD_DAC_FM_WIDTH … #define CS42XX8_FUNCMOD_DAC_FM_MASK … #define CS42XX8_FUNCMOD_DAC_FM(v) … #define CS42XX8_FUNCMOD_ADC_FM_SHIFT … #define CS42XX8_FUNCMOD_ADC_FM_WIDTH … #define CS42XX8_FUNCMOD_ADC_FM_MASK … #define CS42XX8_FUNCMOD_ADC_FM(v) … #define CS42XX8_FUNCMOD_xC_FM_MASK(x) … #define CS42XX8_FUNCMOD_xC_FM(x, v) … #define CS42XX8_FUNCMOD_MFREQ_SHIFT … #define CS42XX8_FUNCMOD_MFREQ_WIDTH … #define CS42XX8_FUNCMOD_MFREQ_MASK … #define CS42XX8_FUNCMOD_MFREQ_256(s) … #define CS42XX8_FUNCMOD_MFREQ_384(s) … #define CS42XX8_FUNCMOD_MFREQ_512(s) … #define CS42XX8_FUNCMOD_MFREQ_768(s) … #define CS42XX8_FUNCMOD_MFREQ_1024(s) … #define CS42XX8_FM_SINGLE … #define CS42XX8_FM_DOUBLE … #define CS42XX8_FM_QUAD … #define CS42XX8_FM_AUTO … /* Interface Formats (Address 04h) */ #define CS42XX8_INTF_FREEZE_SHIFT … #define CS42XX8_INTF_FREEZE_MASK … #define CS42XX8_INTF_FREEZE … #define CS42XX8_INTF_AUX_DIF_SHIFT … #define CS42XX8_INTF_AUX_DIF_MASK … #define CS42XX8_INTF_AUX_DIF … #define CS42XX8_INTF_DAC_DIF_SHIFT … #define CS42XX8_INTF_DAC_DIF_WIDTH … #define CS42XX8_INTF_DAC_DIF_MASK … #define CS42XX8_INTF_DAC_DIF_LEFTJ … #define CS42XX8_INTF_DAC_DIF_I2S … #define CS42XX8_INTF_DAC_DIF_RIGHTJ … #define CS42XX8_INTF_DAC_DIF_RIGHTJ_16 … #define CS42XX8_INTF_DAC_DIF_ONELINE_20 … #define CS42XX8_INTF_DAC_DIF_ONELINE_24 … #define CS42XX8_INTF_DAC_DIF_TDM … #define CS42XX8_INTF_ADC_DIF_SHIFT … #define CS42XX8_INTF_ADC_DIF_WIDTH … #define CS42XX8_INTF_ADC_DIF_MASK … #define CS42XX8_INTF_ADC_DIF_LEFTJ … #define CS42XX8_INTF_ADC_DIF_I2S … #define CS42XX8_INTF_ADC_DIF_RIGHTJ … #define CS42XX8_INTF_ADC_DIF_RIGHTJ_16 … #define CS42XX8_INTF_ADC_DIF_ONELINE_20 … #define CS42XX8_INTF_ADC_DIF_ONELINE_24 … #define CS42XX8_INTF_ADC_DIF_TDM … /* ADC Control & DAC De-Emphasis (Address 05h) */ #define CS42XX8_ADCCTL_ADC_HPF_FREEZE_SHIFT … #define CS42XX8_ADCCTL_ADC_HPF_FREEZE_MASK … #define CS42XX8_ADCCTL_ADC_HPF_FREEZE … #define CS42XX8_ADCCTL_DAC_DEM_SHIFT … #define CS42XX8_ADCCTL_DAC_DEM_MASK … #define CS42XX8_ADCCTL_DAC_DEM … #define CS42XX8_ADCCTL_ADC1_SINGLE_SHIFT … #define CS42XX8_ADCCTL_ADC1_SINGLE_MASK … #define CS42XX8_ADCCTL_ADC1_SINGLE … #define CS42XX8_ADCCTL_ADC2_SINGLE_SHIFT … #define CS42XX8_ADCCTL_ADC2_SINGLE_MASK … #define CS42XX8_ADCCTL_ADC2_SINGLE … #define CS42XX8_ADCCTL_ADC3_SINGLE_SHIFT … #define CS42XX8_ADCCTL_ADC3_SINGLE_MASK … #define CS42XX8_ADCCTL_ADC3_SINGLE … #define CS42XX8_ADCCTL_AIN5_MUX_SHIFT … #define CS42XX8_ADCCTL_AIN5_MUX_MASK … #define CS42XX8_ADCCTL_AIN5_MUX … #define CS42XX8_ADCCTL_AIN6_MUX_SHIFT … #define CS42XX8_ADCCTL_AIN6_MUX_MASK … #define CS42XX8_ADCCTL_AIN6_MUX … /* Transition Control (Address 06h) */ #define CS42XX8_TXCTL_DAC_SNGVOL_SHIFT … #define CS42XX8_TXCTL_DAC_SNGVOL_MASK … #define CS42XX8_TXCTL_DAC_SNGVOL … #define CS42XX8_TXCTL_DAC_SZC_SHIFT … #define CS42XX8_TXCTL_DAC_SZC_WIDTH … #define CS42XX8_TXCTL_DAC_SZC_MASK … #define CS42XX8_TXCTL_DAC_SZC_IC … #define CS42XX8_TXCTL_DAC_SZC_ZC … #define CS42XX8_TXCTL_DAC_SZC_SR … #define CS42XX8_TXCTL_DAC_SZC_SRZC … #define CS42XX8_TXCTL_AMUTE_SHIFT … #define CS42XX8_TXCTL_AMUTE_MASK … #define CS42XX8_TXCTL_AMUTE … #define CS42XX8_TXCTL_MUTE_ADC_SP_SHIFT … #define CS42XX8_TXCTL_MUTE_ADC_SP_MASK … #define CS42XX8_TXCTL_MUTE_ADC_SP … #define CS42XX8_TXCTL_ADC_SNGVOL_SHIFT … #define CS42XX8_TXCTL_ADC_SNGVOL_MASK … #define CS42XX8_TXCTL_ADC_SNGVOL … #define CS42XX8_TXCTL_ADC_SZC_SHIFT … #define CS42XX8_TXCTL_ADC_SZC_MASK … #define CS42XX8_TXCTL_ADC_SZC_IC … #define CS42XX8_TXCTL_ADC_SZC_ZC … #define CS42XX8_TXCTL_ADC_SZC_SR … #define CS42XX8_TXCTL_ADC_SZC_SRZC … /* DAC Channel Mute (Address 07h) */ #define CS42XX8_DACMUTE_AOUT(n) … #define CS42XX8_DACMUTE_ALL … /* Status Control (Address 18h)*/ #define CS42XX8_STATUSCTL_INI_SHIFT … #define CS42XX8_STATUSCTL_INI_WIDTH … #define CS42XX8_STATUSCTL_INI_MASK … #define CS42XX8_STATUSCTL_INT_ACTIVE_HIGH … #define CS42XX8_STATUSCTL_INT_ACTIVE_LOW … #define CS42XX8_STATUSCTL_INT_OPEN_DRAIN … /* Status (Address 19h)*/ #define CS42XX8_STATUS_DAC_CLK_ERR_SHIFT … #define CS42XX8_STATUS_DAC_CLK_ERR_MASK … #define CS42XX8_STATUS_ADC_CLK_ERR_SHIFT … #define CS42XX8_STATUS_ADC_CLK_ERR_MASK … #define CS42XX8_STATUS_ADC3_OVFL_SHIFT … #define CS42XX8_STATUS_ADC3_OVFL_MASK … #define CS42XX8_STATUS_ADC2_OVFL_SHIFT … #define CS42XX8_STATUS_ADC2_OVFL_MASK … #define CS42XX8_STATUS_ADC1_OVFL_SHIFT … #define CS42XX8_STATUS_ADC1_OVFL_MASK … /* Status Mask (Address 1Ah) */ #define CS42XX8_STATUS_DAC_CLK_ERR_M_SHIFT … #define CS42XX8_STATUS_DAC_CLK_ERR_M_MASK … #define CS42XX8_STATUS_ADC_CLK_ERR_M_SHIFT … #define CS42XX8_STATUS_ADC_CLK_ERR_M_MASK … #define CS42XX8_STATUS_ADC3_OVFL_M_SHIFT … #define CS42XX8_STATUS_ADC3_OVFL_M_MASK … #define CS42XX8_STATUS_ADC2_OVFL_M_SHIFT … #define CS42XX8_STATUS_ADC2_OVFL_M_MASK … #define CS42XX8_STATUS_ADC1_OVFL_M_SHIFT … #define CS42XX8_STATUS_ADC1_OVFL_M_MASK … /* MUTEC Pin Control (Address 1Bh) */ #define CS42XX8_MUTEC_MCPOLARITY_SHIFT … #define CS42XX8_MUTEC_MCPOLARITY_MASK … #define CS42XX8_MUTEC_MCPOLARITY_ACTIVE_LOW … #define CS42XX8_MUTEC_MCPOLARITY_ACTIVE_HIGH … #define CS42XX8_MUTEC_MUTEC_ACTIVE_SHIFT … #define CS42XX8_MUTEC_MUTEC_ACTIVE_MASK … #define CS42XX8_MUTEC_MUTEC_ACTIVE … #endif /* _CS42XX8_H */
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