/* SPDX-License-Identifier: GPL-2.0 */ /* * ALSA SoC CX20721/CX20723 codec driver * * Copyright: (C) 2017 Conexant Systems, Inc. * Author: Simon Ho, <[email protected]> */ #ifndef __CX2072X_H__ #define __CX2072X_H__ #define CX2072X_MCLK_PLL … #define CX2072X_MCLK_EXTERNAL_PLL … #define CX2072X_MCLK_INTERNAL_OSC … /*#define CX2072X_RATES SNDRV_PCM_RATE_8000_192000*/ #define CX2072X_RATES_DSP … #define CX2072X_REG_MAX … #define CX2072X_VENDOR_ID … #define CX2072X_REVISION_ID … #define CX2072X_CURRENT_BCLK_FREQUENCY … #define CX2072X_AFG_POWER_STATE … #define CX2072X_UM_RESPONSE … #define CX2072X_GPIO_DATA … #define CX2072X_GPIO_ENABLE … #define CX2072X_GPIO_DIRECTION … #define CX2072X_GPIO_WAKE … #define CX2072X_GPIO_UM_ENABLE … #define CX2072X_GPIO_STICKY_MASK … #define CX2072X_AFG_FUNCTION_RESET … #define CX2072X_DAC1_CONVERTER_FORMAT … #define CX2072X_DAC1_AMP_GAIN_RIGHT … #define CX2072X_DAC1_AMP_GAIN_LEFT … #define CX2072X_DAC1_POWER_STATE … #define CX2072X_DAC1_CONVERTER_STREAM_CHANNEL … #define CX2072X_DAC1_EAPD_ENABLE … #define CX2072X_DAC2_CONVERTER_FORMAT … #define CX2072X_DAC2_AMP_GAIN_RIGHT … #define CX2072X_DAC2_AMP_GAIN_LEFT … #define CX2072X_DAC2_POWER_STATE … #define CX2072X_DAC2_CONVERTER_STREAM_CHANNEL … #define CX2072X_ADC1_CONVERTER_FORMAT … #define CX2072X_ADC1_AMP_GAIN_RIGHT_0 … #define CX2072X_ADC1_AMP_GAIN_LEFT_0 … #define CX2072X_ADC1_AMP_GAIN_RIGHT_1 … #define CX2072X_ADC1_AMP_GAIN_LEFT_1 … #define CX2072X_ADC1_AMP_GAIN_RIGHT_2 … #define CX2072X_ADC1_AMP_GAIN_LEFT_2 … #define CX2072X_ADC1_AMP_GAIN_RIGHT_3 … #define CX2072X_ADC1_AMP_GAIN_LEFT_3 … #define CX2072X_ADC1_AMP_GAIN_RIGHT_4 … #define CX2072X_ADC1_AMP_GAIN_LEFT_4 … #define CX2072X_ADC1_AMP_GAIN_RIGHT_5 … #define CX2072X_ADC1_AMP_GAIN_LEFT_5 … #define CX2072X_ADC1_AMP_GAIN_RIGHT_6 … #define CX2072X_ADC1_AMP_GAIN_LEFT_6 … #define CX2072X_ADC1_CONNECTION_SELECT_CONTROL … #define CX2072X_ADC1_POWER_STATE … #define CX2072X_ADC1_CONVERTER_STREAM_CHANNEL … #define CX2072X_ADC2_CONVERTER_FORMAT … #define CX2072X_ADC2_AMP_GAIN_RIGHT_0 … #define CX2072X_ADC2_AMP_GAIN_LEFT_0 … #define CX2072X_ADC2_AMP_GAIN_RIGHT_1 … #define CX2072X_ADC2_AMP_GAIN_LEFT_1 … #define CX2072X_ADC2_AMP_GAIN_RIGHT_2 … #define CX2072X_ADC2_AMP_GAIN_LEFT_2 … #define CX2072X_ADC2_CONNECTION_SELECT_CONTROL … #define CX2072X_ADC2_POWER_STATE … #define CX2072X_ADC2_CONVERTER_STREAM_CHANNEL … #define CX2072X_PORTA_CONNECTION_SELECT_CTRL … #define CX2072X_PORTA_POWER_STATE … #define CX2072X_PORTA_PIN_CTRL … #define CX2072X_PORTA_UNSOLICITED_RESPONSE … #define CX2072X_PORTA_PIN_SENSE … #define CX2072X_PORTA_EAPD_BTL … #define CX2072X_PORTB_POWER_STATE … #define CX2072X_PORTB_PIN_CTRL … #define CX2072X_PORTB_UNSOLICITED_RESPONSE … #define CX2072X_PORTB_PIN_SENSE … #define CX2072X_PORTB_EAPD_BTL … #define CX2072X_PORTB_GAIN_RIGHT … #define CX2072X_PORTB_GAIN_LEFT … #define CX2072X_PORTC_POWER_STATE … #define CX2072X_PORTC_PIN_CTRL … #define CX2072X_PORTC_GAIN_RIGHT … #define CX2072X_PORTC_GAIN_LEFT … #define CX2072X_PORTD_POWER_STATE … #define CX2072X_PORTD_PIN_CTRL … #define CX2072X_PORTD_UNSOLICITED_RESPONSE … #define CX2072X_PORTD_PIN_SENSE … #define CX2072X_PORTD_GAIN_RIGHT … #define CX2072X_PORTD_GAIN_LEFT … #define CX2072X_PORTE_CONNECTION_SELECT_CTRL … #define CX2072X_PORTE_POWER_STATE … #define CX2072X_PORTE_PIN_CTRL … #define CX2072X_PORTE_UNSOLICITED_RESPONSE … #define CX2072X_PORTE_PIN_SENSE … #define CX2072X_PORTE_EAPD_BTL … #define CX2072X_PORTE_GAIN_RIGHT … #define CX2072X_PORTE_GAIN_LEFT … #define CX2072X_PORTF_POWER_STATE … #define CX2072X_PORTF_PIN_CTRL … #define CX2072X_PORTF_UNSOLICITED_RESPONSE … #define CX2072X_PORTF_PIN_SENSE … #define CX2072X_PORTF_GAIN_RIGHT … #define CX2072X_PORTF_GAIN_LEFT … #define CX2072X_PORTG_POWER_STATE … #define CX2072X_PORTG_PIN_CTRL … #define CX2072X_PORTG_CONNECTION_SELECT_CTRL … #define CX2072X_PORTG_EAPD_BTL … #define CX2072X_PORTM_POWER_STATE … #define CX2072X_PORTM_PIN_CTRL … #define CX2072X_PORTM_CONNECTION_SELECT_CTRL … #define CX2072X_PORTM_EAPD_BTL … #define CX2072X_MIXER_POWER_STATE … #define CX2072X_MIXER_GAIN_RIGHT_0 … #define CX2072X_MIXER_GAIN_LEFT_0 … #define CX2072X_MIXER_GAIN_RIGHT_1 … #define CX2072X_MIXER_GAIN_LEFT_1 … #define CX2072X_EQ_ENABLE_BYPASS … #define CX2072X_EQ_B0_COEFF … #define CX2072X_EQ_B1_COEFF … #define CX2072X_EQ_B2_COEFF … #define CX2072X_EQ_A1_COEFF … #define CX2072X_EQ_A2_COEFF … #define CX2072X_EQ_G_COEFF … #define CX2072X_EQ_BAND … #define CX2072X_SPKR_DRC_ENABLE_STEP … #define CX2072X_SPKR_DRC_CONTROL … #define CX2072X_SPKR_DRC_TEST … #define CX2072X_DIGITAL_BIOS_TEST0 … #define CX2072X_DIGITAL_BIOS_TEST2 … #define CX2072X_I2SPCM_CONTROL1 … #define CX2072X_I2SPCM_CONTROL2 … #define CX2072X_I2SPCM_CONTROL3 … #define CX2072X_I2SPCM_CONTROL4 … #define CX2072X_I2SPCM_CONTROL5 … #define CX2072X_I2SPCM_CONTROL6 … #define CX2072X_UM_INTERRUPT_CRTL_E … #define CX2072X_CODEC_TEST2 … #define CX2072X_CODEC_TEST9 … #define CX2072X_CODEC_TESTXX … #define CX2072X_CODEC_TEST20 … #define CX2072X_CODEC_TEST24 … #define CX2072X_CODEC_TEST26 … #define CX2072X_ANALOG_TEST3 … #define CX2072X_ANALOG_TEST4 … #define CX2072X_ANALOG_TEST5 … #define CX2072X_ANALOG_TEST6 … #define CX2072X_ANALOG_TEST7 … #define CX2072X_ANALOG_TEST8 … #define CX2072X_ANALOG_TEST9 … #define CX2072X_ANALOG_TEST10 … #define CX2072X_ANALOG_TEST11 … #define CX2072X_ANALOG_TEST12 … #define CX2072X_ANALOG_TEST13 … #define CX2072X_DIGITAL_TEST0 … #define CX2072X_DIGITAL_TEST1 … #define CX2072X_DIGITAL_TEST11 … #define CX2072X_DIGITAL_TEST12 … #define CX2072X_DIGITAL_TEST15 … #define CX2072X_DIGITAL_TEST16 … #define CX2072X_DIGITAL_TEST17 … #define CX2072X_DIGITAL_TEST18 … #define CX2072X_DIGITAL_TEST19 … #define CX2072X_DIGITAL_TEST20 … /* not used in the current code, for future extensions (if any) */ #define CX2072X_MAX_EQ_BAND … #define CX2072X_MAX_EQ_COEFF … #define CX2072X_MAX_DRC_REGS … #define CX2072X_MIC_EQ_COEFF … #define CX2072X_PLBK_EQ_BAND_NUM … #define CX2072X_PLBK_EQ_COEF_LEN … #define CX2072X_PLBK_DRC_PARM_LEN … #define CX2072X_CLASSD_AMP_LEN … /* DAI interface type */ #define CX2072X_DAI_HIFI … #define CX2072X_DAI_DSP … #define CX2072X_DAI_DSP_PWM … enum cx2072x_reg_sample_size { … }; cx2072x_reg_i2spcm_ctrl_reg1; cx2072x_reg_i2spcm_ctrl_reg2; cx2072x_reg_i2spcm_ctrl_reg3; cx2072x_reg_i2spcm_ctrl_reg4; cx2072x_reg_i2spcm_ctrl_reg5; cx2072x_reg_i2spcm_ctrl_reg6; cx2072x_reg_digital_bios_test2; #endif /* __CX2072X_H__ */
Codebase Browser
linux