/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * max98927.h -- MAX98927 ALSA Soc Audio driver * * Copyright (C) 2016-2017 Maxim Integrated Products * Author: Ryan Lee <[email protected]> */ #ifndef _MAX98927_H #define _MAX98927_H /* Register Values */ #define MAX98927_R0001_INT_RAW1 … #define MAX98927_R0002_INT_RAW2 … #define MAX98927_R0003_INT_RAW3 … #define MAX98927_R0004_INT_STATE1 … #define MAX98927_R0005_INT_STATE2 … #define MAX98927_R0006_INT_STATE3 … #define MAX98927_R0007_INT_FLAG1 … #define MAX98927_R0008_INT_FLAG2 … #define MAX98927_R0009_INT_FLAG3 … #define MAX98927_R000A_INT_EN1 … #define MAX98927_R000B_INT_EN2 … #define MAX98927_R000C_INT_EN3 … #define MAX98927_R000D_INT_FLAG_CLR1 … #define MAX98927_R000E_INT_FLAG_CLR2 … #define MAX98927_R000F_INT_FLAG_CLR3 … #define MAX98927_R0010_IRQ_CTRL … #define MAX98927_R0011_CLK_MON … #define MAX98927_R0012_WDOG_CTRL … #define MAX98927_R0013_WDOG_RST … #define MAX98927_R0014_MEAS_ADC_THERM_WARN_THRESH … #define MAX98927_R0015_MEAS_ADC_THERM_SHDN_THRESH … #define MAX98927_R0016_MEAS_ADC_THERM_HYSTERESIS … #define MAX98927_R0017_PIN_CFG … #define MAX98927_R0018_PCM_RX_EN_A … #define MAX98927_R0019_PCM_RX_EN_B … #define MAX98927_R001A_PCM_TX_EN_A … #define MAX98927_R001B_PCM_TX_EN_B … #define MAX98927_R001C_PCM_TX_HIZ_CTRL_A … #define MAX98927_R001D_PCM_TX_HIZ_CTRL_B … #define MAX98927_R001E_PCM_TX_CH_SRC_A … #define MAX98927_R001F_PCM_TX_CH_SRC_B … #define MAX98927_R0020_PCM_MODE_CFG … #define MAX98927_R0021_PCM_MASTER_MODE … #define MAX98927_R0022_PCM_CLK_SETUP … #define MAX98927_R0023_PCM_SR_SETUP1 … #define MAX98927_R0024_PCM_SR_SETUP2 … #define MAX98927_R0025_PCM_TO_SPK_MONOMIX_A … #define MAX98927_R0026_PCM_TO_SPK_MONOMIX_B … #define MAX98927_R0027_ICC_RX_EN_A … #define MAX98927_R0028_ICC_RX_EN_B … #define MAX98927_R002B_ICC_TX_EN_A … #define MAX98927_R002C_ICC_TX_EN_B … #define MAX98927_R002E_ICC_HIZ_MANUAL_MODE … #define MAX98927_R002F_ICC_TX_HIZ_EN_A … #define MAX98927_R0030_ICC_TX_HIZ_EN_B … #define MAX98927_R0031_ICC_LNK_EN … #define MAX98927_R0032_PDM_TX_EN … #define MAX98927_R0033_PDM_TX_HIZ_CTRL … #define MAX98927_R0034_PDM_TX_CTRL … #define MAX98927_R0035_PDM_RX_CTRL … #define MAX98927_R0036_AMP_VOL_CTRL … #define MAX98927_R0037_AMP_DSP_CFG … #define MAX98927_R0038_TONE_GEN_DC_CFG … #define MAX98927_R0039_DRE_CTRL … #define MAX98927_R003A_AMP_EN … #define MAX98927_R003B_SPK_SRC_SEL … #define MAX98927_R003C_SPK_GAIN … #define MAX98927_R003D_SSM_CFG … #define MAX98927_R003E_MEAS_EN … #define MAX98927_R003F_MEAS_DSP_CFG … #define MAX98927_R0040_BOOST_CTRL0 … #define MAX98927_R0041_BOOST_CTRL3 … #define MAX98927_R0042_BOOST_CTRL1 … #define MAX98927_R0043_MEAS_ADC_CFG … #define MAX98927_R0044_MEAS_ADC_BASE_MSB … #define MAX98927_R0045_MEAS_ADC_BASE_LSB … #define MAX98927_R0046_ADC_CH0_DIVIDE … #define MAX98927_R0047_ADC_CH1_DIVIDE … #define MAX98927_R0048_ADC_CH2_DIVIDE … #define MAX98927_R0049_ADC_CH0_FILT_CFG … #define MAX98927_R004A_ADC_CH1_FILT_CFG … #define MAX98927_R004B_ADC_CH2_FILT_CFG … #define MAX98927_R004C_MEAS_ADC_CH0_READ … #define MAX98927_R004D_MEAS_ADC_CH1_READ … #define MAX98927_R004E_MEAS_ADC_CH2_READ … #define MAX98927_R0051_BROWNOUT_STATUS … #define MAX98927_R0052_BROWNOUT_EN … #define MAX98927_R0053_BROWNOUT_INFINITE_HOLD … #define MAX98927_R0054_BROWNOUT_INFINITE_HOLD_CLR … #define MAX98927_R0055_BROWNOUT_LVL_HOLD … #define MAX98927_R005A_BROWNOUT_LVL1_THRESH … #define MAX98927_R005B_BROWNOUT_LVL2_THRESH … #define MAX98927_R005C_BROWNOUT_LVL3_THRESH … #define MAX98927_R005D_BROWNOUT_LVL4_THRESH … #define MAX98927_R005E_BROWNOUT_THRESH_HYSTERYSIS … #define MAX98927_R005F_BROWNOUT_AMP_LIMITER_ATK_REL … #define MAX98927_R0060_BROWNOUT_AMP_GAIN_ATK_REL … #define MAX98927_R0061_BROWNOUT_AMP1_CLIP_MODE … #define MAX98927_R0072_BROWNOUT_LVL1_CUR_LIMIT … #define MAX98927_R0073_BROWNOUT_LVL1_AMP1_CTRL1 … #define MAX98927_R0074_BROWNOUT_LVL1_AMP1_CTRL2 … #define MAX98927_R0075_BROWNOUT_LVL1_AMP1_CTRL3 … #define MAX98927_R0076_BROWNOUT_LVL2_CUR_LIMIT … #define MAX98927_R0077_BROWNOUT_LVL2_AMP1_CTRL1 … #define MAX98927_R0078_BROWNOUT_LVL2_AMP1_CTRL2 … #define MAX98927_R0079_BROWNOUT_LVL2_AMP1_CTRL3 … #define MAX98927_R007A_BROWNOUT_LVL3_CUR_LIMIT … #define MAX98927_R007B_BROWNOUT_LVL3_AMP1_CTRL1 … #define MAX98927_R007C_BROWNOUT_LVL3_AMP1_CTRL2 … #define MAX98927_R007D_BROWNOUT_LVL3_AMP1_CTRL3 … #define MAX98927_R007E_BROWNOUT_LVL4_CUR_LIMIT … #define MAX98927_R007F_BROWNOUT_LVL4_AMP1_CTRL1 … #define MAX98927_R0080_BROWNOUT_LVL4_AMP1_CTRL2 … #define MAX98927_R0081_BROWNOUT_LVL4_AMP1_CTRL3 … #define MAX98927_R0082_ENV_TRACK_VOUT_HEADROOM … #define MAX98927_R0083_ENV_TRACK_BOOST_VOUT_DELAY … #define MAX98927_R0084_ENV_TRACK_REL_RATE … #define MAX98927_R0085_ENV_TRACK_HOLD_RATE … #define MAX98927_R0086_ENV_TRACK_CTRL … #define MAX98927_R0087_ENV_TRACK_BOOST_VOUT_READ … #define MAX98927_R00FF_GLOBAL_SHDN … #define MAX98927_R0100_SOFT_RESET … #define MAX98927_R01FF_REV_ID … /* MAX98927_R0018_PCM_RX_EN_A */ #define MAX98927_PCM_RX_CH0_EN … #define MAX98927_PCM_RX_CH1_EN … #define MAX98927_PCM_RX_CH2_EN … #define MAX98927_PCM_RX_CH3_EN … #define MAX98927_PCM_RX_CH4_EN … #define MAX98927_PCM_RX_CH5_EN … #define MAX98927_PCM_RX_CH6_EN … #define MAX98927_PCM_RX_CH7_EN … /* MAX98927_R001A_PCM_TX_EN_A */ #define MAX98927_PCM_TX_CH0_EN … #define MAX98927_PCM_TX_CH1_EN … #define MAX98927_PCM_TX_CH2_EN … #define MAX98927_PCM_TX_CH3_EN … #define MAX98927_PCM_TX_CH4_EN … #define MAX98927_PCM_TX_CH5_EN … #define MAX98927_PCM_TX_CH6_EN … #define MAX98927_PCM_TX_CH7_EN … /* MAX98927_R001E_PCM_TX_CH_SRC_A */ #define MAX98927_PCM_TX_CH_SRC_A_V_SHIFT … #define MAX98927_PCM_TX_CH_SRC_A_I_SHIFT … /* MAX98927_R001F_PCM_TX_CH_SRC_B */ #define MAX98927_PCM_TX_CH_INTERLEAVE_MASK … /* MAX98927_R0020_PCM_MODE_CFG */ #define MAX98927_PCM_MODE_CFG_PCM_BCLKEDGE … #define MAX98927_PCM_MODE_CFG_FORMAT_MASK … #define MAX98927_PCM_MODE_CFG_FORMAT_SHIFT … #define MAX98927_PCM_FORMAT_I2S … #define MAX98927_PCM_FORMAT_LJ … #define MAX98927_PCM_FORMAT_TDM_MODE0 … #define MAX98927_PCM_FORMAT_TDM_MODE1 … #define MAX98927_PCM_FORMAT_TDM_MODE2 … #define MAX98927_PCM_MODE_CFG_CHANSZ_MASK … #define MAX98927_PCM_MODE_CFG_CHANSZ_16 … #define MAX98927_PCM_MODE_CFG_CHANSZ_24 … #define MAX98927_PCM_MODE_CFG_CHANSZ_32 … /* MAX98927_R0021_PCM_MASTER_MODE */ #define MAX98927_PCM_MASTER_MODE_MASK … #define MAX98927_PCM_MASTER_MODE_SLAVE … #define MAX98927_PCM_MASTER_MODE_MASTER … #define MAX98927_PCM_MASTER_MODE_MCLK_MASK … #define MAX98927_PCM_MASTER_MODE_MCLK_RATE_SHIFT … /* MAX98927_R0022_PCM_CLK_SETUP */ #define MAX98927_PCM_CLK_SETUP_BSEL_MASK … /* MAX98927_R0023_PCM_SR_SETUP1 */ #define MAX98927_PCM_SR_SET1_SR_MASK … #define MAX98927_PCM_SR_SET1_SR_8000 … #define MAX98927_PCM_SR_SET1_SR_11025 … #define MAX98927_PCM_SR_SET1_SR_12000 … #define MAX98927_PCM_SR_SET1_SR_16000 … #define MAX98927_PCM_SR_SET1_SR_22050 … #define MAX98927_PCM_SR_SET1_SR_24000 … #define MAX98927_PCM_SR_SET1_SR_32000 … #define MAX98927_PCM_SR_SET1_SR_44100 … #define MAX98927_PCM_SR_SET1_SR_48000 … /* MAX98927_R0024_PCM_SR_SETUP2 */ #define MAX98927_PCM_SR_SET2_SR_MASK … #define MAX98927_PCM_SR_SET2_SR_SHIFT … #define MAX98927_PCM_SR_SET2_IVADC_SR_MASK … /* MAX98927_R0025_PCM_TO_SPK_MONOMIX_A */ #define MAX98927_PCM_TO_SPK_MONOMIX_CFG_MASK … #define MAX98927_PCM_TO_SPK_MONOMIX_CFG_SHIFT … /* MAX98927_R0035_PDM_RX_CTRL */ #define MAX98927_PDM_RX_EN_MASK … /* MAX98927_R0036_AMP_VOL_CTRL */ #define MAX98927_AMP_VOL_SEL … #define MAX98927_AMP_VOL_SEL_WIDTH … #define MAX98927_AMP_VOL_SEL_SHIFT … #define MAX98927_AMP_VOL_MASK … #define MAX98927_AMP_VOL_WIDTH … #define MAX98927_AMP_VOL_SHIFT … /* MAX98927_R0037_AMP_DSP_CFG */ #define MAX98927_AMP_DSP_CFG_DCBLK_EN … #define MAX98927_AMP_DSP_CFG_DITH_EN … #define MAX98927_AMP_DSP_CFG_RMP_BYPASS … #define MAX98927_AMP_DSP_CFG_DAC_INV … #define MAX98927_AMP_DSP_CFG_RMP_SHIFT … /* MAX98927_R0039_DRE_CTRL */ #define MAX98927_DRE_CTRL_DRE_EN … #define MAX98927_DRE_EN_SHIFT … /* MAX98927_R003A_AMP_EN */ #define MAX98927_AMP_EN_MASK … /* MAX98927_R003B_SPK_SRC_SEL */ #define MAX98927_SPK_SRC_MASK … /* MAX98927_R003C_SPK_GAIN */ #define MAX98927_SPK_PCM_GAIN_MASK … #define MAX98927_SPK_PDM_GAIN_MASK … #define MAX98927_SPK_GAIN_WIDTH … /* MAX98927_R003E_MEAS_EN */ #define MAX98927_MEAS_V_EN … #define MAX98927_MEAS_I_EN … /* MAX98927_R0040_BOOST_CTRL0 */ #define MAX98927_BOOST_CTRL0_VOUT_MASK … #define MAX98927_BOOST_CTRL0_PVDD_MASK … #define MAX98927_BOOST_CTRL0_PVDD_EN_SHIFT … /* MAX98927_R0052_BROWNOUT_EN */ #define MAX98927_BROWNOUT_BDE_EN … #define MAX98927_BROWNOUT_AMP_EN … #define MAX98927_BROWNOUT_DSP_EN … #define MAX98927_BROWNOUT_DSP_SHIFT … /* MAX98927_R0100_SOFT_RESET */ #define MAX98927_SOFT_RESET … /* MAX98927_R00FF_GLOBAL_SHDN */ #define MAX98927_GLOBAL_EN_MASK … struct max98927_priv { … }; #endif
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