linux/sound/soc/codecs/max98520.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2021, Maxim Integrated.
 */

#ifndef _MAX98520_H
#define _MAX98520_H

#define MAX98520_R2000_SW_RESET
#define MAX98520_R2001_STATUS_1
#define MAX98520_R2002_STATUS_2
#define MAX98520_R2020_THERM_WARN_THRESH
#define MAX98520_R2021_THERM_SHDN_THRESH
#define MAX98520_R2022_THERM_HYSTERESIS
#define MAX98520_R2023_THERM_FOLDBACK_SET
#define MAX98520_R2027_THERM_FOLDBACK_EN
#define MAX98520_R2030_CLK_MON_CTRL
#define MAX98520_R2037_ERR_MON_CTRL
#define MAX98520_R2040_PCM_MODE_CFG
#define MAX98520_R2041_PCM_CLK_SETUP
#define MAX98520_R2042_PCM_SR_SETUP
#define MAX98520_R2043_PCM_RX_SRC1
#define MAX98520_R2044_PCM_RX_SRC2
#define MAX98520_R204F_PCM_RX_EN
#define MAX98520_R2090_AMP_VOL_CTRL
#define MAX98520_R2091_AMP_PATH_GAIN
#define MAX98520_R2092_AMP_DSP_CFG
#define MAX98520_R2094_SSM_CFG
#define MAX98520_R2095_AMP_CFG
#define MAX98520_R209F_AMP_EN
#define MAX98520_R20B0_ADC_SR
#define MAX98520_R20B1_ADC_RESOLUTION
#define MAX98520_R20B2_ADC_PVDD0_CFG
#define MAX98520_R20B3_ADC_THERMAL_CFG
#define MAX98520_R20B4_ADC_READBACK_CTRL
#define MAX98520_R20B5_ADC_READBACK_UPDATE
#define MAX98520_R20B6_ADC_PVDD_READBACK_MSB
#define MAX98520_R20B7_ADC_PVDD_READBACK_LSB
#define MAX98520_R20B8_ADC_TEMP_READBACK_MSB
#define MAX98520_R20B9_ADC_TEMP_READBACK_LSB
#define MAX98520_R20BA_ADC_LOW_PVDD_READBACK_MSB
#define MAX98520_R20BB_ADC_LOW_READBACK_LSB
#define MAX98520_R20BC_ADC_HIGH_TEMP_READBACK_MSB
#define MAX98520_R20BD_ADC_HIGH_TEMP_READBACK_LSB
#define MAX98520_R20CF_MEAS_ADC_CFG
#define MAX98520_R20D0_DHT_CFG1
#define MAX98520_R20D1_LIMITER_CFG1
#define MAX98520_R20D2_LIMITER_CFG2
#define MAX98520_R20D3_DHT_CFG2
#define MAX98520_R20D4_DHT_CFG3
#define MAX98520_R20D5_DHT_CFG4
#define MAX98520_R20D6_DHT_HYSTERESIS_CFG
#define MAX98520_R20D8_DHT_EN
#define MAX98520_R210E_AUTO_RESTART_BEHAVIOR
#define MAX98520_R210F_GLOBAL_EN
#define MAX98520_R2161_BOOST_TM1
#define MAX98520_R2162_BOOST_TM2
#define MAX98520_R2163_BOOST_TM3
#define MAX98520_R21FF_REVISION_ID

/* MAX98520_R2030_CLK_MON_CTRL */
#define MAX98520_CMON_AUTORESTART_SHIFT

/* MAX98520_R2037_ERR_MON_CTRL */
#define MAX98520_CTRL_CMON_EN_SHIFT

/* MAX98520_R2040_PCM_MODE_CFG */
#define MAX98520_PCM_MODE_CFG_FORMAT_MASK
#define MAX98520_PCM_MODE_CFG_FORMAT_SHIFT
#define MAX98520_PCM_TX_CH_INTERLEAVE_MASK
#define MAX98520_PCM_FORMAT_I2S
#define MAX98520_PCM_FORMAT_LJ
#define MAX98520_PCM_FORMAT_TDM_MODE0
#define MAX98520_PCM_FORMAT_TDM_MODE1
#define MAX98520_PCM_FORMAT_TDM_MODE2
#define MAX98520_PCM_MODE_CFG_CHANSZ_MASK
#define MAX98520_PCM_MODE_CFG_CHANSZ_16
#define MAX98520_PCM_MODE_CFG_CHANSZ_24
#define MAX98520_PCM_MODE_CFG_CHANSZ_32

/* MAX98520_R2041_PCM_CLK_SETUP */
#define MAX98520_PCM_MODE_CFG_PCM_BCLKEDGE
#define MAX98520_PCM_CLK_SETUP_BSEL_MASK

/* MAX98520_R2042_PCM_SR_SETUP */
#define MAX98520_PCM_SR_SHIFT
#define MAX98520_IVADC_SR_SHIFT
#define MAX98520_PCM_SR_MASK
#define MAX98520_IVADC_SR_MASK
#define MAX98520_PCM_SR_8000
#define MAX98520_PCM_SR_11025
#define MAX98520_PCM_SR_12000
#define MAX98520_PCM_SR_16000
#define MAX98520_PCM_SR_22050
#define MAX98520_PCM_SR_24000
#define MAX98520_PCM_SR_32000
#define MAX98520_PCM_SR_44100
#define MAX98520_PCM_SR_48000
#define MAX98520_PCM_SR_88200
#define MAX98520_PCM_SR_96000
#define MAX98520_PCM_SR_176400
#define MAX98520_PCM_SR_192000

/* MAX98520_R2044_PCM_RX_SRC2 */
#define MAX98520_PCM_DMIX_CH1_SHIFT
#define MAX98520_PCM_DMIX_CH0_SRC_MASK
#define MAX98520_PCM_DMIX_CH1_SRC_MASK

/* MAX98520_R204F_PCM_RX_EN */
#define MAX98520_PCM_RX_EN_MASK
#define MAX98520_PCM_RX_BYP_EN_MASK

/* MAX98520_R2092_AMP_DSP_CFG */
#define MAX98520_DSP_SPK_DCBLK_EN_SHIFT
#define MAX98520_DSP_SPK_DITH_EN_SHIFT
#define MAX98520_DSP_SPK_INVERT_SHIFT
#define MAX98520_DSP_SPK_VOL_RMPUP_SHIFT
#define MAX98520_DSP_SPK_VOL_RMPDN_SHIFT
#define MAX98520_DSP_SPK_SAFE_EN_SHIFT

#define MAX98520_SPK_SAFE_EN_MASK

/* MAX98520_R2094_SSM_CFG */
#define MAX98520_SSM_EN_SHIFT
#define MAX98520_SSM_MOD_SHIFT
#define MAX98520_SSM_RCVR_MODE_SHIFT

/* MAX98520_R2095_AMP_CFG */
#define MAX98520_CFG_DYN_MODE_SHIFT
#define MAX98520_CFG_SPK_MODE_SHIFT

/* MAX98520_R20D0_DHT_CFG1 */
#define MAX98520_DHT_VROT_PNT_SHIFT

/* MAX98520_R20D1_LIMITER_CFG1 */
#define MAX98520_DHT_SUPPLY_HR_SHIFT

/* MAX98520_R20D2_DHT_CFG2 */
#define MAX98520_DHT_LIMITER_MODE_SHIFT
#define MAX98520_DHT_LIMITER_THRESHOLD_SHIFT

/* MAX98520_R20D3_DHT_CFG2 */
#define MAX98520_DHT_MAX_ATTEN_SHIFT

/* MAX98520_R20D6_DHT_HYSTERESIS_CFG */
#define MAX98520_DHT_HYSTERESIS_SWITCH_SHIFT
#define MAX98520_DHT_HYSTERESIS_SHIFT

/* MAX98520_R20B2_ADC_PVDD0_CFG, MAX98520_R20B3_ADC_THERMAL_CFG */
#define MAX98520_FLT_EN_SHIFT

struct max98520_priv {};
#endif