/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd. */ #ifndef ML26124_H #define ML26124_H /* Clock Control Register */ #define ML26124_SMPLING_RATE … #define ML26124_PLLNL … #define ML26124_PLLNH … #define ML26124_PLLML … #define ML26124_PLLMH … #define ML26124_PLLDIV … #define ML26124_CLK_EN … #define ML26124_CLK_CTL … /* System Control Register */ #define ML26124_SW_RST … #define ML26124_REC_PLYBAK_RUN … #define ML26124_MIC_TIM … /* Power Mnagement Register */ #define ML26124_PW_REF_PW_MNG … #define ML26124_PW_IN_PW_MNG … #define ML26124_PW_DAC_PW_MNG … #define ML26124_PW_SPAMP_PW_MNG … #define ML26124_PW_LOUT_PW_MNG … #define ML26124_PW_VOUT_PW_MNG … #define ML26124_PW_ZCCMP_PW_MNG … /* Analog Reference Control Register */ #define ML26124_PW_MICBIAS_VOL … /* Input/Output Amplifier Control Register */ #define ML26124_PW_MIC_IN_VOL … #define ML26124_PW_MIC_BOST_VOL … #define ML26124_PW_SPK_AMP_VOL … #define ML26124_PW_AMP_VOL_FUNC … #define ML26124_PW_AMP_VOL_FADE … /* Analog Path Control Register */ #define ML26124_SPK_AMP_OUT … #define ML26124_MIC_IF_CTL … #define ML26124_MIC_SELECT … /* Audio Interface Control Register */ #define ML26124_SAI_TRANS_CTL … #define ML26124_SAI_RCV_CTL … #define ML26124_SAI_MODE_SEL … /* DSP Control Register */ #define ML26124_FILTER_EN … #define ML26124_DVOL_CTL … #define ML26124_MIXER_VOL_CTL … #define ML26124_RECORD_DIG_VOL … #define ML26124_PLBAK_DIG_VOL … #define ML26124_DIGI_BOOST_VOL … #define ML26124_EQ_GAIN_BRAND0 … #define ML26124_EQ_GAIN_BRAND1 … #define ML26124_EQ_GAIN_BRAND2 … #define ML26124_EQ_GAIN_BRAND3 … #define ML26124_EQ_GAIN_BRAND4 … #define ML26124_HPF2_CUTOFF … #define ML26124_EQBRAND0_F0L … #define ML26124_EQBRAND0_F0H … #define ML26124_EQBRAND0_F1L … #define ML26124_EQBRAND0_F1H … #define ML26124_EQBRAND1_F0L … #define ML26124_EQBRAND1_F0H … #define ML26124_EQBRAND1_F1L … #define ML26124_EQBRAND1_F1H … #define ML26124_EQBRAND2_F0L … #define ML26124_EQBRAND2_F0H … #define ML26124_EQBRAND2_F1L … #define ML26124_EQBRAND2_F1H … #define ML26124_EQBRAND3_F0L … #define ML26124_EQBRAND3_F0H … #define ML26124_EQBRAND3_F1L … #define ML26124_EQBRAND3_F1H … #define ML26124_EQBRAND4_F0L … #define ML26124_EQBRAND4_F0H … #define ML26124_EQBRAND4_F1L … #define ML26124_EQBRAND4_F1H … /* ALC Control Register */ #define ML26124_ALC_MODE … #define ML26124_ALC_ATTACK_TIM … #define ML26124_ALC_DECAY_TIM … #define ML26124_ALC_HOLD_TIM … #define ML26124_ALC_TARGET_LEV … #define ML26124_ALC_MAXMIN_GAIN … #define ML26124_NOIS_GATE_THRSH … #define ML26124_ALC_ZERO_TIMOUT … /* Playback Limiter Control Register */ #define ML26124_PL_ATTACKTIME … #define ML26124_PL_DECAYTIME … #define ML26124_PL_TARGETTIME … #define ML26124_PL_MAXMIN_GAIN … #define ML26124_PLYBAK_BOST_VOL … #define ML26124_PL_0CROSS_TIMOUT … /* Video Amplifer Control Register */ #define ML26124_VIDEO_AMP_GAIN_CTL … #define ML26124_VIDEO_AMP_SETUP1 … #define ML26124_VIDEO_AMP_CTL2 … /* Clock select for machine driver */ #define ML26124_USE_PLL … #define ML26124_USE_MCLKI_256FS … #define ML26124_USE_MCLKI_512FS … #define ML26124_USE_MCLKI_1024FS … /* Register Mask */ #define ML26124_R0_MASK … #define ML26124_R2_MASK … #define ML26124_R4_MASK … #define ML26124_R6_MASK … #define ML26124_R8_MASK … #define ML26124_Ra_MASK … #define ML26124_Rc_MASK … #define ML26124_Re_MASK … #define ML26124_R10_MASK … #define ML26124_R12_MASK … #define ML26124_R14_MASK … #define ML26124_R20_MASK … #define ML26124_R22_MASK … #define ML26124_R24_MASK … #define ML26124_R26_MASK … #define ML26124_R28_MASK … #define ML26124_R2a_MASK … #define ML26124_R2e_MASK … #define ML26124_R30_MASK … #define ML26124_R32_MASK … #define ML26124_R38_MASK … #define ML26124_R3a_MASK … #define ML26124_R48_MASK … #define ML26124_R4a_MASK … #define ML26124_R54_MASK … #define ML26124_R5a_MASK … #define ML26124_Re8_MASK … #define ML26124_R60_MASK … #define ML26124_R62_MASK … #define ML26124_R64_MASK … #define ML26124_R66_MASK … #define ML26124_R68_MASK … #define ML26124_R6a_MASK … #define ML26124_R6c_MASK … #define ML26124_R70_MASK … #define ML26124_MCLKEN … #define ML26124_PLLEN … #define ML26124_PLLOE … #define ML26124_MCLKOE … #define ML26124_BLT_ALL_ON … #define ML26124_BLT_PREAMP_ON … #define ML26124_MICBEN_ON … enum ml26124_regs { … }; enum ml26124_clk_in { … }; #endif
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