linux/sound/soc/codecs/nau8821.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * NAU88L21 ALSA SoC audio driver
 *
 * Copyright 2021 Nuvoton Technology Corp.
 * Author: John Hsu <[email protected]>
 * Co-author: Seven Lee <[email protected]>
 */

#ifndef __NAU8821_H__
#define __NAU8821_H__

#define NAU8821_R00_RESET
#define NAU8821_R01_ENA_CTRL
#define NAU8821_R03_CLK_DIVIDER
#define NAU8821_R04_FLL1
#define NAU8821_R05_FLL2
#define NAU8821_R06_FLL3
#define NAU8821_R07_FLL4
#define NAU8821_R08_FLL5
#define NAU8821_R09_FLL6
#define NAU8821_R0A_FLL7
#define NAU8821_R0B_FLL8
#define NAU8821_R0D_JACK_DET_CTRL
#define NAU8821_R0F_INTERRUPT_MASK
#define NAU8821_R10_IRQ_STATUS
#define NAU8821_R11_INT_CLR_KEY_STATUS
#define NAU8821_R12_INTERRUPT_DIS_CTRL
#define NAU8821_R13_DMIC_CTRL
#define NAU8821_R1A_GPIO12_CTRL
#define NAU8821_R1B_TDM_CTRL
#define NAU8821_R1C_I2S_PCM_CTRL1
#define NAU8821_R1D_I2S_PCM_CTRL2
#define NAU8821_R1E_LEFT_TIME_SLOT
#define NAU8821_R1F_RIGHT_TIME_SLOT
#define NAU8821_R21_BIQ0_COF1
#define NAU8821_R22_BIQ0_COF2
#define NAU8821_R23_BIQ0_COF3
#define NAU8821_R24_BIQ0_COF4
#define NAU8821_R25_BIQ0_COF5
#define NAU8821_R26_BIQ0_COF6
#define NAU8821_R27_BIQ0_COF7
#define NAU8821_R28_BIQ0_COF8
#define NAU8821_R29_BIQ0_COF9
#define NAU8821_R2A_BIQ0_COF10
#define NAU8821_R2B_ADC_RATE
#define NAU8821_R2C_DAC_CTRL1
#define NAU8821_R2D_DAC_CTRL2
#define NAU8821_R2F_DAC_DGAIN_CTRL
#define NAU8821_R30_ADC_DGAIN_CTRL
#define NAU8821_R31_MUTE_CTRL
#define NAU8821_R32_HSVOL_CTRL
#define NAU8821_R34_DACR_CTRL
#define NAU8821_R35_ADC_DGAIN_CTRL1
#define NAU8821_R36_ADC_DRC_KNEE_IP12
#define NAU8821_R37_ADC_DRC_KNEE_IP34
#define NAU8821_R38_ADC_DRC_SLOPES
#define NAU8821_R39_ADC_DRC_ATKDCY
#define NAU8821_R3A_DAC_DRC_KNEE_IP12
#define NAU8821_R3B_DAC_DRC_KNEE_IP34
#define NAU8821_R3C_DAC_DRC_SLOPES
#define NAU8821_R3D_DAC_DRC_ATKDCY
#define NAU8821_R41_BIQ1_COF1
#define NAU8821_R42_BIQ1_COF2
#define NAU8821_R43_BIQ1_COF3
#define NAU8821_R44_BIQ1_COF4
#define NAU8821_R45_BIQ1_COF5
#define NAU8821_R46_BIQ1_COF6
#define NAU8821_R47_BIQ1_COF7
#define NAU8821_R48_BIQ1_COF8
#define NAU8821_R49_BIQ1_COF9
#define NAU8821_R4A_BIQ1_COF10
#define NAU8821_R4B_CLASSG_CTRL
#define NAU8821_R4C_IMM_MODE_CTRL
#define NAU8821_R4D_IMM_RMS_L
#define NAU8821_R4E_FUSE_CTRL2
#define NAU8821_R4F_FUSE_CTRL3
#define NAU8821_R51_FUSE_CTRL1
#define NAU8821_R53_OTPDOUT_1
#define NAU8821_R54_OTPDOUT_2
#define NAU8821_R55_MISC_CTRL
#define NAU8821_R58_I2C_DEVICE_ID
#define NAU8821_R59_SARDOUT_RAM_STATUS
#define NAU8821_R5A_SOFTWARE_RST
#define NAU8821_R66_BIAS_ADJ
#define NAU8821_R68_TRIM_SETTINGS
#define NAU8821_R69_ANALOG_CONTROL_1
#define NAU8821_R6A_ANALOG_CONTROL_2
#define NAU8821_R6B_PGA_MUTE
#define NAU8821_R71_ANALOG_ADC_1
#define NAU8821_R72_ANALOG_ADC_2
#define NAU8821_R73_RDAC
#define NAU8821_R74_MIC_BIAS
#define NAU8821_R76_BOOST
#define NAU8821_R77_FEPGA
#define NAU8821_R7E_PGA_GAIN
#define NAU8821_R7F_POWER_UP_CONTROL
#define NAU8821_R80_CHARGE_PUMP
#define NAU8821_R81_CHARGE_PUMP_INPUT_READ
#define NAU8821_R82_GENERAL_STATUS
#define NAU8821_REG_MAX
/* 16-bit control register address, and 16-bits control register data */
#define NAU8821_REG_ADDR_LEN
#define NAU8821_REG_DATA_LEN

/* ENA_CTRL (0x01) */
#define NAU8821_CLK_DAC_INV_SFT
#define NAU8821_CLK_DAC_INV
#define NAU8821_EN_DACR_SFT
#define NAU8821_EN_DACR
#define NAU8821_EN_DACL_SFT
#define NAU8821_EN_DACL
#define NAU8821_EN_ADCR_SFT
#define NAU8821_EN_ADCR
#define NAU8821_EN_ADCL_SFT
#define NAU8821_EN_ADCL
#define NAU8821_EN_ADC_CLK_SFT
#define NAU8821_EN_ADC_CLK
#define NAU8821_EN_DAC_CLK_SFT
#define NAU8821_EN_DAC_CLK
#define NAU8821_EN_I2S_CLK_SFT
#define NAU8821_EN_I2S_CLK
#define NAU8821_EN_DRC_CLK_SFT
#define NAU8821_EN_DRC_CLK

/* CLK_DIVIDER (0x03) */
#define NAU8821_CLK_SRC_SFT
#define NAU8821_CLK_SRC_MASK
#define NAU8821_CLK_SRC_VCO
#define NAU8821_CLK_SRC_MCLK
#define NAU8821_CLK_CODEC_SRC_SFT
#define NAU8821_CLK_CODEC_SRC_MASK
#define NAU8821_CLK_CODEC_SRC_VCO
#define NAU8821_CLK_CODEC_SRC_MCLK
#define NAU8821_CLK_ADC_SRC_SFT
#define NAU8821_CLK_ADC_SRC_MASK
#define NAU8821_CLK_DAC_SRC_SFT
#define NAU8821_CLK_DAC_SRC_MASK
#define NAU8821_CLK_MCLK_SRC_MASK

/* FLL1 (0x04) */
#define NAU8821_ICTRL_LATCH_SFT
#define NAU8821_ICTRL_LATCH_MASK
#define NAU8821_FLL_RATIO_MASK

/* FLL3 (0x06) */
#define NAU8821_GAIN_ERR_SFT
#define NAU8821_GAIN_ERR_MASK
#define NAU8821_FLL_CLK_SRC_SFT
#define NAU8821_FLL_CLK_SRC_MASK
#define NAU8821_FLL_CLK_SRC_FS
#define NAU8821_FLL_CLK_SRC_BLK
#define NAU8821_FLL_CLK_SRC_MCLK
#define NAU8821_FLL_INTEGER_MASK

/* FLL4 (0x07) */
#define NAU8821_HIGHBW_EN_SFT
#define NAU8821_HIGHBW_EN
#define NAU8821_FLL_REF_DIV_SFT
#define NAU8821_FLL_REF_DIV_MASK

/* FLL5 (0x08) */
#define NAU8821_FLL_PDB_DAC_EN
#define NAU8821_FLL_LOOP_FTR_EN
#define NAU8821_FLL_CLK_SW_SFT
#define NAU8821_FLL_CLK_SW_MASK
#define NAU8821_FLL_CLK_SW_N2
#define NAU8821_FLL_CLK_SW_REF
#define NAU8821_FLL_FTR_SW_SFT
#define NAU8821_FLL_FTR_SW_MASK
#define NAU8821_FLL_FTR_SW_ACCU
#define NAU8821_FLL_FTR_SW_FILTER

/* FLL6 (0x09) */
#define NAU8821_DCO_EN
#define NAU8821_SDM_EN
#define NAU8821_CUTOFF500

/* FLL7 (0x0a) */
#define NAU8821_FLL_FRACH_MASK

/* FLL8 (0x0b) */
#define NAU8821_FLL_FRACL_MASK

/* JACK_DET_CTRL (0x0d) */
/* 0 - open, 1 - short to GND */
#define NAU8821_SPKR_DWN1R_SFT
#define NAU8821_SPKR_DWN1R
#define NAU8821_SPKR_DWN1L_SFT
#define NAU8821_SPKR_DWN1L
#define NAU8821_JACK_DET_RESTART
#define NAU8821_JACK_DET_DB_BYPASS
#define NAU8821_JACK_INSERT_DEBOUNCE_SFT
#define NAU8821_JACK_INSERT_DEBOUNCE_MASK
#define NAU8821_JACK_EJECT_DEBOUNCE_SFT
#define NAU8821_JACK_EJECT_DEBOUNCE_MASK
#define NAU8821_JACK_POLARITY

/* INTERRUPT_MASK (0x0f) */
#define NAU8821_IRQ_PIN_PULL_UP
#define NAU8821_IRQ_PIN_PULL_EN
#define NAU8821_IRQ_OUTPUT_EN
#define NAU8821_IRQ_RMS_EN
#define NAU8821_IRQ_KEY_RELEASE_EN
#define NAU8821_IRQ_KEY_PRESS_EN
#define NAU8821_IRQ_MIC_DET_EN
#define NAU8821_IRQ_EJECT_EN
#define NAU8821_IRQ_INSERT_EN

/* IRQ_STATUS (0x10) */
#define NAU8821_SHORT_CIRCUIT_IRQ
#define NAU8821_IMPEDANCE_MEAS_IRQ
#define NAU8821_KEY_IRQ_SFT
#define NAU8821_KEY_IRQ_MASK
#define NAU8821_KEY_RELEASE_IRQ
#define NAU8821_KEY_SHORT_PRESS_IRQ
#define NAU8821_MIC_DETECT_IRQ
#define NAU8821_JACK_EJECT_IRQ_MASK
#define NAU8821_JACK_EJECT_DETECTED
#define NAU8821_JACK_INSERT_IRQ_MASK
#define NAU8821_JACK_INSERT_DETECTED

/* INTERRUPT_DIS_CTRL (0x12) */
#define NAU8821_IRQ_KEY_RELEASE_DIS
#define NAU8821_IRQ_KEY_PRESS_DIS
#define NAU8821_IRQ_MIC_DIS
#define NAU8821_IRQ_EJECT_DIS
#define NAU8821_IRQ_INSERT_DIS

/* DMIC_CTRL (0x13) */
#define NAU8821_DMIC_DS_SFT
#define NAU8821_DMIC_DS_MASK
#define NAU8821_DMIC_DS_HIGH
#define NAU8821_DMIC_DS_LOW
#define NAU8821_DMIC_SRC_SFT
#define NAU8821_DMIC_SRC_MASK
#define NAU8821_CLK_DMIC_SRC
#define NAU8821_DMIC_EN_SFT
#define NAU8821_DMIC_SLEW_SFT
#define NAU8821_DMIC_SLEW_MASK

/* GPIO12_CTRL (0x1a) */
#define NAU8821_JKDET_PULL_UP
#define NAU8821_JKDET_PULL_EN
#define NAU8821_JKDET_OUTPUT_EN

/* TDM_CTRL (0x1b) */
#define NAU8821_TDM_EN_SFT
#define NAU8821_TDM_EN
#define NAU8821_ADCPHS_SFT
#define NAU8821_DACL_CH_SFT
#define NAU8821_DACL_CH_MASK
#define NAU8821_DACR_CH_SFT
#define NAU8821_DACR_CH_MASK
#define NAU8821_ADCL_CH_SFT
#define NAU8821_ADCL_CH_MASK
#define NAU8821_ADCR_CH_SFT
#define NAU8821_ADCR_CH_MASK

/* I2S_PCM_CTRL1 (0x1c) */
#define NAU8821_I2S_BP_SFT
#define NAU8821_I2S_BP_MASK
#define NAU8821_I2S_BP_INV
#define NAU8821_I2S_PCMB_SFT
#define NAU8821_I2S_PCMB_MASK
#define NAU8821_I2S_PCMB_EN
#define NAU8821_I2S_DL_SFT
#define NAU8821_I2S_DL_MASK
#define NAU8821_I2S_DL_32
#define NAU8821_I2S_DL_24
#define NAU8821_I2S_DL_20
#define NAU8821_I2S_DL_16
#define NAU8821_I2S_DF_MASK
#define NAU8821_I2S_DF_PCM_AB
#define NAU8821_I2S_DF_I2S
#define NAU8821_I2S_DF_LEFT
#define NAU8821_I2S_DF_RIGTH

/* I2S_PCM_CTRL2 (0x1d) */
#define NAU8821_I2S_TRISTATE_SFT
#define NAU8821_I2S_TRISTATE
#define NAU8821_I2S_LRC_DIV_SFT
#define NAU8821_I2S_LRC_DIV_MASK
#define NAU8821_I2S_MS_SFT
#define NAU8821_I2S_MS_MASK
#define NAU8821_I2S_MS_MASTER
#define NAU8821_I2S_MS_SLAVE
#define NAU8821_I2S_BLK_DIV_MASK

/* LEFT_TIME_SLOT (0x1e) */
#define NAU8821_TSLOT_L_OFFSET_MASK
#define NAU8821_DIS_FS_SHORT_DET

/* RIGHT_TIME_SLOT (0x1f) */
#define NAU8821_TSLOT_R_OFFSET_MASK

/* BIQ0_COF10 (0x2a) */
#define NAU8821_BIQ0_ADC_EN_SFT
#define NAU8821_BIQ0_ADC_EN_EN

/* ADC_RATE (0x2b) */
#define NAU8821_ADC_SYNC_DOWN_SFT
#define NAU8821_ADC_SYNC_DOWN_MASK
#define NAU8821_ADC_SYNC_DOWN_256
#define NAU8821_ADC_SYNC_DOWN_128
#define NAU8821_ADC_SYNC_DOWN_64
#define NAU8821_ADC_SYNC_DOWN_32
#define NAU8821_ADC_L_SRC_SFT
#define NAU8821_ADC_L_SRC_EN
#define NAU8821_ADC_R_SRC_SFT
#define NAU8821_ADC_R_SRC_EN

/* DAC_CTRL1 (0x2c) */
#define NAU8821_DAC_OVERSAMPLE_SFT
#define NAU8821_DAC_OVERSAMPLE_MASK
#define NAU8821_DAC_OVERSAMPLE_32
#define NAU8821_DAC_OVERSAMPLE_128
#define NAU8821_DAC_OVERSAMPLE_256
#define NAU8821_DAC_OVERSAMPLE_64

/* DAC_DGAIN_CTRL (0x2f) */
#define NAU8821_DAC1_TO_DAC0_ST_SFT
#define NAU8821_DAC1_TO_DAC0_ST_MASK
#define NAU8821_DAC0_TO_DAC1_ST_SFT
#define NAU8821_DAC0_TO_DAC1_ST_MASK

/* MUTE_CTRL (0x31) */
#define NAU8821_DAC_ZC_EN
#define NAU8821_DAC_SOFT_MUTE
#define NAU8821_ADC_ZC_EN
#define NAU8821_ADC_SOFT_MUTE

/* HSVOL_CTRL (0x32) */
#define NAU8821_HP_MUTE
#define NAU8821_HP_MUTE_AUTO
#define NAU8821_HPL_MUTE
#define NAU8821_HPR_MUTE
#define NAU8821_HPL_VOL_SFT
#define NAU8821_HPL_VOL_MASK
#define NAU8821_HPR_VOL_SFT
#define NAU8821_HPR_VOL_MASK

/* DACR_CTRL (0x34) */
#define NAU8821_DACR_CH_VOL_SFT
#define NAU8821_DACR_CH_VOL_MASK
#define NAU8821_DACL_CH_VOL_SFT
#define NAU8821_DACL_CH_VOL_MASK

/* ADC_DGAIN_CTRL1 (0x35) */
#define NAU8821_ADCR_CH_VOL_SFT
#define NAU8821_ADCR_CH_VOL_MASK
#define NAU8821_ADCL_CH_VOL_SFT
#define NAU8821_ADCL_CH_VOL_MASK

/* ADC_DRC_KNEE_IP12 (0x36) */
#define NAU8821_DRC_ENA_ADC_SFT
#define NAU8821_DRC_ENA_ADC_EN

/* ADC_DRC_KNEE_IP34 (0x37) */
#define NAU8821_DRC_KNEE4_IP_ADC_SFT
#define NAU8821_DRC_KNEE4_IP_ADC_MASK
#define NAU8821_DRC_KNEE3_IP_ADC_SFT
#define NAU8821_DRC_KNEE3_IP_ADC_MASK

/* ADC_DRC_SLOPES (0x38) */
#define NAU8821_DRC_NG_SLP_ADC_SFT
#define NAU8821_DRC_EXP_SLP_ADC_SFT
#define NAU8821_DRC_CMP2_SLP_ADC_SFT
#define NAU8821_DRC_CMP1_SLP_ADC_SFT
#define NAU8821_DRC_LMT_SLP_ADC_SFT

/* ADC_DRC_ATKDCY (0x39) */
#define NAU8821_DRC_PK_COEF1_ADC_SFT
#define NAU8821_DRC_PK_COEF2_ADC_SFT
#define NAU8821_DRC_ATK_ADC_SFT
#define NAU8821_DRC_DCY_ADC_SFT

/* BIQ1_COF10 (0x4a) */
#define NAU8821_BIQ1_DAC_EN_SFT
#define NAU8821_BIQ1_DAC_EN_EN

/* CLASSG_CTRL (0x4b) */
#define NAU8821_CLASSG_TIMER_SFT
#define NAU8821_CLASSG_TIMER_MASK
#define NAU8821_CLASSG_TIMER_64MS
#define NAU8821_CLASSG_TIMER_32MS
#define NAU8821_CLASSG_TIMER_16MS
#define NAU8821_CLASSG_TIMER_8MS
#define NAU8821_CLASSG_TIMER_2MS
#define NAU8821_CLASSG_TIMER_1MS
#define NAU8821_CLASSG_RDAC_EN_SFT
#define NAU8821_CLASSG_RDAC_EN
#define NAU8821_CLASSG_LDAC_EN_SFT
#define NAU8821_CLASSG_LDAC_EN
#define NAU8821_CLASSG_EN_SFT
#define NAU8821_CLASSG_EN

/* IMM_MODE_CTRL (0x4c) */
#define NAU8821_IMM_THD_SFT
#define NAU8821_IMM_THD_MASK
#define NAU8821_IMM_GEN_VOL_SFT
#define NAU8821_IMM_GEN_VOL_MASK
#define NAU8821_IMM_CYC_SFT
#define NAU8821_IMM_CYC_MASK
#define NAU8821_IMM_EN
#define NAU8821_IMM_DAC_SRC_MASK

/* I2C_DEVICE_ID (0x58) */
#define NAU8821_KEYDET
#define NAU8821_MICDET
#define NAU8821_SOFTWARE_ID_MASK

/* BIAS_ADJ (0x66) */
#define NAU8821_BIAS_HP_IMP
#define NAU8821_BIAS_TESTDAC_SFT
#define NAU8821_BIAS_TESTDAC_EN
#define NAU8821_BIAS_TESTDACR_EN
#define NAU8821_BIAS_TESTDACL_EN
#define NAU8821_BIAS_VMID
#define NAU8821_BIAS_VMID_SEL_SFT
#define NAU8821_BIAS_VMID_SEL_MASK

/* ANALOG_CONTROL_1 (0x69) */
#define NAU8821_JD_POL_SFT
#define NAU8821_JD_POL_MASK
#define NAU8821_JD_POL_INV
#define NAU8821_JD_OUT_POL_SFT
#define NAU8821_JD_OUT_POL_MASK
#define NAU8821_JD_OUT_POL_INV
#define NAU8821_JD_EN_SFT
#define NAU8821_JD_EN

/* ANALOG_CONTROL_2 (0x6a) */
#define NAU8821_HP_NON_CLASSG_CURRENT_2xADJ
#define NAU8821_DAC_CAPACITOR_MSB
#define NAU8821_DAC_CAPACITOR_LSB

/* MUTE_MIC_L_N (0x6b) */
#define NAU8821_MUTE_MICNL_SFT
#define NAU8821_MUTE_MICNL_EN
#define NAU8821_MUTE_MICNR_SFT
#define NAU8821_MUTE_MICNR_EN
#define NAU8821_MUTE_MICRP_SFT
#define NAU8821_MUTE_MICRP_EN

/* ANALOG_ADC_1 (0x71) */
#define NAU8821_MICDET_EN_SFT
#define NAU8821_MICDET_MASK
#define NAU8821_MICDET_DIS
#define NAU8821_MICDET_EN

/* ANALOG_ADC_2 (0x72) */
#define NAU8821_ADC_VREFSEL_SFT
#define NAU8821_ADC_VREFSEL_MASK
#define NAU8821_POWERUP_ADCL_SFT
#define NAU8821_POWERUP_ADCL
#define NAU8821_POWERUP_ADCR_SFT
#define NAU8821_POWERUP_ADCR

/* RDAC (0x73) */
#define NAU8821_DACR_EN_SFT
#define NAU8821_DACR_EN
#define NAU8821_DACL_EN_SFT
#define NAU8821_DACL_EN
#define NAU8821_DACR_CLK_EN_SFT
#define NAU8821_DACR_CLK_EN
#define NAU8821_DACL_CLK_EN_SFT
#define NAU8821_DACL_CLK_EN
#define NAU8821_DAC_CLK_DELAY_SFT
#define NAU8821_DAC_CLK_DELAY_MASK
#define NAU8821_DAC_VREF_SFT
#define NAU8821_DAC_VREF_MASK

/* MIC_BIAS (0x74) */
#define NAU8821_MICBIAS_JKR2
#define NAU8821_MICBIAS_LOWNOISE_SFT
#define NAU8821_MICBIAS_LOWNOISE_EN
#define NAU8821_MICBIAS_POWERUP_SFT
#define NAU8821_MICBIAS_POWERUP_EN
#define NAU8821_MICBIAS_VOLTAGE_SFT
#define NAU8821_MICBIAS_VOLTAGE_MASK

/* BOOST (0x76) */
#define NAU8821_PRECHARGE_DIS
#define NAU8821_GLOBAL_BIAS_EN
#define NAU8821_HP_BOOST_DISCHRG_SFT
#define NAU8821_HP_BOOST_DISCHRG_EN
#define NAU8821_HP_BOOST_DIS_SFT
#define NAU8821_HP_BOOST_DIS
#define NAU8821_HP_BOOST_G_DIS
#define NAU8821_SHORT_SHUTDOWN_EN

/* FEPGA (0x77) */
#define NAU8821_ACDC_CTRL_SFT
#define NAU8821_ACDC_CTRL_MASK
#define NAU8821_ACDC_VREF_MICP
#define NAU8821_ACDC_VREF_MICN
#define NAU8821_FEPGA_MODEL_SFT
#define NAU8821_FEPGA_MODEL_MASK
#define NAU8821_FEPGA_MODEL_AAF
#define NAU8821_FEPGA_MODEL_DIS
#define NAU8821_FEPGA_MODEL_IMP12K
#define NAU8821_FEPGA_MODER_SFT
#define NAU8821_FEPGA_MODER_MASK
#define NAU8821_FEPGA_MODER_AAF
#define NAU8821_FEPGA_MODER_DIS
#define NAU8821_FEPGA_MODER_IMP12K


/* PGA_GAIN (0x7e) */
#define NAU8821_PGA_GAIN_L_SFT
#define NAU8821_PGA_GAIN_L_MASK
#define NAU8821_PGA_GAIN_R_SFT
#define NAU8821_PGA_GAIN_R_MASK

/* POWER_UP_CONTROL (0x7f) */
#define NAU8821_PUP_PGA_L_SFT
#define NAU8821_PUP_PGA_L
#define NAU8821_PUP_PGA_R_SFT
#define NAU8821_PUP_PGA_R
#define NAU8821_PUP_INTEG_R_SFT
#define NAU8821_PUP_INTEG_R
#define NAU8821_PUP_INTEG_L_SFT
#define NAU8821_PUP_INTEG_L
#define NAU8821_PUP_DRV_INSTG_R_SFT
#define NAU8821_PUP_DRV_INSTG_R
#define NAU8821_PUP_DRV_INSTG_L_SFT
#define NAU8821_PUP_DRV_INSTG_L
#define NAU8821_PUP_MAIN_DRV_R_SFT
#define NAU8821_PUP_MAIN_DRV_R
#define NAU8821_PUP_MAIN_DRV_L_SFT
#define NAU8821_PUP_MAIN_DRV_L

/* CHARGE_PUMP (0x80) */
#define NAU8821_JAMNODCLOW
#define NAU8821_POWER_DOWN_DACR_SFT
#define NAU8821_POWER_DOWN_DACR
#define NAU8821_POWER_DOWN_DACL_SFT
#define NAU8821_POWER_DOWN_DACL
#define NAU8821_CHANRGE_PUMP_EN_SFT
#define NAU8821_CHANRGE_PUMP_EN

/* GENERAL_STATUS (0x82) */
#define NAU8821_GPIO2_IN_SFT
#define NAU8821_GPIO2_IN

#define NUVOTON_CODEC_DAI

/* System Clock Source */
enum {};

struct nau8821 {};

int nau8821_enable_jack_detect(struct snd_soc_component *component,
	struct snd_soc_jack *jack);

#endif  /* __NAU8821_H__ */