// SPDX-License-Identifier: GPL-2.0 // // nau8822.c -- NAU8822 ALSA Soc Audio driver // // Copyright 2017 Nuvoton Technology Crop. // // Author: David Lin <[email protected]> // Co-author: John Hsu <[email protected]> // Co-author: Seven Li <[email protected]> // // Based on WM8974.c #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/pm.h> #include <linux/i2c.h> #include <linux/regmap.h> #include <linux/slab.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/pcm_params.h> #include <sound/soc.h> #include <sound/initval.h> #include <sound/tlv.h> #include <asm/div64.h> #include "nau8822.h" #define NAU_PLL_FREQ_MAX … #define NAU_PLL_FREQ_MIN … #define NAU_PLL_REF_MAX … #define NAU_PLL_REF_MIN … #define NAU_PLL_OPTOP_MIN … static const int nau8822_mclk_scaler[] = …; static const struct reg_default nau8822_reg_defaults[] = …; static bool nau8822_readable_reg(struct device *dev, unsigned int reg) { … } static bool nau8822_writeable_reg(struct device *dev, unsigned int reg) { … } static bool nau8822_volatile(struct device *dev, unsigned int reg) { … } /* The EQ parameters get function is to get the 5 band equalizer control. * The regmap raw read can't work here because regmap doesn't provide * value format for value width of 9 bits. Therefore, the driver reads data * from cache and makes value format according to the endianness of * bytes type control element. */ static int nau8822_eq_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } /* The EQ parameters put function is to make configuration of 5 band equalizer * control. These configuration includes central frequency, equalizer gain, * cut-off frequency, bandwidth control, and equalizer path. * The regmap raw write can't work here because regmap doesn't provide * register and value format for register with address 7 bits and value 9 bits. * Therefore, the driver makes value format according to the endianness of * bytes type control element and writes data to codec. */ static int nau8822_eq_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const char * const nau8822_companding[] = …; static const struct soc_enum nau8822_companding_adc_enum = …; static const struct soc_enum nau8822_companding_dac_enum = …; static const char * const nau8822_eqmode[] = …; static const struct soc_enum nau8822_eqmode_enum = …; static const char * const nau8822_alc1[] = …; static const char * const nau8822_alc3[] = …; static const struct soc_enum nau8822_alc_enable_enum = …; static const struct soc_enum nau8822_alc_mode_enum = …; static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1); static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0); static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0); static const DECLARE_TLV_DB_SCALE(pga_boost_tlv, 0, 2000, 0); static const DECLARE_TLV_DB_SCALE(boost_tlv, -1500, 300, 1); static const DECLARE_TLV_DB_SCALE(limiter_tlv, 0, 100, 0); static const struct snd_kcontrol_new nau8822_snd_controls[] = …; /* LMAIN and RMAIN Mixer */ static const struct snd_kcontrol_new nau8822_left_out_mixer[] = …; static const struct snd_kcontrol_new nau8822_right_out_mixer[] = …; /* AUX1 and AUX2 Mixer */ static const struct snd_kcontrol_new nau8822_auxout1_mixer[] = …; static const struct snd_kcontrol_new nau8822_auxout2_mixer[] = …; /* Input PGA */ static const struct snd_kcontrol_new nau8822_left_input_mixer[] = …; static const struct snd_kcontrol_new nau8822_right_input_mixer[] = …; /* Loopback Switch */ static const struct snd_kcontrol_new nau8822_loopback = …; static int check_mclk_select_pll(struct snd_soc_dapm_widget *source, struct snd_soc_dapm_widget *sink) { … } static const struct snd_soc_dapm_widget nau8822_dapm_widgets[] = …; static const struct snd_soc_dapm_route nau8822_dapm_routes[] = …; static int nau8822_calc_pll(unsigned int pll_in, unsigned int fs, struct nau8822_pll *pll_param) { … } static int nau8822_config_clkdiv(struct snd_soc_dai *dai, int div, int rate) { … } static int nau8822_set_pll(struct snd_soc_dai *dai, int pll_id, int source, unsigned int freq_in, unsigned int freq_out) { … } static int nau8822_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir) { … } static int nau8822_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) { … } static int nau8822_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { … } static int nau8822_mute(struct snd_soc_dai *dai, int mute, int direction) { … } static int nau8822_set_bias_level(struct snd_soc_component *component, enum snd_soc_bias_level level) { … } #define NAU8822_RATES … #define NAU8822_FORMATS … static const struct snd_soc_dai_ops nau8822_dai_ops = …; static struct snd_soc_dai_driver nau8822_dai = …; static int nau8822_suspend(struct snd_soc_component *component) { … } static int nau8822_resume(struct snd_soc_component *component) { … } /* * These registers contain an "update" bit - bit 8. This means, for example, * that one can write new DAC digital volume for both channels, but only when * the update bit is set, will also the volume be updated - simultaneously for * both channels. */ static const int update_reg[] = …; static int nau8822_probe(struct snd_soc_component *component) { … } static const struct snd_soc_component_driver soc_component_dev_nau8822 = …; static const struct regmap_config nau8822_regmap_config = …; static int nau8822_i2c_probe(struct i2c_client *i2c) { … } static const struct i2c_device_id nau8822_i2c_id[] = …; MODULE_DEVICE_TABLE(i2c, nau8822_i2c_id); #ifdef CONFIG_OF static const struct of_device_id nau8822_of_match[] = …; MODULE_DEVICE_TABLE(of, nau8822_of_match); #endif static struct i2c_driver nau8822_i2c_driver = …; module_i2c_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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