linux/sound/soc/codecs/pcm186x.h

// SPDX-License-Identifier: GPL-2.0
/*
 * Texas Instruments PCM186x Universal Audio ADC
 *
 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com
 *	Andreas Dannenberg <[email protected]>
 *	Andrew F. Davis <[email protected]>
 */

#ifndef _PCM186X_H_
#define _PCM186X_H_

#include <linux/pm.h>
#include <linux/regmap.h>

enum pcm186x_type {};

#define PCM186X_RATES
#define PCM186X_FORMATS

#define PCM186X_PAGE_LEN
#define PCM186X_PAGE_BASE(n)

/* The page selection register address is the same on all pages */
#define PCM186X_PAGE

/* Register Definitions - Page 0 */
#define PCM186X_PGA_VAL_CH1_L
#define PCM186X_PGA_VAL_CH1_R
#define PCM186X_PGA_VAL_CH2_L
#define PCM186X_PGA_VAL_CH2_R
#define PCM186X_PGA_CTRL
#define PCM186X_ADC1_INPUT_SEL_L
#define PCM186X_ADC1_INPUT_SEL_R
#define PCM186X_ADC2_INPUT_SEL_L
#define PCM186X_ADC2_INPUT_SEL_R
#define PCM186X_AUXADC_INPUT_SEL
#define PCM186X_PCM_CFG
#define PCM186X_TDM_TX_SEL
#define PCM186X_TDM_TX_OFFSET
#define PCM186X_TDM_RX_OFFSET
#define PCM186X_DPGA_VAL_CH1_L
#define PCM186X_GPIO1_0_CTRL
#define PCM186X_GPIO3_2_CTRL
#define PCM186X_GPIO1_0_DIR_CTRL
#define PCM186X_GPIO3_2_DIR_CTRL
#define PCM186X_GPIO_IN_OUT
#define PCM186X_GPIO_PULL_CTRL
#define PCM186X_DPGA_VAL_CH1_R
#define PCM186X_DPGA_VAL_CH2_L
#define PCM186X_DPGA_VAL_CH2_R
#define PCM186X_DPGA_GAIN_CTRL
#define PCM186X_DPGA_MIC_CTRL
#define PCM186X_DIN_RESAMP_CTRL
#define PCM186X_CLK_CTRL
#define PCM186X_DSP1_CLK_DIV
#define PCM186X_DSP2_CLK_DIV
#define PCM186X_ADC_CLK_DIV
#define PCM186X_PLL_SCK_DIV
#define PCM186X_BCK_DIV
#define PCM186X_LRK_DIV
#define PCM186X_PLL_CTRL
#define PCM186X_PLL_P_DIV
#define PCM186X_PLL_R_DIV
#define PCM186X_PLL_J_DIV
#define PCM186X_PLL_D_DIV_LSB
#define PCM186X_PLL_D_DIV_MSB
#define PCM186X_SIGDET_MODE
#define PCM186X_SIGDET_MASK
#define PCM186X_SIGDET_STAT
#define PCM186X_SIGDET_LOSS_TIME
#define PCM186X_SIGDET_SCAN_TIME
#define PCM186X_SIGDET_INT_INTVL
#define PCM186X_SIGDET_DC_REF_CH1_L
#define PCM186X_SIGDET_DC_DIFF_CH1_L
#define PCM186X_SIGDET_DC_LEV_CH1_L
#define PCM186X_SIGDET_DC_REF_CH1_R
#define PCM186X_SIGDET_DC_DIFF_CH1_R
#define PCM186X_SIGDET_DC_LEV_CH1_R
#define PCM186X_SIGDET_DC_REF_CH2_L
#define PCM186X_SIGDET_DC_DIFF_CH2_L
#define PCM186X_SIGDET_DC_LEV_CH2_L
#define PCM186X_SIGDET_DC_REF_CH2_R
#define PCM186X_SIGDET_DC_DIFF_CH2_R
#define PCM186X_SIGDET_DC_LEV_CH2_R
#define PCM186X_SIGDET_DC_REF_CH3_L
#define PCM186X_SIGDET_DC_DIFF_CH3_L
#define PCM186X_SIGDET_DC_LEV_CH3_L
#define PCM186X_SIGDET_DC_REF_CH3_R
#define PCM186X_SIGDET_DC_DIFF_CH3_R
#define PCM186X_SIGDET_DC_LEV_CH3_R
#define PCM186X_SIGDET_DC_REF_CH4_L
#define PCM186X_SIGDET_DC_DIFF_CH4_L
#define PCM186X_SIGDET_DC_LEV_CH4_L
#define PCM186X_SIGDET_DC_REF_CH4_R
#define PCM186X_SIGDET_DC_DIFF_CH4_R
#define PCM186X_SIGDET_DC_LEV_CH4_R
#define PCM186X_AUXADC_DATA_CTRL
#define PCM186X_AUXADC_DATA_LSB
#define PCM186X_AUXADC_DATA_MSB
#define PCM186X_INT_ENABLE
#define PCM186X_INT_FLAG
#define PCM186X_INT_POL_WIDTH
#define PCM186X_POWER_CTRL
#define PCM186X_FILTER_MUTE_CTRL
#define PCM186X_DEVICE_STATUS
#define PCM186X_FSAMPLE_STATUS
#define PCM186X_DIV_STATUS
#define PCM186X_CLK_STATUS
#define PCM186X_SUPPLY_STATUS

/* Register Definitions - Page 1 */
#define PCM186X_MMAP_STAT_CTRL
#define PCM186X_MMAP_ADDRESS
#define PCM186X_MEM_WDATA0
#define PCM186X_MEM_WDATA1
#define PCM186X_MEM_WDATA2
#define PCM186X_MEM_WDATA3
#define PCM186X_MEM_RDATA0
#define PCM186X_MEM_RDATA1
#define PCM186X_MEM_RDATA2
#define PCM186X_MEM_RDATA3

/* Register Definitions - Page 3 */
#define PCM186X_OSC_PWR_DOWN_CTRL
#define PCM186X_MIC_BIAS_CTRL

/* Register Definitions - Page 253 */
#define PCM186X_CURR_TRIM_CTRL

#define PCM186X_MAX_REGISTER

/* PCM186X_PAGE */
#define PCM186X_RESET

/* PCM186X_ADCX_INPUT_SEL_X */
#define PCM186X_ADC_INPUT_SEL_POL
#define PCM186X_ADC_INPUT_SEL_MASK

/* PCM186X_PCM_CFG */
#define PCM186X_PCM_CFG_RX_WLEN_MASK
#define PCM186X_PCM_CFG_RX_WLEN_SHIFT
#define PCM186X_PCM_CFG_RX_WLEN_32
#define PCM186X_PCM_CFG_RX_WLEN_24
#define PCM186X_PCM_CFG_RX_WLEN_20
#define PCM186X_PCM_CFG_RX_WLEN_16
#define PCM186X_PCM_CFG_TDM_LRCK_MODE
#define PCM186X_PCM_CFG_TX_WLEN_MASK
#define PCM186X_PCM_CFG_TX_WLEN_SHIFT
#define PCM186X_PCM_CFG_TX_WLEN_32
#define PCM186X_PCM_CFG_TX_WLEN_24
#define PCM186X_PCM_CFG_TX_WLEN_20
#define PCM186X_PCM_CFG_TX_WLEN_16
#define PCM186X_PCM_CFG_FMT_MASK
#define PCM186X_PCM_CFG_FMT_SHIFT
#define PCM186X_PCM_CFG_FMT_I2S
#define PCM186X_PCM_CFG_FMT_LEFTJ
#define PCM186X_PCM_CFG_FMT_RIGHTJ
#define PCM186X_PCM_CFG_FMT_TDM

/* PCM186X_TDM_TX_SEL */
#define PCM186X_TDM_TX_SEL_2CH
#define PCM186X_TDM_TX_SEL_4CH
#define PCM186X_TDM_TX_SEL_6CH
#define PCM186X_TDM_TX_SEL_MASK

/* PCM186X_CLK_CTRL */
#define PCM186X_CLK_CTRL_SCK_XI_SEL1
#define PCM186X_CLK_CTRL_SCK_XI_SEL0
#define PCM186X_CLK_CTRL_SCK_SRC_PLL
#define PCM186X_CLK_CTRL_MST_MODE
#define PCM186X_CLK_CTRL_ADC_SRC_PLL
#define PCM186X_CLK_CTRL_DSP2_SRC_PLL
#define PCM186X_CLK_CTRL_DSP1_SRC_PLL
#define PCM186X_CLK_CTRL_CLKDET_EN

/* PCM186X_PLL_CTRL */
#define PCM186X_PLL_CTRL_LOCK
#define PCM186X_PLL_CTRL_REF_SEL
#define PCM186X_PLL_CTRL_EN

/* PCM186X_POWER_CTRL */
#define PCM186X_PWR_CTRL_PWRDN
#define PCM186X_PWR_CTRL_SLEEP
#define PCM186X_PWR_CTRL_STBY

/* PCM186X_CLK_STATUS */
#define PCM186X_CLK_STATUS_LRCKHLT
#define PCM186X_CLK_STATUS_BCKHLT
#define PCM186X_CLK_STATUS_SCKHLT
#define PCM186X_CLK_STATUS_LRCKERR
#define PCM186X_CLK_STATUS_BCKERR
#define PCM186X_CLK_STATUS_SCKERR

/* PCM186X_SUPPLY_STATUS */
#define PCM186X_SUPPLY_STATUS_DVDD
#define PCM186X_SUPPLY_STATUS_AVDD
#define PCM186X_SUPPLY_STATUS_LDO

/* PCM186X_MMAP_STAT_CTRL */
#define PCM186X_MMAP_STAT_DONE
#define PCM186X_MMAP_STAT_BUSY
#define PCM186X_MMAP_STAT_R_REQ
#define PCM186X_MMAP_STAT_W_REQ

extern const struct regmap_config pcm186x_regmap;

int pcm186x_probe(struct device *dev, enum pcm186x_type type, int irq,
		  struct regmap *regmap);

#endif /* _PCM186X_H_ */