/* SPDX-License-Identifier: GPL-2.0 */ /* * rt1308.h -- RT1308 ALSA SoC amplifier component driver * * Copyright 2019 Realtek Semiconductor Corp. * Author: Derek Fang <[email protected]> * */ #ifndef _RT1308_H_ #define _RT1308_H_ #define RT1308_DEVICE_ID_NUM … #define RT1308_RESET … #define RT1308_RESET_N … #define RT1308_CLK_GATING … #define RT1308_PLL_1 … #define RT1308_PLL_2 … #define RT1308_PLL_INT … #define RT1308_CLK_1 … #define RT1308_DATA_PATH … #define RT1308_CLK_2 … #define RT1308_SIL_DET … #define RT1308_CLK_DET … #define RT1308_DC_DET … #define RT1308_DC_DET_THRES … #define RT1308_DAC_SET … #define RT1308_SRC_SET … #define RT1308_DAC_BUF … #define RT1308_ADC_SET … #define RT1308_ADC_SET_INT … #define RT1308_I2S_SET_1 … #define RT1308_I2S_SET_2 … #define RT1308_I2C_I2S_SDW_SET … #define RT1308_SDW_REG_RW … #define RT1308_SDW_REG_RDATA … #define RT1308_IV_SENSE … #define RT1308_I2S_TX_DAC_SET … #define RT1308_AD_FILTER_SET … #define RT1308_DC_CAL_1 … #define RT1308_DC_CAL_2 … #define RT1308_DC_CAL_L_OFFSET … #define RT1308_DC_CAL_R_OFFSET … #define RT1308_PVDD_OFFSET_CTL … #define RT1308_PVDD_OFFSET_L … #define RT1308_PVDD_OFFSET_R … #define RT1308_PVDD_OFFSET_PBTL … #define RT1308_PVDD_OFFSET_PVDD … #define RT1308_CAL_OFFSET_DAC_PBTL … #define RT1308_CAL_OFFSET_DAC_L … #define RT1308_CAL_OFFSET_DAC_R … #define RT1308_CAL_OFFSET_PWM_L … #define RT1308_CAL_OFFSET_PWM_R … #define RT1308_CAL_PWM_VOS_ADC_L … #define RT1308_CAL_PWM_VOS_ADC_R … #define RT1308_CLASS_D_SET_1 … #define RT1308_CLASS_D_SET_2 … #define RT1308_POWER … #define RT1308_LDO … #define RT1308_VREF … #define RT1308_MBIAS … #define RT1308_POWER_STATUS … #define RT1308_POWER_INT … #define RT1308_SINE_TONE_GEN_1 … #define RT1308_SINE_TONE_GEN_2 … #define RT1308_BQ_SET … #define RT1308_BQ_PARA_UPDATE … #define RT1308_BQ_PRE_VOL_L … #define RT1308_BQ_PRE_VOL_R … #define RT1308_BQ_POST_VOL_L … #define RT1308_BQ_POST_VOL_R … #define RT1308_BQ1_L_H0 … #define RT1308_BQ1_L_B1 … #define RT1308_BQ1_L_B2 … #define RT1308_BQ1_L_A1 … #define RT1308_BQ1_L_A2 … #define RT1308_BQ1_R_H0 … #define RT1308_BQ1_R_B1 … #define RT1308_BQ1_R_B2 … #define RT1308_BQ1_R_A1 … #define RT1308_BQ1_R_A2 … #define RT1308_BQ2_L_H0 … #define RT1308_BQ2_L_B1 … #define RT1308_BQ2_L_B2 … #define RT1308_BQ2_L_A1 … #define RT1308_BQ2_L_A2 … #define RT1308_BQ2_R_H0 … #define RT1308_BQ2_R_B1 … #define RT1308_BQ2_R_B2 … #define RT1308_BQ2_R_A1 … #define RT1308_BQ2_R_A2 … #define RT1308_VEN_DEV_ID … #define RT1308_VERSION_ID … #define RT1308_SPK_BOUND … #define RT1308_BQ1_EQ_L_1 … #define RT1308_BQ1_EQ_L_2 … #define RT1308_BQ1_EQ_L_3 … #define RT1308_BQ1_EQ_R_1 … #define RT1308_BQ1_EQ_R_2 … #define RT1308_BQ1_EQ_R_3 … #define RT1308_BQ2_EQ_L_1 … #define RT1308_BQ2_EQ_L_2 … #define RT1308_BQ2_EQ_L_3 … #define RT1308_BQ2_EQ_R_1 … #define RT1308_BQ2_EQ_R_2 … #define RT1308_BQ2_EQ_R_3 … #define RT1308_EFUSE_1 … #define RT1308_EFUSE_2 … #define RT1308_EFUSE_PROG_PVDD_L … #define RT1308_EFUSE_PROG_PVDD_R … #define RT1308_EFUSE_PROG_R0_L … #define RT1308_EFUSE_PROG_R0_R … #define RT1308_EFUSE_PROG_DEV … #define RT1308_EFUSE_READ_PVDD_L … #define RT1308_EFUSE_READ_PVDD_R … #define RT1308_EFUSE_READ_PVDD_PTBL … #define RT1308_EFUSE_READ_DEV … #define RT1308_EFUSE_READ_R0 … #define RT1308_EFUSE_READ_ADC_L … #define RT1308_EFUSE_READ_ADC_R … #define RT1308_EFUSE_READ_ADC_PBTL … #define RT1308_EFUSE_RESERVE … #define RT1308_PADS_1 … #define RT1308_PADS_2 … #define RT1308_TEST_MODE … #define RT1308_TEST_1 … #define RT1308_TEST_2 … #define RT1308_TEST_3 … #define RT1308_TEST_4 … #define RT1308_EFUSE_DATA_0_MSB … #define RT1308_EFUSE_DATA_0_LSB … #define RT1308_EFUSE_DATA_1_MSB … #define RT1308_EFUSE_DATA_1_LSB … #define RT1308_EFUSE_DATA_2_MSB … #define RT1308_EFUSE_DATA_2_LSB … #define RT1308_EFUSE_DATA_3_MSB … #define RT1308_EFUSE_DATA_3_LSB … #define RT1308_EFUSE_DATA_TEST_MSB … #define RT1308_EFUSE_DATA_TEST_LSB … #define RT1308_EFUSE_STATUS_1 … #define RT1308_EFUSE_STATUS_2 … #define RT1308_TCON_1 … #define RT1308_TCON_2 … #define RT1308_DUMMY_REG … #define RT1308_MAX_REG … /* PLL1 M/N/K Code-1 (0x03) */ #define RT1308_PLL1_K_SFT … #define RT1308_PLL1_K_MASK … #define RT1308_PLL1_M_BYPASS_MASK … #define RT1308_PLL1_M_BYPASS_SFT … #define RT1308_PLL1_M_BYPASS … #define RT1308_PLL1_M_MASK … #define RT1308_PLL1_M_SFT … #define RT1308_PLL1_N_MASK … #define RT1308_PLL1_N_SFT … /* CLOCK-1 (0x06) */ #define RT1308_DIV_FS_SYS_MASK … #define RT1308_DIV_FS_SYS_SFT … #define RT1308_SEL_FS_SYS_MASK … #define RT1308_SEL_FS_SYS_SFT … #define RT1308_SEL_FS_SYS_SRC_MCLK … #define RT1308_SEL_FS_SYS_SRC_BCLK … #define RT1308_SEL_FS_SYS_SRC_PLL … #define RT1308_SEL_FS_SYS_SRC_RCCLK … /* CLOCK-2 (0x08) */ #define RT1308_DIV_PRE_PLL_MASK … #define RT1308_DIV_PRE_PLL_SFT … #define RT1308_SEL_PLL_SRC_MASK … #define RT1308_SEL_PLL_SRC_SFT … #define RT1308_SEL_PLL_SRC_MCLK … #define RT1308_SEL_PLL_SRC_BCLK … #define RT1308_SEL_PLL_SRC_RCCLK … /* Clock Detect (0x0a) */ #define RT1308_MCLK_DET_EN_MASK … #define RT1308_MCLK_DET_EN_SFT … #define RT1308_MCLK_DET_EN … #define RT1308_BCLK_DET_EN_MASK … #define RT1308_BCLK_DET_EN_SFT … #define RT1308_BCLK_DET_EN … /* DAC Setting (0x10) */ #define RT1308_DVOL_MUTE_R_EN_SFT … #define RT1308_DVOL_MUTE_L_EN_SFT … /* I2S Setting-1 (0x15) */ #define RT1308_I2S_DF_SEL_MASK … #define RT1308_I2S_DF_SEL_SFT … #define RT1308_I2S_DF_SEL_I2S … #define RT1308_I2S_DF_SEL_LEFT … #define RT1308_I2S_DF_SEL_PCM_A … #define RT1308_I2S_DF_SEL_PCM_B … #define RT1308_I2S_DL_RX_SEL_MASK … #define RT1308_I2S_DL_RX_SEL_SFT … #define RT1308_I2S_DL_RX_SEL_16B … #define RT1308_I2S_DL_RX_SEL_20B … #define RT1308_I2S_DL_RX_SEL_24B … #define RT1308_I2S_DL_RX_SEL_32B … #define RT1308_I2S_DL_RX_SEL_8B … #define RT1308_I2S_DL_TX_SEL_MASK … #define RT1308_I2S_DL_TX_SEL_SFT … #define RT1308_I2S_DL_TX_SEL_16B … #define RT1308_I2S_DL_TX_SEL_20B … #define RT1308_I2S_DL_TX_SEL_24B … #define RT1308_I2S_DL_TX_SEL_32B … #define RT1308_I2S_DL_TX_SEL_8B … /* I2S Setting-2 (0x16) */ #define RT1308_I2S_DL_SEL_MASK … #define RT1308_I2S_DL_SEL_SFT … #define RT1308_I2S_DL_SEL_16B … #define RT1308_I2S_DL_SEL_20B … #define RT1308_I2S_DL_SEL_24B … #define RT1308_I2S_DL_SEL_32B … #define RT1308_I2S_DL_SEL_8B … #define RT1308_I2S_BCLK_MASK … #define RT1308_I2S_BCLK_SFT … #define RT1308_I2S_BCLK_NORMAL … #define RT1308_I2S_BCLK_INV … /* Power Control-1 (0x32) */ #define RT1308_POW_MBIAS20U … #define RT1308_POW_MBIAS20U_BIT … #define RT1308_POW_ALDO … #define RT1308_POW_ALDO_BIT … #define RT1308_POW_DBG … #define RT1308_POW_DBG_BIT … #define RT1308_POW_DACL … #define RT1308_POW_DACL_BIT … #define RT1308_POW_DAC1 … #define RT1308_POW_DAC1_BIT … #define RT1308_POW_CLK25M … #define RT1308_POW_CLK25M_BIT … #define RT1308_POW_ADC_R … #define RT1308_POW_ADC_R_BIT … #define RT1308_POW_ADC_L … #define RT1308_POW_ADC_L_BIT … #define RT1308_POW_DLDO … #define RT1308_POW_DLDO_BIT … #define RT1308_POW_VREF … #define RT1308_POW_VREF_BIT … #define RT1308_POW_MIXER_R … #define RT1308_POW_MIXER_R_BIT … #define RT1308_POW_MIXER_L … #define RT1308_POW_MIXER_L_BIT … #define RT1308_POW_MBIAS4U … #define RT1308_POW_MBIAS4U_BIT … #define RT1308_POW_PLL2_LDO_EN … #define RT1308_POW_PLL2_LDO_EN_BIT … #define RT1308_POW_PLL2B_EN … #define RT1308_POW_PLL2B_EN_BIT … #define RT1308_POW_PLL2F_EN … #define RT1308_POW_PLL2F_EN_BIT … #define RT1308_POW_PLL2F2_EN … #define RT1308_POW_PLL2F2_EN_BIT … #define RT1308_POW_PLL2B2_EN … #define RT1308_POW_PLL2B2_EN_BIT … /* Power Control-2 (0x36) */ #define RT1308_POW_PDB_SRC_BIT … #define RT1308_POW_PDB_MN_BIT … #define RT1308_POW_PDB_REG_BIT … /* System Clock Source */ enum { … }; /* PLL Source */ enum { … }; enum { … }; enum rt1308_hw_ver { … }; #endif /* end of _RT1308_H_ */
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