/* SPDX-License-Identifier: GPL-2.0-only */ /* * rt5660.h -- RT5660 ALSA SoC audio driver * * Copyright 2016 Realtek Semiconductor Corp. * Author: Oder Chiou <[email protected]> */ #ifndef _RT5660_H #define _RT5660_H #include <linux/clk.h> #include <sound/rt5660.h> /* Info */ #define RT5660_RESET … #define RT5660_VENDOR_ID … #define RT5660_VENDOR_ID1 … #define RT5660_VENDOR_ID2 … /* I/O - Output */ #define RT5660_SPK_VOL … #define RT5660_LOUT_VOL … /* I/O - Input */ #define RT5660_IN1_IN2 … #define RT5660_IN3_IN4 … /* I/O - ADC/DAC/DMIC */ #define RT5660_DAC1_DIG_VOL … #define RT5660_STO1_ADC_DIG_VOL … #define RT5660_ADC_BST_VOL1 … /* Mixer - D-D */ #define RT5660_STO1_ADC_MIXER … #define RT5660_AD_DA_MIXER … #define RT5660_STO_DAC_MIXER … #define RT5660_DIG_INF1_DATA … /* Mixer - ADC */ #define RT5660_REC_L1_MIXER … #define RT5660_REC_L2_MIXER … #define RT5660_REC_R1_MIXER … #define RT5660_REC_R2_MIXER … /* Mixer - DAC */ #define RT5660_LOUT_MIXER … #define RT5660_SPK_MIXER … #define RT5660_SPO_MIXER … #define RT5660_SPO_CLSD_RATIO … #define RT5660_OUT_L_GAIN1 … #define RT5660_OUT_L_GAIN2 … #define RT5660_OUT_L1_MIXER … #define RT5660_OUT_R_GAIN1 … #define RT5660_OUT_R_GAIN2 … #define RT5660_OUT_R1_MIXER … /* Power */ #define RT5660_PWR_DIG1 … #define RT5660_PWR_DIG2 … #define RT5660_PWR_ANLG1 … #define RT5660_PWR_ANLG2 … #define RT5660_PWR_MIXER … #define RT5660_PWR_VOL … /* Private Register Control */ #define RT5660_PRIV_INDEX … #define RT5660_PRIV_DATA … /* Format - ADC/DAC */ #define RT5660_I2S1_SDP … #define RT5660_ADDA_CLK1 … #define RT5660_ADDA_CLK2 … #define RT5660_DMIC_CTRL1 … /* Function - Analog */ #define RT5660_GLB_CLK … #define RT5660_PLL_CTRL1 … #define RT5660_PLL_CTRL2 … #define RT5660_CLSD_AMP_OC_CTRL … #define RT5660_CLSD_AMP_CTRL … #define RT5660_LOUT_AMP_CTRL … #define RT5660_SPK_AMP_SPKVDD … #define RT5660_MICBIAS … #define RT5660_CLSD_OUT_CTRL1 … #define RT5660_CLSD_OUT_CTRL2 … #define RT5660_DIPOLE_MIC_CTRL1 … #define RT5660_DIPOLE_MIC_CTRL2 … #define RT5660_DIPOLE_MIC_CTRL3 … #define RT5660_DIPOLE_MIC_CTRL4 … #define RT5660_DIPOLE_MIC_CTRL5 … #define RT5660_DIPOLE_MIC_CTRL6 … #define RT5660_DIPOLE_MIC_CTRL7 … #define RT5660_DIPOLE_MIC_CTRL8 … #define RT5660_DIPOLE_MIC_CTRL9 … #define RT5660_DIPOLE_MIC_CTRL10 … #define RT5660_DIPOLE_MIC_CTRL11 … #define RT5660_DIPOLE_MIC_CTRL12 … /* Function - Digital */ #define RT5660_EQ_CTRL1 … #define RT5660_EQ_CTRL2 … #define RT5660_DRC_AGC_CTRL1 … #define RT5660_DRC_AGC_CTRL2 … #define RT5660_DRC_AGC_CTRL3 … #define RT5660_DRC_AGC_CTRL4 … #define RT5660_DRC_AGC_CTRL5 … #define RT5660_JD_CTRL … #define RT5660_IRQ_CTRL1 … #define RT5660_IRQ_CTRL2 … #define RT5660_INT_IRQ_ST … #define RT5660_GPIO_CTRL1 … #define RT5660_GPIO_CTRL2 … #define RT5660_WIND_FILTER_CTRL1 … #define RT5660_SV_ZCD1 … #define RT5660_SV_ZCD2 … #define RT5660_DRC1_LM_CTRL1 … #define RT5660_DRC1_LM_CTRL2 … #define RT5660_DRC2_LM_CTRL1 … #define RT5660_DRC2_LM_CTRL2 … #define RT5660_MULTI_DRC_CTRL … #define RT5660_DRC2_CTRL1 … #define RT5660_DRC2_CTRL2 … #define RT5660_DRC2_CTRL3 … #define RT5660_DRC2_CTRL4 … #define RT5660_DRC2_CTRL5 … #define RT5660_ALC_PGA_CTRL1 … #define RT5660_ALC_PGA_CTRL2 … #define RT5660_ALC_PGA_CTRL3 … #define RT5660_ALC_PGA_CTRL4 … #define RT5660_ALC_PGA_CTRL5 … #define RT5660_ALC_PGA_CTRL6 … #define RT5660_ALC_PGA_CTRL7 … /* General Control */ #define RT5660_GEN_CTRL1 … #define RT5660_GEN_CTRL2 … #define RT5660_GEN_CTRL3 … /* Index of Codec Private Register definition */ #define RT5660_CHOP_DAC_ADC … /* Global Definition */ #define RT5660_L_MUTE … #define RT5660_L_MUTE_SFT … #define RT5660_VOL_L_MUTE … #define RT5660_VOL_L_SFT … #define RT5660_R_MUTE … #define RT5660_R_MUTE_SFT … #define RT5660_VOL_R_MUTE … #define RT5660_VOL_R_SFT … #define RT5660_L_VOL_MASK … #define RT5660_L_VOL_SFT … #define RT5660_R_VOL_MASK … #define RT5660_R_VOL_SFT … /* IN1 and IN2 Control (0x0d) */ #define RT5660_IN_DF1 … #define RT5660_IN_SFT1 … #define RT5660_BST_MASK1 … #define RT5660_BST_SFT1 … #define RT5660_IN_DF2 … #define RT5660_IN_SFT2 … #define RT5660_BST_MASK2 … #define RT5660_BST_SFT2 … /* IN3 and IN4 Control (0x0e) */ #define RT5660_IN_DF3 … #define RT5660_IN_SFT3 … #define RT5660_BST_MASK3 … #define RT5660_BST_SFT3 … #define RT5660_IN_DF4 … #define RT5660_IN_SFT4 … #define RT5660_BST_MASK4 … #define RT5660_BST_SFT4 … /* DAC1 Digital Volume (0x19) */ #define RT5660_DAC_L1_VOL_MASK … #define RT5660_DAC_L1_VOL_SFT … #define RT5660_DAC_R1_VOL_MASK … #define RT5660_DAC_R1_VOL_SFT … /* ADC Digital Volume Control (0x1c) */ #define RT5660_ADC_L_VOL_MASK … #define RT5660_ADC_L_VOL_SFT … #define RT5660_ADC_R_VOL_MASK … #define RT5660_ADC_R_VOL_SFT … /* ADC Boost Volume Control (0x1e) */ #define RT5660_STO1_ADC_L_BST_MASK … #define RT5660_STO1_ADC_L_BST_SFT … #define RT5660_STO1_ADC_R_BST_MASK … #define RT5660_STO1_ADC_R_BST_SFT … /* Stereo ADC Mixer Control (0x27) */ #define RT5660_M_ADC_L1 … #define RT5660_M_ADC_L1_SFT … #define RT5660_M_ADC_L2 … #define RT5660_M_ADC_L2_SFT … #define RT5660_M_ADC_R1 … #define RT5660_M_ADC_R1_SFT … #define RT5660_M_ADC_R2 … #define RT5660_M_ADC_R2_SFT … /* ADC Mixer to DAC Mixer Control (0x29) */ #define RT5660_M_ADCMIX_L … #define RT5660_M_ADCMIX_L_SFT … #define RT5660_M_DAC1_L … #define RT5660_M_DAC1_L_SFT … #define RT5660_M_ADCMIX_R … #define RT5660_M_ADCMIX_R_SFT … #define RT5660_M_DAC1_R … #define RT5660_M_DAC1_R_SFT … /* Stereo DAC Mixer Control (0x2a) */ #define RT5660_M_DAC_L1 … #define RT5660_M_DAC_L1_SFT … #define RT5660_DAC_L1_STO_L_VOL_MASK … #define RT5660_DAC_L1_STO_L_VOL_SFT … #define RT5660_M_DAC_R1_STO_L … #define RT5660_M_DAC_R1_STO_L_SFT … #define RT5660_DAC_R1_STO_L_VOL_MASK … #define RT5660_DAC_R1_STO_L_VOL_SFT … #define RT5660_M_DAC_R1 … #define RT5660_M_DAC_R1_SFT … #define RT5660_DAC_R1_STO_R_VOL_MASK … #define RT5660_DAC_R1_STO_R_VOL_SFT … #define RT5660_M_DAC_L1_STO_R … #define RT5660_M_DAC_L1_STO_R_SFT … #define RT5660_DAC_L1_STO_R_VOL_MASK … #define RT5660_DAC_L1_STO_R_VOL_SFT … /* Digital Interface Data Control (0x2f) */ #define RT5660_IF1_DAC_IN_SEL … #define RT5660_IF1_DAC_IN_SFT … #define RT5660_IF1_ADC_IN_SEL … #define RT5660_IF1_ADC_IN_SFT … /* REC Left Mixer Control 1 (0x3b) */ #define RT5660_G_BST3_RM_L_MASK … #define RT5660_G_BST3_RM_L_SFT … #define RT5660_G_BST2_RM_L_MASK … #define RT5660_G_BST2_RM_L_SFT … /* REC Left Mixer Control 2 (0x3c) */ #define RT5660_G_BST1_RM_L_MASK … #define RT5660_G_BST1_RM_L_SFT … #define RT5660_G_OM_L_RM_L_MASK … #define RT5660_G_OM_L_RM_L_SFT … #define RT5660_M_BST3_RM_L … #define RT5660_M_BST3_RM_L_SFT … #define RT5660_M_BST2_RM_L … #define RT5660_M_BST2_RM_L_SFT … #define RT5660_M_BST1_RM_L … #define RT5660_M_BST1_RM_L_SFT … #define RT5660_M_OM_L_RM_L … #define RT5660_M_OM_L_RM_L_SFT … /* REC Right Mixer Control 1 (0x3d) */ #define RT5660_G_BST3_RM_R_MASK … #define RT5660_G_BST3_RM_R_SFT … #define RT5660_G_BST2_RM_R_MASK … #define RT5660_G_BST2_RM_R_SFT … /* REC Right Mixer Control 2 (0x3e) */ #define RT5660_G_BST1_RM_R_MASK … #define RT5660_G_BST1_RM_R_SFT … #define RT5660_G_OM_R_RM_R_MASK … #define RT5660_G_OM_R_RM_R_SFT … #define RT5660_M_BST3_RM_R … #define RT5660_M_BST3_RM_R_SFT … #define RT5660_M_BST2_RM_R … #define RT5660_M_BST2_RM_R_SFT … #define RT5660_M_BST1_RM_R … #define RT5660_M_BST1_RM_R_SFT … #define RT5660_M_OM_R_RM_R … #define RT5660_M_OM_R_RM_R_SFT … /* LOUTMIX Control (0x45) */ #define RT5660_M_DAC1_LM … #define RT5660_M_DAC1_LM_SFT … #define RT5660_M_LOVOL_M … #define RT5660_M_LOVOL_LM_SFT … /* SPK Mixer Control (0x46) */ #define RT5660_G_BST3_SM_MASK … #define RT5660_G_BST3_SM_SFT … #define RT5660_G_BST1_SM_MASK … #define RT5660_G_BST1_SM_SFT … #define RT5660_G_DACl_SM_MASK … #define RT5660_G_DACl_SM_SFT … #define RT5660_G_DACR_SM_MASK … #define RT5660_G_DACR_SM_SFT … #define RT5660_G_OM_L_SM_MASK … #define RT5660_G_OM_L_SM_SFT … #define RT5660_M_DACR_SM … #define RT5660_M_DACR_SM_SFT … #define RT5660_M_BST1_SM … #define RT5660_M_BST1_SM_SFT … #define RT5660_M_BST3_SM … #define RT5660_M_BST3_SM_SFT … #define RT5660_M_DACL_SM … #define RT5660_M_DACL_SM_SFT … #define RT5660_M_OM_L_SM … #define RT5660_M_OM_L_SM_SFT … /* SPOMIX Control (0x48) */ #define RT5660_M_DAC_R_SPM … #define RT5660_M_DAC_R_SPM_SFT … #define RT5660_M_DAC_L_SPM … #define RT5660_M_DAC_L_SPM_SFT … #define RT5660_M_SV_SPM … #define RT5660_M_SV_SPM_SFT … #define RT5660_M_BST1_SPM … #define RT5660_M_BST1_SPM_SFT … /* Output Left Mixer Control 1 (0x4d) */ #define RT5660_G_BST3_OM_L_MASK … #define RT5660_G_BST3_OM_L_SFT … #define RT5660_G_BST2_OM_L_MASK … #define RT5660_G_BST2_OM_L_SFT … #define RT5660_G_BST1_OM_L_MASK … #define RT5660_G_BST1_OM_L_SFT … #define RT5660_G_RM_L_OM_L_MASK … #define RT5660_G_RM_L_OM_L_SFT … /* Output Left Mixer Control 2 (0x4e) */ #define RT5660_G_DAC_R1_OM_L_MASK … #define RT5660_G_DAC_R1_OM_L_SFT … #define RT5660_G_DAC_L1_OM_L_MASK … #define RT5660_G_DAC_L1_OM_L_SFT … /* Output Left Mixer Control 3 (0x4f) */ #define RT5660_M_BST3_OM_L … #define RT5660_M_BST3_OM_L_SFT … #define RT5660_M_BST2_OM_L … #define RT5660_M_BST2_OM_L_SFT … #define RT5660_M_BST1_OM_L … #define RT5660_M_BST1_OM_L_SFT … #define RT5660_M_RM_L_OM_L … #define RT5660_M_RM_L_OM_L_SFT … #define RT5660_M_DAC_R_OM_L … #define RT5660_M_DAC_R_OM_L_SFT … #define RT5660_M_DAC_L_OM_L … #define RT5660_M_DAC_L_OM_L_SFT … /* Output Right Mixer Control 1 (0x50) */ #define RT5660_G_BST2_OM_R_MASK … #define RT5660_G_BST2_OM_R_SFT … #define RT5660_G_BST1_OM_R_MASK … #define RT5660_G_BST1_OM_R_SFT … #define RT5660_G_RM_R_OM_R_MASK … #define RT5660_G_RM_R_OM_R_SFT … /* Output Right Mixer Control 2 (0x51) */ #define RT5660_G_DAC_L_OM_R_MASK … #define RT5660_G_DAC_L_OM_R_SFT … #define RT5660_G_DAC_R_OM_R_MASK … #define RT5660_G_DAC_R_OM_R_SFT … /* Output Right Mixer Control 3 (0x52) */ #define RT5660_M_BST2_OM_R … #define RT5660_M_BST2_OM_R_SFT … #define RT5660_M_BST1_OM_R … #define RT5660_M_BST1_OM_R_SFT … #define RT5660_M_RM_R_OM_R … #define RT5660_M_RM_R_OM_R_SFT … #define RT5660_M_DAC_L_OM_R … #define RT5660_M_DAC_L_OM_R_SFT … #define RT5660_M_DAC_R_OM_R … #define RT5660_M_DAC_R_OM_R_SFT … /* Power Management for Digital 1 (0x61) */ #define RT5660_PWR_I2S1 … #define RT5660_PWR_I2S1_BIT … #define RT5660_PWR_DAC_L1 … #define RT5660_PWR_DAC_L1_BIT … #define RT5660_PWR_DAC_R1 … #define RT5660_PWR_DAC_R1_BIT … #define RT5660_PWR_ADC_L … #define RT5660_PWR_ADC_L_BIT … #define RT5660_PWR_ADC_R … #define RT5660_PWR_ADC_R_BIT … #define RT5660_PWR_CLS_D … #define RT5660_PWR_CLS_D_BIT … /* Power Management for Digital 2 (0x62) */ #define RT5660_PWR_ADC_S1F … #define RT5660_PWR_ADC_S1F_BIT … #define RT5660_PWR_DAC_S1F … #define RT5660_PWR_DAC_S1F_BIT … /* Power Management for Analog 1 (0x63) */ #define RT5660_PWR_VREF1 … #define RT5660_PWR_VREF1_BIT … #define RT5660_PWR_FV1 … #define RT5660_PWR_FV1_BIT … #define RT5660_PWR_MB … #define RT5660_PWR_MB_BIT … #define RT5660_PWR_BG … #define RT5660_PWR_BG_BIT … #define RT5660_PWR_HP_L … #define RT5660_PWR_HP_L_BIT … #define RT5660_PWR_HP_R … #define RT5660_PWR_HP_R_BIT … #define RT5660_PWR_HA … #define RT5660_PWR_HA_BIT … #define RT5660_PWR_VREF2 … #define RT5660_PWR_VREF2_BIT … #define RT5660_PWR_FV2 … #define RT5660_PWR_FV2_BIT … #define RT5660_PWR_LDO2 … #define RT5660_PWR_LDO2_BIT … /* Power Management for Analog 2 (0x64) */ #define RT5660_PWR_BST1 … #define RT5660_PWR_BST1_BIT … #define RT5660_PWR_BST2 … #define RT5660_PWR_BST2_BIT … #define RT5660_PWR_BST3 … #define RT5660_PWR_BST3_BIT … #define RT5660_PWR_MB1 … #define RT5660_PWR_MB1_BIT … #define RT5660_PWR_MB2 … #define RT5660_PWR_MB2_BIT … #define RT5660_PWR_PLL … #define RT5660_PWR_PLL_BIT … /* Power Management for Mixer (0x65) */ #define RT5660_PWR_OM_L … #define RT5660_PWR_OM_L_BIT … #define RT5660_PWR_OM_R … #define RT5660_PWR_OM_R_BIT … #define RT5660_PWR_SM … #define RT5660_PWR_SM_BIT … #define RT5660_PWR_RM_L … #define RT5660_PWR_RM_L_BIT … #define RT5660_PWR_RM_R … #define RT5660_PWR_RM_R_BIT … /* Power Management for Volume (0x66) */ #define RT5660_PWR_SV … #define RT5660_PWR_SV_BIT … #define RT5660_PWR_LV_L … #define RT5660_PWR_LV_L_BIT … #define RT5660_PWR_LV_R … #define RT5660_PWR_LV_R_BIT … /* I2S1 Audio Serial Data Port Control (0x70) */ #define RT5660_I2S_MS_MASK … #define RT5660_I2S_MS_SFT … #define RT5660_I2S_MS_M … #define RT5660_I2S_MS_S … #define RT5660_I2S_O_CP_MASK … #define RT5660_I2S_O_CP_SFT … #define RT5660_I2S_O_CP_OFF … #define RT5660_I2S_O_CP_U_LAW … #define RT5660_I2S_O_CP_A_LAW … #define RT5660_I2S_I_CP_MASK … #define RT5660_I2S_I_CP_SFT … #define RT5660_I2S_I_CP_OFF … #define RT5660_I2S_I_CP_U_LAW … #define RT5660_I2S_I_CP_A_LAW … #define RT5660_I2S_BP_MASK … #define RT5660_I2S_BP_SFT … #define RT5660_I2S_BP_NOR … #define RT5660_I2S_BP_INV … #define RT5660_I2S_DL_MASK … #define RT5660_I2S_DL_SFT … #define RT5660_I2S_DL_16 … #define RT5660_I2S_DL_20 … #define RT5660_I2S_DL_24 … #define RT5660_I2S_DL_8 … #define RT5660_I2S_DF_MASK … #define RT5660_I2S_DF_SFT … #define RT5660_I2S_DF_I2S … #define RT5660_I2S_DF_LEFT … #define RT5660_I2S_DF_PCM_A … #define RT5660_I2S_DF_PCM_B … /* ADC/DAC Clock Control 1 (0x73) */ #define RT5660_I2S_BCLK_MS1_MASK … #define RT5660_I2S_BCLK_MS1_SFT … #define RT5660_I2S_BCLK_MS1_32 … #define RT5660_I2S_BCLK_MS1_64 … #define RT5660_I2S_PD1_MASK … #define RT5660_I2S_PD1_SFT … #define RT5660_I2S_PD1_1 … #define RT5660_I2S_PD1_2 … #define RT5660_I2S_PD1_3 … #define RT5660_I2S_PD1_4 … #define RT5660_I2S_PD1_6 … #define RT5660_I2S_PD1_8 … #define RT5660_I2S_PD1_12 … #define RT5660_I2S_PD1_16 … #define RT5660_DAC_OSR_MASK … #define RT5660_DAC_OSR_SFT … #define RT5660_DAC_OSR_128 … #define RT5660_DAC_OSR_64 … #define RT5660_DAC_OSR_32 … #define RT5660_DAC_OSR_16 … #define RT5660_ADC_OSR_MASK … #define RT5660_ADC_OSR_SFT … #define RT5660_ADC_OSR_128 … #define RT5660_ADC_OSR_64 … #define RT5660_ADC_OSR_32 … #define RT5660_ADC_OSR_16 … /* ADC/DAC Clock Control 2 (0x74) */ #define RT5660_RESET_ADF … #define RT5660_RESET_ADF_SFT … #define RT5660_RESET_DAF … #define RT5660_RESET_DAF_SFT … #define RT5660_DAHPF_EN … #define RT5660_DAHPF_EN_SFT … #define RT5660_ADHPF_EN … #define RT5660_ADHPF_EN_SFT … /* Digital Microphone Control (0x75) */ #define RT5660_DMIC_1_EN_MASK … #define RT5660_DMIC_1_EN_SFT … #define RT5660_DMIC_1_DIS … #define RT5660_DMIC_1_EN … #define RT5660_DMIC_1L_LH_MASK … #define RT5660_DMIC_1L_LH_SFT … #define RT5660_DMIC_1L_LH_RISING … #define RT5660_DMIC_1L_LH_FALLING … #define RT5660_DMIC_1R_LH_MASK … #define RT5660_DMIC_1R_LH_SFT … #define RT5660_DMIC_1R_LH_RISING … #define RT5660_DMIC_1R_LH_FALLING … #define RT5660_SEL_DMIC_DATA_MASK … #define RT5660_SEL_DMIC_DATA_SFT … #define RT5660_SEL_DMIC_DATA_GPIO2 … #define RT5660_SEL_DMIC_DATA_IN1P … #define RT5660_DMIC_CLK_MASK … #define RT5660_DMIC_CLK_SFT … /* Global Clock Control (0x80) */ #define RT5660_SCLK_SRC_MASK … #define RT5660_SCLK_SRC_SFT … #define RT5660_SCLK_SRC_MCLK … #define RT5660_SCLK_SRC_PLL1 … #define RT5660_SCLK_SRC_RCCLK … #define RT5660_PLL1_SRC_MASK … #define RT5660_PLL1_SRC_SFT … #define RT5660_PLL1_SRC_MCLK … #define RT5660_PLL1_SRC_BCLK1 … #define RT5660_PLL1_SRC_RCCLK … #define RT5660_PLL1_PD_MASK … #define RT5660_PLL1_PD_SFT … #define RT5660_PLL1_PD_1 … #define RT5660_PLL1_PD_2 … #define RT5660_PLL_INP_MAX … #define RT5660_PLL_INP_MIN … /* PLL M/N/K Code Control 1 (0x81) */ #define RT5660_PLL_N_MAX … #define RT5660_PLL_N_MASK … #define RT5660_PLL_N_SFT … #define RT5660_PLL_K_MAX … #define RT5660_PLL_K_MASK … #define RT5660_PLL_K_SFT … /* PLL M/N/K Code Control 2 (0x82) */ #define RT5660_PLL_M_MAX … #define RT5660_PLL_M_MASK … #define RT5660_PLL_M_SFT … #define RT5660_PLL_M_BP … #define RT5660_PLL_M_BP_SFT … /* Class D Over Current Control (0x8c) */ #define RT5660_CLSD_OC_MASK … #define RT5660_CLSD_OC_SFT … #define RT5660_CLSD_OC_PU … #define RT5660_CLSD_OC_PD … #define RT5660_AUTO_PD_MASK … #define RT5660_AUTO_PD_SFT … #define RT5660_AUTO_PD_DIS … #define RT5660_AUTO_PD_EN … #define RT5660_CLSD_OC_TH_MASK … #define RT5660_CLSD_OC_TH_SFT … /* Class D Output Control (0x8d) */ #define RT5660_CLSD_RATIO_MASK … #define RT5660_CLSD_RATIO_SFT … /* Lout Amp Control 1 (0x8e) */ #define RT5660_LOUT_CO_MASK … #define RT5660_LOUT_CO_SFT … #define RT5660_LOUT_CO_DIS … #define RT5660_LOUT_CO_EN … #define RT5660_LOUT_CB_MASK … #define RT5660_LOUT_CB_SFT … #define RT5660_LOUT_CB_PD … #define RT5660_LOUT_CB_PU … /* SPKVDD detection control (0x92) */ #define RT5660_SPKVDD_DET_MASK … #define RT5660_SPKVDD_DET_SFT … #define RT5660_SPKVDD_DET_DIS … #define RT5660_SPKVDD_DET_EN … #define RT5660_SPK_AG_MASK … #define RT5660_SPK_AG_SFT … #define RT5660_SPK_AG_DIS … #define RT5660_SPK_AG_EN … /* Micbias Control (0x93) */ #define RT5660_MIC1_BS_MASK … #define RT5660_MIC1_BS_SFT … #define RT5660_MIC1_BS_9AV … #define RT5660_MIC1_BS_75AV … #define RT5660_MIC2_BS_MASK … #define RT5660_MIC2_BS_SFT … #define RT5660_MIC2_BS_9AV … #define RT5660_MIC2_BS_75AV … #define RT5660_MIC1_OVCD_MASK … #define RT5660_MIC1_OVCD_SFT … #define RT5660_MIC1_OVCD_DIS … #define RT5660_MIC1_OVCD_EN … #define RT5660_MIC1_OVTH_MASK … #define RT5660_MIC1_OVTH_SFT … #define RT5660_MIC1_OVTH_600UA … #define RT5660_MIC1_OVTH_1500UA … #define RT5660_MIC1_OVTH_2000UA … #define RT5660_MIC2_OVCD_MASK … #define RT5660_MIC2_OVCD_SFT … #define RT5660_MIC2_OVCD_DIS … #define RT5660_MIC2_OVCD_EN … #define RT5660_MIC2_OVTH_MASK … #define RT5660_MIC2_OVTH_SFT … #define RT5660_MIC2_OVTH_600UA … #define RT5660_MIC2_OVTH_1500UA … #define RT5660_MIC2_OVTH_2000UA … #define RT5660_PWR_CLK25M_MASK … #define RT5660_PWR_CLK25M_SFT … #define RT5660_PWR_CLK25M_PD … #define RT5660_PWR_CLK25M_PU … /* EQ Control 1 (0xb0) */ #define RT5660_EQ_SRC_MASK … #define RT5660_EQ_SRC_SFT … #define RT5660_EQ_SRC_DAC … #define RT5660_EQ_SRC_ADC … #define RT5660_EQ_UPD … #define RT5660_EQ_UPD_BIT … /* Jack Detect Control (0xbb) */ #define RT5660_JD_MASK … #define RT5660_JD_SFT … #define RT5660_JD_DIS … #define RT5660_JD_GPIO1 … #define RT5660_JD_GPIO2 … #define RT5660_JD_LOUT_MASK … #define RT5660_JD_LOUT_SFT … #define RT5660_JD_LOUT_DIS … #define RT5660_JD_LOUT_EN … #define RT5660_JD_LOUT_TRG_MASK … #define RT5660_JD_LOUT_TRG_SFT … #define RT5660_JD_LOUT_TRG_LO … #define RT5660_JD_LOUT_TRG_HI … #define RT5660_JD_SPO_MASK … #define RT5660_JD_SPO_SFT … #define RT5660_JD_SPO_DIS … #define RT5660_JD_SPO_EN … #define RT5660_JD_SPO_TRG_MASK … #define RT5660_JD_SPO_TRG_SFT … #define RT5660_JD_SPO_TRG_LO … #define RT5660_JD_SPO_TRG_HI … /* IRQ Control 1 (0xbd) */ #define RT5660_IRQ_JD_MASK … #define RT5660_IRQ_JD_SFT … #define RT5660_IRQ_JD_BP … #define RT5660_IRQ_JD_NOR … #define RT5660_IRQ_OT_MASK … #define RT5660_IRQ_OT_SFT … #define RT5660_IRQ_OT_BP … #define RT5660_IRQ_OT_NOR … #define RT5660_JD_STKY_MASK … #define RT5660_JD_STKY_SFT … #define RT5660_JD_STKY_DIS … #define RT5660_JD_STKY_EN … #define RT5660_OT_STKY_MASK … #define RT5660_OT_STKY_SFT … #define RT5660_OT_STKY_DIS … #define RT5660_OT_STKY_EN … #define RT5660_JD_P_MASK … #define RT5660_JD_P_SFT … #define RT5660_JD_P_NOR … #define RT5660_JD_P_INV … #define RT5660_OT_P_MASK … #define RT5660_OT_P_SFT … #define RT5660_OT_P_NOR … #define RT5660_OT_P_INV … /* IRQ Control 2 (0xbe) */ #define RT5660_IRQ_MB1_OC_MASK … #define RT5660_IRQ_MB1_OC_SFT … #define RT5660_IRQ_MB1_OC_BP … #define RT5660_IRQ_MB1_OC_NOR … #define RT5660_IRQ_MB2_OC_MASK … #define RT5660_IRQ_MB2_OC_SFT … #define RT5660_IRQ_MB2_OC_BP … #define RT5660_IRQ_MB2_OC_NOR … #define RT5660_MB1_OC_STKY_MASK … #define RT5660_MB1_OC_STKY_SFT … #define RT5660_MB1_OC_STKY_DIS … #define RT5660_MB1_OC_STKY_EN … #define RT5660_MB2_OC_STKY_MASK … #define RT5660_MB2_OC_STKY_SFT … #define RT5660_MB2_OC_STKY_DIS … #define RT5660_MB2_OC_STKY_EN … #define RT5660_MB1_OC_P_MASK … #define RT5660_MB1_OC_P_SFT … #define RT5660_MB1_OC_P_NOR … #define RT5660_MB1_OC_P_INV … #define RT5660_MB2_OC_P_MASK … #define RT5660_MB2_OC_P_SFT … #define RT5660_MB2_OC_P_NOR … #define RT5660_MB2_OC_P_INV … #define RT5660_MB1_OC_CLR … #define RT5660_MB1_OC_CLR_SFT … #define RT5660_MB2_OC_CLR … #define RT5660_MB2_OC_CLR_SFT … /* GPIO Control 1 (0xc0) */ #define RT5660_GP2_PIN_MASK … #define RT5660_GP2_PIN_SFT … #define RT5660_GP2_PIN_GPIO2 … #define RT5660_GP2_PIN_DMIC1_SDA … #define RT5660_GP1_PIN_MASK … #define RT5660_GP1_PIN_SFT … #define RT5660_GP1_PIN_GPIO1 … #define RT5660_GP1_PIN_DMIC1_SCL … #define RT5660_GP1_PIN_IRQ … #define RT5660_GPIO_M_MASK … #define RT5660_GPIO_M_SFT … #define RT5660_GPIO_M_FLT … #define RT5660_GPIO_M_PH … /* GPIO Control 3 (0xc2) */ #define RT5660_GP2_PF_MASK … #define RT5660_GP2_PF_SFT … #define RT5660_GP2_PF_IN … #define RT5660_GP2_PF_OUT … #define RT5660_GP2_OUT_MASK … #define RT5660_GP2_OUT_SFT … #define RT5660_GP2_OUT_LO … #define RT5660_GP2_OUT_HI … #define RT5660_GP2_P_MASK … #define RT5660_GP2_P_SFT … #define RT5660_GP2_P_NOR … #define RT5660_GP2_P_INV … #define RT5660_GP1_PF_MASK … #define RT5660_GP1_PF_SFT … #define RT5660_GP1_PF_IN … #define RT5660_GP1_PF_OUT … #define RT5660_GP1_OUT_MASK … #define RT5660_GP1_OUT_SFT … #define RT5660_GP1_OUT_LO … #define RT5660_GP1_OUT_HI … #define RT5660_GP1_P_MASK … #define RT5660_GP1_P_SFT … #define RT5660_GP1_P_NOR … #define RT5660_GP1_P_INV … /* Soft volume and zero cross control 1 (0xd9) */ #define RT5660_SV_MASK … #define RT5660_SV_SFT … #define RT5660_SV_DIS … #define RT5660_SV_EN … #define RT5660_SPO_SV_MASK … #define RT5660_SPO_SV_SFT … #define RT5660_SPO_SV_DIS … #define RT5660_SPO_SV_EN … #define RT5660_OUT_SV_MASK … #define RT5660_OUT_SV_SFT … #define RT5660_OUT_SV_DIS … #define RT5660_OUT_SV_EN … #define RT5660_ZCD_DIG_MASK … #define RT5660_ZCD_DIG_SFT … #define RT5660_ZCD_DIG_DIS … #define RT5660_ZCD_DIG_EN … #define RT5660_ZCD_MASK … #define RT5660_ZCD_SFT … #define RT5660_ZCD_PD … #define RT5660_ZCD_PU … #define RT5660_SV_DLY_MASK … #define RT5660_SV_DLY_SFT … /* Soft volume and zero cross control 2 (0xda) */ #define RT5660_ZCD_SPO_MASK … #define RT5660_ZCD_SPO_SFT … #define RT5660_ZCD_SPO_DIS … #define RT5660_ZCD_SPO_EN … #define RT5660_ZCD_OMR_MASK … #define RT5660_ZCD_OMR_SFT … #define RT5660_ZCD_OMR_DIS … #define RT5660_ZCD_OMR_EN … #define RT5660_ZCD_OML_MASK … #define RT5660_ZCD_OML_SFT … #define RT5660_ZCD_OML_DIS … #define RT5660_ZCD_OML_EN … #define RT5660_ZCD_SPM_MASK … #define RT5660_ZCD_SPM_SFT … #define RT5660_ZCD_SPM_DIS … #define RT5660_ZCD_SPM_EN … #define RT5660_ZCD_RMR_MASK … #define RT5660_ZCD_RMR_SFT … #define RT5660_ZCD_RMR_DIS … #define RT5660_ZCD_RMR_EN … #define RT5660_ZCD_RML_MASK … #define RT5660_ZCD_RML_SFT … #define RT5660_ZCD_RML_DIS … #define RT5660_ZCD_RML_EN … /* General Control 1 (0xfa) */ #define RT5660_PWR_VREF_HP … #define RT5660_PWR_VREF_HP_SFT … #define RT5660_AUTO_DIS_AMP … #define RT5660_MCLK_DET … #define RT5660_POW_CLKDET … #define RT5660_DIG_GATE_CTRL … #define RT5660_DIG_GATE_CTRL_SFT … /* System Clock Source */ #define RT5660_SCLK_S_MCLK … #define RT5660_SCLK_S_PLL1 … #define RT5660_SCLK_S_RCCLK … /* PLL1 Source */ #define RT5660_PLL1_S_MCLK … #define RT5660_PLL1_S_BCLK … enum { … }; struct rt5660_priv { … }; #endif
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