/* SPDX-License-Identifier: GPL-2.0-only */ /* * rt5663.h -- RT5663 ALSA SoC audio driver * * Copyright 2016 Realtek Microelectronics * Author: Jack Yu <[email protected]> */ #ifndef __RT5663_H__ #define __RT5663_H__ #include <sound/rt5663.h> /* Info */ #define RT5663_RESET … #define RT5663_VENDOR_ID … #define RT5663_VENDOR_ID_1 … #define RT5663_VENDOR_ID_2 … #define RT5663_LOUT_CTRL … #define RT5663_HP_AMP_2 … #define RT5663_MONO_OUT … #define RT5663_MONO_GAIN … #define RT5663_AEC_BST … #define RT5663_IN1_IN2 … #define RT5663_IN3_IN4 … #define RT5663_INL1_INR1 … #define RT5663_CBJ_TYPE_2 … #define RT5663_CBJ_TYPE_3 … #define RT5663_CBJ_TYPE_4 … #define RT5663_CBJ_TYPE_5 … #define RT5663_CBJ_TYPE_8 … /* I/O - ADC/DAC/DMIC */ #define RT5663_DAC3_DIG_VOL … #define RT5663_DAC3_CTRL … #define RT5663_MONO_ADC_DIG_VOL … #define RT5663_STO2_ADC_DIG_VOL … #define RT5663_MONO_ADC_BST_GAIN … #define RT5663_STO2_ADC_BST_GAIN … #define RT5663_SIDETONE_CTRL … /* Mixer - D-D */ #define RT5663_MONO1_ADC_MIXER … #define RT5663_STO2_ADC_MIXER … #define RT5663_MONO_DAC_MIXER … #define RT5663_DAC2_SRC_CTRL … #define RT5663_IF_3_4_DATA_CTL … #define RT5663_IF_5_DATA_CTL … #define RT5663_PDM_OUT_CTL … #define RT5663_PDM_I2C_DATA_CTL1 … #define RT5663_PDM_I2C_DATA_CTL2 … #define RT5663_PDM_I2C_DATA_CTL3 … #define RT5663_PDM_I2C_DATA_CTL4 … /*Mixer - Analog*/ #define RT5663_RECMIX1_NEW … #define RT5663_RECMIX1L_0 … #define RT5663_RECMIX1L … #define RT5663_RECMIX1R_0 … #define RT5663_RECMIX1R … #define RT5663_RECMIX2_NEW … #define RT5663_RECMIX2_L_2 … #define RT5663_RECMIX2_R … #define RT5663_RECMIX2_R_2 … #define RT5663_CALIB_REC_LR … #define RT5663_ALC_BK_GAIN … #define RT5663_MONOMIX_GAIN … #define RT5663_MONOMIX_IN_GAIN … #define RT5663_OUT_MIXL_GAIN … #define RT5663_OUT_LMIX_IN_GAIN … #define RT5663_OUT_RMIX_IN_GAIN … #define RT5663_OUT_RMIX_IN_GAIN1 … #define RT5663_LOUT_MIXER_CTRL … /* Power */ #define RT5663_PWR_VOL … #define RT5663_ADCDAC_RST … /* Format - ADC/DAC */ #define RT5663_I2S34_SDP … #define RT5663_I2S5_SDP … /* Function - Analog */ #define RT5663_ASRC_3 … #define RT5663_ASRC_6 … #define RT5663_ASRC_7 … #define RT5663_PLL_TRK_13 … #define RT5663_I2S_M_CLK_CTL … #define RT5663_FDIV_I2S34_M_CLK … #define RT5663_FDIV_I2S34_M_CLK2 … #define RT5663_FDIV_I2S5_M_CLK … #define RT5663_FDIV_I2S5_M_CLK2 … /* Function - Digital */ #define RT5663_V2_IRQ_4 … #define RT5663_GPIO_3 … #define RT5663_GPIO_4 … #define RT5663_GPIO_STA2 … #define RT5663_HP_AMP_DET1 … #define RT5663_HP_AMP_DET2 … #define RT5663_HP_AMP_DET3 … #define RT5663_MID_BD_HP_AMP … #define RT5663_LOW_BD_HP_AMP … #define RT5663_SOF_VOL_ZC2 … #define RT5663_ADC_STO2_ADJ1 … #define RT5663_ADC_STO2_ADJ2 … /* General Control */ #define RT5663_A_JD_CTRL … #define RT5663_JD1_TRES_CTRL … #define RT5663_JD2_TRES_CTRL … #define RT5663_V2_JD_CTRL2 … #define RT5663_DUM_REG_2 … #define RT5663_DUM_REG_3 … #define RT5663_DACADC_DIG_VOL2 … #define RT5663_DIG_IN_PIN2 … #define RT5663_PAD_DRV_CTL1 … #define RT5663_SOF_RAM_DEPOP … #define RT5663_VOL_TEST … #define RT5663_MONO_DYNA_1 … #define RT5663_MONO_DYNA_2 … #define RT5663_MONO_DYNA_3 … #define RT5663_MONO_DYNA_4 … #define RT5663_MONO_DYNA_5 … #define RT5663_MONO_DYNA_6 … #define RT5663_STO1_SIL_DET … #define RT5663_MONOL_SIL_DET … #define RT5663_MONOR_SIL_DET … #define RT5663_STO2_DAC_SIL … #define RT5663_PWR_SAV_CTL1 … #define RT5663_PWR_SAV_CTL2 … #define RT5663_PWR_SAV_CTL3 … #define RT5663_PWR_SAV_CTL4 … #define RT5663_PWR_SAV_CTL5 … #define RT5663_PWR_SAV_CTL6 … #define RT5663_MONO_AMP_CAL1 … #define RT5663_MONO_AMP_CAL2 … #define RT5663_MONO_AMP_CAL3 … #define RT5663_MONO_AMP_CAL4 … #define RT5663_MONO_AMP_CAL5 … #define RT5663_MONO_AMP_CAL6 … #define RT5663_MONO_AMP_CAL7 … #define RT5663_MONO_AMP_CAL_ST1 … #define RT5663_MONO_AMP_CAL_ST2 … #define RT5663_MONO_AMP_CAL_ST3 … #define RT5663_MONO_AMP_CAL_ST4 … #define RT5663_MONO_AMP_CAL_ST5 … #define RT5663_V2_HP_IMP_SEN_13 … #define RT5663_V2_HP_IMP_SEN_14 … #define RT5663_V2_HP_IMP_SEN_6 … #define RT5663_V2_HP_IMP_SEN_7 … #define RT5663_V2_HP_IMP_SEN_8 … #define RT5663_V2_HP_IMP_SEN_9 … #define RT5663_V2_HP_IMP_SEN_10 … #define RT5663_HP_LOGIC_3 … #define RT5663_HP_CALIB_ST10 … #define RT5663_HP_CALIB_ST11 … #define RT5663_PRO_REG_TBL_4 … #define RT5663_PRO_REG_TBL_5 … #define RT5663_PRO_REG_TBL_6 … #define RT5663_PRO_REG_TBL_7 … #define RT5663_PRO_REG_TBL_8 … #define RT5663_PRO_REG_TBL_9 … #define RT5663_SAR_ADC_INL_1 … #define RT5663_SAR_ADC_INL_2 … #define RT5663_SAR_ADC_INL_3 … #define RT5663_SAR_ADC_INL_4 … #define RT5663_SAR_ADC_INL_5 … #define RT5663_SAR_ADC_INL_6 … #define RT5663_SAR_ADC_INL_7 … #define RT5663_SAR_ADC_INL_8 … #define RT5663_SAR_ADC_INL_9 … #define RT5663_SAR_ADC_INL_10 … #define RT5663_SAR_ADC_INL_11 … #define RT5663_SAR_ADC_INL_12 … #define RT5663_DRC_CTRL_1 … #define RT5663_DRC1_CTRL_2 … #define RT5663_DRC1_CTRL_3 … #define RT5663_DRC1_CTRL_4 … #define RT5663_DRC1_CTRL_5 … #define RT5663_DRC1_CTRL_6 … #define RT5663_DRC1_HD_CTRL_1 … #define RT5663_DRC1_HD_CTRL_2 … #define RT5663_DRC1_PRI_REG_1 … #define RT5663_DRC1_PRI_REG_2 … #define RT5663_DRC1_PRI_REG_3 … #define RT5663_DRC1_PRI_REG_4 … #define RT5663_DRC1_PRI_REG_5 … #define RT5663_DRC1_PRI_REG_6 … #define RT5663_DRC1_PRI_REG_7 … #define RT5663_DRC1_PRI_REG_8 … #define RT5663_ALC_PGA_CTL_1 … #define RT5663_ALC_PGA_CTL_2 … #define RT5663_ALC_PGA_CTL_3 … #define RT5663_ALC_PGA_CTL_4 … #define RT5663_ALC_PGA_CTL_5 … #define RT5663_ALC_PGA_CTL_6 … #define RT5663_ALC_PGA_CTL_7 … #define RT5663_ALC_PGA_CTL_8 … #define RT5663_ALC_PGA_REG_1 … #define RT5663_ALC_PGA_REG_2 … #define RT5663_ALC_PGA_REG_3 … #define RT5663_ADC_EQ_RECOV_1 … #define RT5663_ADC_EQ_RECOV_2 … #define RT5663_ADC_EQ_RECOV_3 … #define RT5663_ADC_EQ_RECOV_4 … #define RT5663_ADC_EQ_RECOV_5 … #define RT5663_ADC_EQ_RECOV_6 … #define RT5663_ADC_EQ_RECOV_7 … #define RT5663_ADC_EQ_RECOV_8 … #define RT5663_ADC_EQ_RECOV_9 … #define RT5663_ADC_EQ_RECOV_10 … #define RT5663_ADC_EQ_RECOV_11 … #define RT5663_ADC_EQ_RECOV_12 … #define RT5663_ADC_EQ_RECOV_13 … #define RT5663_VID_HIDDEN … #define RT5663_VID_CUSTOMER … #define RT5663_SCAN_MODE … #define RT5663_I2C_BYPA … /* Headphone Amp Control 2 (0x0003) */ #define RT5663_EN_DAC_HPO_MASK … #define RT5663_EN_DAC_HPO_SHIFT … #define RT5663_EN_DAC_HPO_DIS … #define RT5663_EN_DAC_HPO_EN … /*Headphone Amp L/R Analog Gain and Digital NG2 Gain Control (0x0005 0x0006)*/ #define RT5663_GAIN_HP … #define RT5663_GAIN_HP_SHIFT … /* AEC BST Control (0x000b) */ #define RT5663_GAIN_CBJ_MASK … #define RT5663_GAIN_CBJ_SHIFT … /* IN1 Control / MIC GND REF (0x000c) */ #define RT5663_IN1_DF_MASK … #define RT5663_IN1_DF_SHIFT … /* Combo Jack and Type Detection Control 1 (0x0010) */ #define RT5663_CBJ_DET_MASK … #define RT5663_CBJ_DET_SHIFT … #define RT5663_CBJ_DET_DIS … #define RT5663_CBJ_DET_EN … #define RT5663_DET_TYPE_MASK … #define RT5663_DET_TYPE_SHIFT … #define RT5663_DET_TYPE_WLCSP … #define RT5663_DET_TYPE_QFN … #define RT5663_VREF_BIAS_MASK … #define RT5663_VREF_BIAS_SHIFT … #define RT5663_VREF_BIAS_FSM … #define RT5663_VREF_BIAS_REG … /* REC Left Mixer Control 2 (0x003c) */ #define RT5663_RECMIX1L_BST1_CBJ … #define RT5663_RECMIX1L_BST1_CBJ_SHIFT … #define RT5663_RECMIX1L_BST2 … #define RT5663_RECMIX1L_BST2_SHIFT … /* REC Right Mixer Control 2 (0x003e) */ #define RT5663_RECMIX1R_BST2 … #define RT5663_RECMIX1R_BST2_SHIFT … /* DAC1 Digital Volume (0x0019) */ #define RT5663_DAC_L1_VOL_MASK … #define RT5663_DAC_L1_VOL_SHIFT … #define RT5663_DAC_R1_VOL_MASK … #define RT5663_DAC_R1_VOL_SHIFT … /* ADC Digital Volume Control (0x001c) */ #define RT5663_ADC_L_MUTE_MASK … #define RT5663_ADC_L_MUTE_SHIFT … #define RT5663_ADC_L_VOL_MASK … #define RT5663_ADC_L_VOL_SHIFT … #define RT5663_ADC_R_MUTE_MASK … #define RT5663_ADC_R_MUTE_SHIFT … #define RT5663_ADC_R_VOL_MASK … #define RT5663_ADC_R_VOL_SHIFT … /* Stereo ADC Mixer Control (0x0026) */ #define RT5663_M_STO1_ADC_L1 … #define RT5663_M_STO1_ADC_L1_SHIFT … #define RT5663_M_STO1_ADC_L2 … #define RT5663_M_STO1_ADC_L2_SHIFT … #define RT5663_STO1_ADC_L1_SRC … #define RT5663_STO1_ADC_L1_SRC_SHIFT … #define RT5663_STO1_ADC_L2_SRC … #define RT5663_STO1_ADC_L2_SRC_SHIFT … #define RT5663_STO1_ADC_L_SRC … #define RT5663_STO1_ADC_L_SRC_SHIFT … #define RT5663_M_STO1_ADC_R1 … #define RT5663_M_STO1_ADC_R1_SHIFT … #define RT5663_M_STO1_ADC_R2 … #define RT5663_M_STO1_ADC_R2_SHIFT … #define RT5663_STO1_ADC_R1_SRC … #define RT5663_STO1_ADC_R1_SRC_SHIFT … #define RT5663_STO1_ADC_R2_SRC … #define RT5663_STO1_ADC_R2_SRC_SHIFT … #define RT5663_STO1_ADC_R_SRC … #define RT5663_STO1_ADC_R_SRC_SHIFT … /* ADC Mixer to DAC Mixer Control (0x0029) */ #define RT5663_M_ADCMIX_L … #define RT5663_M_ADCMIX_L_SHIFT … #define RT5663_M_DAC1_L … #define RT5663_M_DAC1_L_SHIFT … #define RT5663_M_ADCMIX_R … #define RT5663_M_ADCMIX_R_SHIFT … #define RT5663_M_DAC1_R … #define RT5663_M_DAC1_R_SHIFT … /* Stereo DAC Mixer Control (0x002a) */ #define RT5663_M_DAC_L1_STO_L … #define RT5663_M_DAC_L1_STO_L_SHIFT … #define RT5663_M_DAC_R1_STO_L … #define RT5663_M_DAC_R1_STO_L_SHIFT … #define RT5663_M_DAC_L1_STO_R … #define RT5663_M_DAC_L1_STO_R_SHIFT … #define RT5663_M_DAC_R1_STO_R … #define RT5663_M_DAC_R1_STO_R_SHIFT … /* Power Management for Digital 1 (0x0061) */ #define RT5663_PWR_I2S1 … #define RT5663_PWR_I2S1_SHIFT … #define RT5663_PWR_DAC_L1 … #define RT5663_PWR_DAC_L1_SHIFT … #define RT5663_PWR_DAC_R1 … #define RT5663_PWR_DAC_R1_SHIFT … #define RT5663_PWR_LDO_DACREF_MASK … #define RT5663_PWR_LDO_DACREF_SHIFT … #define RT5663_PWR_LDO_DACREF_ON … #define RT5663_PWR_LDO_DACREF_DOWN … #define RT5663_PWR_LDO_SHIFT … #define RT5663_PWR_ADC_L1 … #define RT5663_PWR_ADC_L1_SHIFT … #define RT5663_PWR_ADC_R1 … #define RT5663_PWR_ADC_R1_SHIFT … /* Power Management for Digital 2 (0x0062) */ #define RT5663_PWR_ADC_S1F … #define RT5663_PWR_ADC_S1F_SHIFT … #define RT5663_PWR_DAC_S1F … #define RT5663_PWR_DAC_S1F_SHIFT … /* Power Management for Analog 1 (0x0063) */ #define RT5663_PWR_VREF1 … #define RT5663_PWR_VREF1_MASK … #define RT5663_PWR_VREF1_SHIFT … #define RT5663_PWR_FV1 … #define RT5663_PWR_FV1_MASK … #define RT5663_PWR_FV1_SHIFT … #define RT5663_PWR_VREF2 … #define RT5663_PWR_VREF2_MASK … #define RT5663_PWR_VREF2_SHIFT … #define RT5663_PWR_FV2 … #define RT5663_PWR_FV2_MASK … #define RT5663_PWR_FV2_SHIFT … #define RT5663_PWR_MB … #define RT5663_PWR_MB_MASK … #define RT5663_PWR_MB_SHIFT … #define RT5663_AMP_HP_MASK … #define RT5663_AMP_HP_SHIFT … #define RT5663_AMP_HP_1X … #define RT5663_AMP_HP_3X … #define RT5663_AMP_HP_5X … #define RT5663_LDO1_DVO_MASK … #define RT5663_LDO1_DVO_SHIFT … #define RT5663_LDO1_DVO_0_9V … #define RT5663_LDO1_DVO_1_0V … #define RT5663_LDO1_DVO_1_2V … #define RT5663_LDO1_DVO_1_4V … /* Power Management for Analog 2 (0x0064) */ #define RT5663_PWR_BST1 … #define RT5663_PWR_BST1_MASK … #define RT5663_PWR_BST1_SHIFT … #define RT5663_PWR_BST1_OFF … #define RT5663_PWR_BST1_ON … #define RT5663_PWR_BST2 … #define RT5663_PWR_BST2_MASK … #define RT5663_PWR_BST2_SHIFT … #define RT5663_PWR_MB1 … #define RT5663_PWR_MB1_SHIFT … #define RT5663_PWR_MB2 … #define RT5663_PWR_MB2_SHIFT … #define RT5663_PWR_BST2_OP … #define RT5663_PWR_BST2_OP_MASK … #define RT5663_PWR_BST2_OP_SHIFT … #define RT5663_PWR_JD1 … #define RT5663_PWR_JD1_MASK … #define RT5663_PWR_JD1_SHIFT … #define RT5663_PWR_JD2 … #define RT5663_PWR_JD2_MASK … #define RT5663_PWR_JD2_SHIFT … #define RT5663_PWR_RECMIX1 … #define RT5663_PWR_RECMIX1_SHIFT … #define RT5663_PWR_RECMIX2 … #define RT5663_PWR_RECMIX2_SHIFT … /* Power Management for Analog 3 (0x0065) */ #define RT5663_PWR_CBJ_MASK … #define RT5663_PWR_CBJ_SHIFT … #define RT5663_PWR_CBJ_OFF … #define RT5663_PWR_CBJ_ON … #define RT5663_PWR_PLL … #define RT5663_PWR_PLL_SHIFT … #define RT5663_PWR_LDO2 … #define RT5663_PWR_LDO2_SHIFT … /* Power Management for Volume (0x0067) */ #define RT5663_V2_PWR_MIC_DET … #define RT5663_V2_PWR_MIC_DET_SHIFT … /* MCLK and System Clock Detection Control (0x006b) */ #define RT5663_EN_ANA_CLK_DET_MASK … #define RT5663_EN_ANA_CLK_DET_SHIFT … #define RT5663_EN_ANA_CLK_DET_DIS … #define RT5663_EN_ANA_CLK_DET_AUTO … #define RT5663_PWR_CLK_DET_MASK … #define RT5663_PWR_CLK_DET_SHIFT … #define RT5663_PWR_CLK_DET_DIS … #define RT5663_PWR_CLK_DET_EN … /* I2S1 Audio Serial Data Port Control (0x0070) */ #define RT5663_I2S_MS_MASK … #define RT5663_I2S_MS_SHIFT … #define RT5663_I2S_MS_M … #define RT5663_I2S_MS_S … #define RT5663_I2S_BP_MASK … #define RT5663_I2S_BP_SHIFT … #define RT5663_I2S_BP_NOR … #define RT5663_I2S_BP_INV … #define RT5663_I2S_DL_MASK … #define RT5663_I2S_DL_SHIFT … #define RT5663_I2S_DL_16 … #define RT5663_I2S_DL_20 … #define RT5663_I2S_DL_24 … #define RT5663_I2S_DL_8 … #define RT5663_I2S_DF_MASK … #define RT5663_I2S_DF_SHIFT … #define RT5663_I2S_DF_I2S … #define RT5663_I2S_DF_LEFT … #define RT5663_I2S_DF_PCM_A … #define RT5663_I2S_DF_PCM_B … #define RT5663_I2S_DF_PCM_A_N … #define RT5663_I2S_DF_PCM_B_N … /* ADC/DAC Clock Control 1 (0x0073) */ #define RT5663_I2S_PD1_MASK … #define RT5663_I2S_PD1_SHIFT … #define RT5663_M_I2S_DIV_MASK … #define RT5663_M_I2S_DIV_SHIFT … #define RT5663_CLK_SRC_MASK … #define RT5663_CLK_SRC_MCLK … #define RT5663_CLK_SRC_PLL_OUT … #define RT5663_CLK_SRC_DIV … #define RT5663_CLK_SRC_RC … #define RT5663_DAC_OSR_MASK … #define RT5663_DAC_OSR_SHIFT … #define RT5663_DAC_OSR_128 … #define RT5663_DAC_OSR_64 … #define RT5663_DAC_OSR_32 … #define RT5663_ADC_OSR_MASK … #define RT5663_ADC_OSR_SHIFT … #define RT5663_ADC_OSR_128 … #define RT5663_ADC_OSR_64 … #define RT5663_ADC_OSR_32 … /* TDM1 control 1 (0x0078) */ #define RT5663_TDM_MODE_MASK … #define RT5663_TDM_MODE_SHIFT … #define RT5663_TDM_MODE_I2S … #define RT5663_TDM_MODE_TDM … #define RT5663_TDM_IN_CH_MASK … #define RT5663_TDM_IN_CH_SHIFT … #define RT5663_TDM_IN_CH_2 … #define RT5663_TDM_IN_CH_4 … #define RT5663_TDM_IN_CH_6 … #define RT5663_TDM_IN_CH_8 … #define RT5663_TDM_OUT_CH_MASK … #define RT5663_TDM_OUT_CH_SHIFT … #define RT5663_TDM_OUT_CH_2 … #define RT5663_TDM_OUT_CH_4 … #define RT5663_TDM_OUT_CH_6 … #define RT5663_TDM_OUT_CH_8 … #define RT5663_TDM_IN_LEN_MASK … #define RT5663_TDM_IN_LEN_SHIFT … #define RT5663_TDM_IN_LEN_16 … #define RT5663_TDM_IN_LEN_20 … #define RT5663_TDM_IN_LEN_24 … #define RT5663_TDM_IN_LEN_32 … #define RT5663_TDM_OUT_LEN_MASK … #define RT5663_TDM_OUT_LEN_SHIFT … #define RT5663_TDM_OUT_LEN_16 … #define RT5663_TDM_OUT_LEN_20 … #define RT5663_TDM_OUT_LEN_24 … #define RT5663_TDM_OUT_LEN_32 … /* Global Clock Control (0x0080) */ #define RT5663_SCLK_SRC_MASK … #define RT5663_SCLK_SRC_SHIFT … #define RT5663_SCLK_SRC_MCLK … #define RT5663_SCLK_SRC_PLL1 … #define RT5663_SCLK_SRC_RCCLK … #define RT5663_PLL1_SRC_MASK … #define RT5663_PLL1_SRC_SHIFT … #define RT5663_PLL1_SRC_MCLK … #define RT5663_PLL1_SRC_BCLK1 … #define RT5663_V2_PLL1_SRC_MASK … #define RT5663_V2_PLL1_SRC_SHIFT … #define RT5663_V2_PLL1_SRC_MCLK … #define RT5663_V2_PLL1_SRC_BCLK1 … #define RT5663_PLL1_PD_MASK … #define RT5663_PLL1_PD_SHIFT … #define RT5663_PLL_INP_MAX … #define RT5663_PLL_INP_MIN … /* PLL M/N/K Code Control 1 (0x0081) */ #define RT5663_PLL_N_MAX … #define RT5663_PLL_N_MASK … #define RT5663_PLL_N_SHIFT … #define RT5663_PLL_K_MAX … #define RT5663_PLL_K_MASK … #define RT5663_PLL_K_SHIFT … /* PLL M/N/K Code Control 2 (0x0082) */ #define RT5663_PLL_M_MAX … #define RT5663_PLL_M_MASK … #define RT5663_PLL_M_SHIFT … #define RT5663_PLL_M_BP … #define RT5663_PLL_M_BP_SHIFT … /* PLL tracking mode 1 (0x0083) */ #define RT5663_V2_I2S1_ASRC_MASK … #define RT5663_V2_I2S1_ASRC_SHIFT … #define RT5663_V2_DAC_STO1_ASRC_MASK … #define RT5663_V2_DAC_STO1_ASRC_SHIFT … #define RT5663_V2_ADC_STO1_ASRC_MASK … #define RT5663_V2_ADC_STO1_ASRC_SHIFT … /* PLL tracking mode 2 (0x0084)*/ #define RT5663_DA_STO1_TRACK_MASK … #define RT5663_DA_STO1_TRACK_SHIFT … #define RT5663_DA_STO1_TRACK_SYSCLK … #define RT5663_DA_STO1_TRACK_I2S1 … /* PLL tracking mode 3 (0x0085)*/ #define RT5663_V2_AD_STO1_TRACK_MASK … #define RT5663_V2_AD_STO1_TRACK_SHIFT … #define RT5663_V2_AD_STO1_TRACK_SYSCLK … #define RT5663_V2_AD_STO1_TRACK_I2S1 … /* HPOUT Charge pump control 1 (0x0091) */ #define RT5663_OSW_HP_L_MASK … #define RT5663_OSW_HP_L_SHIFT … #define RT5663_OSW_HP_L_EN … #define RT5663_OSW_HP_L_DIS … #define RT5663_OSW_HP_R_MASK … #define RT5663_OSW_HP_R_SHIFT … #define RT5663_OSW_HP_R_EN … #define RT5663_OSW_HP_R_DIS … #define RT5663_SEL_PM_HP_MASK … #define RT5663_SEL_PM_HP_SHIFT … #define RT5663_SEL_PM_HP_0_6 … #define RT5663_SEL_PM_HP_0_9 … #define RT5663_SEL_PM_HP_1_8 … #define RT5663_SEL_PM_HP_HIGH … #define RT5663_OVCD_HP_MASK … #define RT5663_OVCD_HP_SHIFT … #define RT5663_OVCD_HP_EN … #define RT5663_OVCD_HP_DIS … /* RC Clock Control (0x0094) */ #define RT5663_DIG_25M_CLK_MASK … #define RT5663_DIG_25M_CLK_SHIFT … #define RT5663_DIG_25M_CLK_DIS … #define RT5663_DIG_25M_CLK_EN … #define RT5663_DIG_1M_CLK_MASK … #define RT5663_DIG_1M_CLK_SHIFT … #define RT5663_DIG_1M_CLK_DIS … #define RT5663_DIG_1M_CLK_EN … /* Auto Turn On 1M RC CLK (0x009f) */ #define RT5663_IRQ_POW_SAV_MASK … #define RT5663_IRQ_POW_SAV_SHIFT … #define RT5663_IRQ_POW_SAV_DIS … #define RT5663_IRQ_POW_SAV_EN … #define RT5663_IRQ_POW_SAV_JD1_MASK … #define RT5663_IRQ_POW_SAV_JD1_SHIFT … #define RT5663_IRQ_POW_SAV_JD1_DIS … #define RT5663_IRQ_POW_SAV_JD1_EN … #define RT5663_IRQ_MANUAL_MASK … #define RT5663_IRQ_MANUAL_SHIFT … #define RT5663_IRQ_MANUAL_DIS … #define RT5663_IRQ_MANUAL_EN … /* IRQ Control 1 (0x00b6) */ #define RT5663_EN_CB_JD_MASK … #define RT5663_EN_CB_JD_SHIFT … #define RT5663_EN_CB_JD_EN … #define RT5663_EN_CB_JD_DIS … /* IRQ Control 3 (0x00b8) */ #define RT5663_V2_EN_IRQ_INLINE_MASK … #define RT5663_V2_EN_IRQ_INLINE_SHIFT … #define RT5663_V2_EN_IRQ_INLINE_BYP … #define RT5663_V2_EN_IRQ_INLINE_NOR … /* GPIO Control 1 (0x00c0) */ #define RT5663_GP1_PIN_MASK … #define RT5663_GP1_PIN_SHIFT … #define RT5663_GP1_PIN_GPIO1 … #define RT5663_GP1_PIN_IRQ … /* GPIO Control 2 (0x00c1) */ #define RT5663_GP4_PIN_CONF_MASK … #define RT5663_GP4_PIN_CONF_SHIFT … #define RT5663_GP4_PIN_CONF_INPUT … #define RT5663_GP4_PIN_CONF_OUTPUT … /* GPIO Control 2 (0x00c2) */ #define RT5663_GP8_PIN_CONF_MASK … #define RT5663_GP8_PIN_CONF_SHIFT … #define RT5663_GP8_PIN_CONF_INPUT … #define RT5663_GP8_PIN_CONF_OUTPUT … /* 4 Buttons Inline Command Function 1 (0x00df) */ #define RT5663_4BTN_CLK_DEB_MASK … #define RT5663_4BTN_CLK_DEB_SHIFT … #define RT5663_4BTN_CLK_DEB_8MS … #define RT5663_4BTN_CLK_DEB_16MS … #define RT5663_4BTN_CLK_DEB_32MS … #define RT5663_4BTN_CLK_DEB_65MS … /* Inline Command Function 6 (0x00e0) */ #define RT5663_EN_4BTN_INL_MASK … #define RT5663_EN_4BTN_INL_SHIFT … #define RT5663_EN_4BTN_INL_DIS … #define RT5663_EN_4BTN_INL_EN … #define RT5663_RESET_4BTN_INL_MASK … #define RT5663_RESET_4BTN_INL_SHIFT … #define RT5663_RESET_4BTN_INL_RESET … #define RT5663_RESET_4BTN_INL_NOR … /* Digital Misc Control (0x00fa) */ #define RT5663_DIG_GATE_CTRL_MASK … #define RT5663_DIG_GATE_CTRL_SHIFT … #define RT5663_DIG_GATE_CTRL_DIS … #define RT5663_DIG_GATE_CTRL_EN … /* Chopper and Clock control for DAC L (0x013a)*/ #define RT5663_CKXEN_DAC1_MASK … #define RT5663_CKXEN_DAC1_SHIFT … #define RT5663_CKGEN_DAC1_MASK … #define RT5663_CKGEN_DAC1_SHIFT … /* Chopper and Clock control for ADC (0x013b)*/ #define RT5663_CKXEN_ADCC_MASK … #define RT5663_CKXEN_ADCC_SHIFT … #define RT5663_CKGEN_ADCC_MASK … #define RT5663_CKGEN_ADCC_SHIFT … /* HP Behavior Logic Control 2 (0x01db) */ #define RT5663_HP_SIG_SRC1_MASK … #define RT5663_HP_SIG_SRC1_SHIFT … #define RT5663_HP_SIG_SRC1_HP_DC … #define RT5663_HP_SIG_SRC1_HP_CALIB … #define RT5663_HP_SIG_SRC1_REG … #define RT5663_HP_SIG_SRC1_SILENCE … /* RT5663 specific register */ #define RT5663_HP_OUT_EN … #define RT5663_HP_LCH_DRE … #define RT5663_HP_RCH_DRE … #define RT5663_CALIB_BST … #define RT5663_RECMIX … #define RT5663_SIL_DET_CTL … #define RT5663_PWR_SAV_SILDET … #define RT5663_SIDETONE_CTL … #define RT5663_STO1_DAC_DIG_VOL … #define RT5663_STO1_ADC_DIG_VOL … #define RT5663_STO1_BOOST … #define RT5663_HP_IMP_GAIN_1 … #define RT5663_HP_IMP_GAIN_2 … #define RT5663_STO1_ADC_MIXER … #define RT5663_AD_DA_MIXER … #define RT5663_STO_DAC_MIXER … #define RT5663_DIG_SIDE_MIXER … #define RT5663_BYPASS_STO_DAC … #define RT5663_CALIB_REC_MIX … #define RT5663_PWR_DIG_1 … #define RT5663_PWR_DIG_2 … #define RT5663_PWR_ANLG_1 … #define RT5663_PWR_ANLG_2 … #define RT5663_PWR_ANLG_3 … #define RT5663_PWR_MIXER … #define RT5663_SIG_CLK_DET … #define RT5663_PRE_DIV_GATING_1 … #define RT5663_PRE_DIV_GATING_2 … #define RT5663_I2S1_SDP … #define RT5663_ADDA_CLK_1 … #define RT5663_ADDA_RST … #define RT5663_FRAC_DIV_1 … #define RT5663_FRAC_DIV_2 … #define RT5663_TDM_1 … #define RT5663_TDM_2 … #define RT5663_TDM_3 … #define RT5663_TDM_4 … #define RT5663_TDM_5 … #define RT5663_TDM_6 … #define RT5663_TDM_7 … #define RT5663_TDM_8 … #define RT5663_TDM_9 … #define RT5663_GLB_CLK … #define RT5663_PLL_1 … #define RT5663_PLL_2 … #define RT5663_ASRC_1 … #define RT5663_ASRC_2 … #define RT5663_ASRC_4 … #define RT5663_DUMMY_REG … #define RT5663_ASRC_8 … #define RT5663_ASRC_9 … #define RT5663_ASRC_11 … #define RT5663_DEPOP_1 … #define RT5663_DEPOP_2 … #define RT5663_DEPOP_3 … #define RT5663_HP_CHARGE_PUMP_1 … #define RT5663_HP_CHARGE_PUMP_2 … #define RT5663_MICBIAS_1 … #define RT5663_RC_CLK … #define RT5663_ASRC_11_2 … #define RT5663_DUMMY_REG_2 … #define RT5663_REC_PATH_GAIN … #define RT5663_AUTO_1MRC_CLK … #define RT5663_ADC_EQ_1 … #define RT5663_ADC_EQ_2 … #define RT5663_IRQ_1 … #define RT5663_IRQ_2 … #define RT5663_IRQ_3 … #define RT5663_IRQ_4 … #define RT5663_IRQ_5 … #define RT5663_INT_ST_1 … #define RT5663_INT_ST_2 … #define RT5663_GPIO_1 … #define RT5663_GPIO_2 … #define RT5663_GPIO_STA1 … #define RT5663_SIN_GEN_1 … #define RT5663_SIN_GEN_2 … #define RT5663_SIN_GEN_3 … #define RT5663_SOF_VOL_ZC1 … #define RT5663_IL_CMD_1 … #define RT5663_IL_CMD_2 … #define RT5663_IL_CMD_3 … #define RT5663_IL_CMD_4 … #define RT5663_IL_CMD_5 … #define RT5663_IL_CMD_6 … #define RT5663_IL_CMD_7 … #define RT5663_IL_CMD_8 … #define RT5663_IL_CMD_PWRSAV1 … #define RT5663_IL_CMD_PWRSAV2 … #define RT5663_EM_JACK_TYPE_1 … #define RT5663_EM_JACK_TYPE_2 … #define RT5663_EM_JACK_TYPE_3 … #define RT5663_EM_JACK_TYPE_4 … #define RT5663_EM_JACK_TYPE_5 … #define RT5663_EM_JACK_TYPE_6 … #define RT5663_STO1_HPF_ADJ1 … #define RT5663_STO1_HPF_ADJ2 … #define RT5663_FAST_OFF_MICBIAS … #define RT5663_JD_CTRL1 … #define RT5663_JD_CTRL2 … #define RT5663_DIG_MISC … #define RT5663_DIG_VOL_ZCD … #define RT5663_ANA_BIAS_CUR_1 … #define RT5663_ANA_BIAS_CUR_2 … #define RT5663_ANA_BIAS_CUR_3 … #define RT5663_ANA_BIAS_CUR_4 … #define RT5663_ANA_BIAS_CUR_5 … #define RT5663_ANA_BIAS_CUR_6 … #define RT5663_BIAS_CUR_5 … #define RT5663_BIAS_CUR_6 … #define RT5663_BIAS_CUR_7 … #define RT5663_BIAS_CUR_8 … #define RT5663_DACREF_LDO … #define RT5663_DUMMY_REG_3 … #define RT5663_BIAS_CUR_9 … #define RT5663_DUMMY_REG_4 … #define RT5663_VREFADJ_OP … #define RT5663_VREF_RECMIX … #define RT5663_CHARGE_PUMP_1 … #define RT5663_CHARGE_PUMP_1_2 … #define RT5663_CHARGE_PUMP_1_3 … #define RT5663_CHARGE_PUMP_2 … #define RT5663_DIG_IN_PIN1 … #define RT5663_PAD_DRV_CTL … #define RT5663_PLL_INT_REG … #define RT5663_CHOP_DAC_L … #define RT5663_CHOP_ADC … #define RT5663_CALIB_ADC … #define RT5663_CHOP_DAC_R … #define RT5663_DUMMY_CTL_DACLR … #define RT5663_DUMMY_REG_5 … #define RT5663_SOFT_RAMP … #define RT5663_TEST_MODE_1 … #define RT5663_TEST_MODE_2 … #define RT5663_TEST_MODE_3 … #define RT5663_TEST_MODE_4 … #define RT5663_TEST_MODE_5 … #define RT5663_STO_DRE_1 … #define RT5663_STO_DRE_2 … #define RT5663_STO_DRE_3 … #define RT5663_STO_DRE_4 … #define RT5663_STO_DRE_5 … #define RT5663_STO_DRE_6 … #define RT5663_STO_DRE_7 … #define RT5663_STO_DRE_8 … #define RT5663_STO_DRE_9 … #define RT5663_STO_DRE_10 … #define RT5663_MIC_DECRO_1 … #define RT5663_MIC_DECRO_2 … #define RT5663_MIC_DECRO_3 … #define RT5663_MIC_DECRO_4 … #define RT5663_MIC_DECRO_5 … #define RT5663_MIC_DECRO_6 … #define RT5663_HP_DECRO_1 … #define RT5663_HP_DECRO_2 … #define RT5663_HP_DECRO_3 … #define RT5663_HP_DECRO_4 … #define RT5663_HP_DECOUP … #define RT5663_HP_IMP_SEN_MAP8 … #define RT5663_HP_IMP_SEN_MAP9 … #define RT5663_HP_IMP_SEN_MAP10 … #define RT5663_HP_IMP_SEN_MAP11 … #define RT5663_HP_IMP_SEN_1 … #define RT5663_HP_IMP_SEN_2 … #define RT5663_HP_IMP_SEN_3 … #define RT5663_HP_IMP_SEN_4 … #define RT5663_HP_IMP_SEN_5 … #define RT5663_HP_IMP_SEN_6 … #define RT5663_HP_IMP_SEN_7 … #define RT5663_HP_IMP_SEN_8 … #define RT5663_HP_IMP_SEN_9 … #define RT5663_HP_IMP_SEN_10 … #define RT5663_HP_IMP_SEN_11 … #define RT5663_HP_IMP_SEN_12 … #define RT5663_HP_IMP_SEN_13 … #define RT5663_HP_IMP_SEN_14 … #define RT5663_HP_IMP_SEN_15 … #define RT5663_HP_IMP_SEN_16 … #define RT5663_HP_IMP_SEN_17 … #define RT5663_HP_IMP_SEN_18 … #define RT5663_HP_IMP_SEN_19 … #define RT5663_HP_IMPSEN_DIG5 … #define RT5663_HP_IMPSEN_MAP1 … #define RT5663_HP_IMPSEN_MAP2 … #define RT5663_HP_IMPSEN_MAP3 … #define RT5663_HP_IMPSEN_MAP4 … #define RT5663_HP_IMPSEN_MAP5 … #define RT5663_HP_IMPSEN_MAP7 … #define RT5663_HP_LOGIC_1 … #define RT5663_HP_LOGIC_2 … #define RT5663_HP_CALIB_1 … #define RT5663_HP_CALIB_1_1 … #define RT5663_HP_CALIB_2 … #define RT5663_HP_CALIB_3 … #define RT5663_HP_CALIB_4 … #define RT5663_HP_CALIB_5 … #define RT5663_HP_CALIB_5_1 … #define RT5663_HP_CALIB_6 … #define RT5663_HP_CALIB_7 … #define RT5663_HP_CALIB_9 … #define RT5663_HP_CALIB_10 … #define RT5663_HP_CALIB_11 … #define RT5663_HP_CALIB_ST1 … #define RT5663_HP_CALIB_ST2 … #define RT5663_HP_CALIB_ST3 … #define RT5663_HP_CALIB_ST4 … #define RT5663_HP_CALIB_ST5 … #define RT5663_HP_CALIB_ST6 … #define RT5663_HP_CALIB_ST7 … #define RT5663_HP_CALIB_ST8 … #define RT5663_HP_CALIB_ST9 … #define RT5663_HP_AMP_DET … #define RT5663_DUMMY_REG_6 … #define RT5663_HP_BIAS … #define RT5663_CBJ_1 … #define RT5663_CBJ_2 … #define RT5663_CBJ_3 … #define RT5663_DUMMY_1 … #define RT5663_DUMMY_2 … #define RT5663_DUMMY_3 … #define RT5663_ANA_JD … #define RT5663_ADC_LCH_LPF1_A1 … #define RT5663_ADC_RCH_LPF1_A1 … #define RT5663_ADC_LCH_LPF1_H0 … #define RT5663_ADC_RCH_LPF1_H0 … #define RT5663_ADC_LCH_BPF1_A1 … #define RT5663_ADC_RCH_BPF1_A1 … #define RT5663_ADC_LCH_BPF1_A2 … #define RT5663_ADC_RCH_BPF1_A2 … #define RT5663_ADC_LCH_BPF1_H0 … #define RT5663_ADC_RCH_BPF1_H0 … #define RT5663_ADC_LCH_BPF2_A1 … #define RT5663_ADC_RCH_BPF2_A1 … #define RT5663_ADC_LCH_BPF2_A2 … #define RT5663_ADC_RCH_BPF2_A2 … #define RT5663_ADC_LCH_BPF2_H0 … #define RT5663_ADC_RCH_BPF2_H0 … #define RT5663_ADC_LCH_BPF3_A1 … #define RT5663_ADC_RCH_BPF3_A1 … #define RT5663_ADC_LCH_BPF3_A2 … #define RT5663_ADC_RCH_BPF3_A2 … #define RT5663_ADC_LCH_BPF3_H0 … #define RT5663_ADC_RCH_BPF3_H0 … #define RT5663_ADC_LCH_BPF4_A1 … #define RT5663_ADC_RCH_BPF4_A1 … #define RT5663_ADC_LCH_BPF4_A2 … #define RT5663_ADC_RCH_BPF4_A2 … #define RT5663_ADC_LCH_BPF4_H0 … #define RT5663_ADC_RCH_BPF4_H0 … #define RT5663_ADC_LCH_HPF1_A1 … #define RT5663_ADC_RCH_HPF1_A1 … #define RT5663_ADC_LCH_HPF1_H0 … #define RT5663_ADC_RCH_HPF1_H0 … #define RT5663_ADC_EQ_PRE_VOL_L … #define RT5663_ADC_EQ_PRE_VOL_R … #define RT5663_ADC_EQ_POST_VOL_L … #define RT5663_ADC_EQ_POST_VOL_R … /* RECMIX Control (0x0010) */ #define RT5663_RECMIX1_BST1_MASK … #define RT5663_RECMIX1_BST1_SHIFT … #define RT5663_RECMIX1_BST1_ON … #define RT5663_RECMIX1_BST1_OFF … /* Bypass Stereo1 DAC Mixer Control (0x002d) */ #define RT5663_DACL1_SRC_MASK … #define RT5663_DACL1_SRC_SHIFT … #define RT5663_DACR1_SRC_MASK … #define RT5663_DACR1_SRC_SHIFT … /* TDM control 2 (0x0078) */ #define RT5663_DATA_SWAP_ADCDAT1_MASK … #define RT5663_DATA_SWAP_ADCDAT1_SHIFT … #define RT5663_DATA_SWAP_ADCDAT1_LR … #define RT5663_DATA_SWAP_ADCDAT1_RL … #define RT5663_DATA_SWAP_ADCDAT1_LL … #define RT5663_DATA_SWAP_ADCDAT1_RR … /* TDM control 5 (0x007b) */ #define RT5663_TDM_LENGTN_MASK … #define RT5663_TDM_LENGTN_SHIFT … #define RT5663_TDM_LENGTN_16 … #define RT5663_TDM_LENGTN_20 … #define RT5663_TDM_LENGTN_24 … #define RT5663_TDM_LENGTN_32 … /* PLL tracking mode 1 (0x0083) */ #define RT5663_I2S1_ASRC_MASK … #define RT5663_I2S1_ASRC_SHIFT … #define RT5663_DAC_STO1_ASRC_MASK … #define RT5663_DAC_STO1_ASRC_SHIFT … #define RT5663_ADC_STO1_ASRC_MASK … #define RT5663_ADC_STO1_ASRC_SHIFT … /* PLL tracking mode 2 (0x0084)*/ #define RT5663_DA_STO1_TRACK_MASK … #define RT5663_DA_STO1_TRACK_SHIFT … #define RT5663_DA_STO1_TRACK_SYSCLK … #define RT5663_DA_STO1_TRACK_I2S1 … #define RT5663_AD_STO1_TRACK_MASK … #define RT5663_AD_STO1_TRACK_SHIFT … #define RT5663_AD_STO1_TRACK_SYSCLK … #define RT5663_AD_STO1_TRACK_I2S1 … /* HPOUT Charge pump control 1 (0x0091) */ #define RT5663_SI_HP_MASK … #define RT5663_SI_HP_SHIFT … #define RT5663_SI_HP_EN … #define RT5663_SI_HP_DIS … /* GPIO Control 2 (0x00b6) */ #define RT5663_GP1_PIN_CONF_MASK … #define RT5663_GP1_PIN_CONF_SHIFT … #define RT5663_GP1_PIN_CONF_OUTPUT … #define RT5663_GP1_PIN_CONF_INPUT … /* GPIO Control 2 (0x00b7) */ #define RT5663_EN_IRQ_INLINE_MASK … #define RT5663_EN_IRQ_INLINE_SHIFT … #define RT5663_EN_IRQ_INLINE_NOR … #define RT5663_EN_IRQ_INLINE_BYP … /* GPIO Control 1 (0x00c0) */ #define RT5663_GPIO1_TYPE_MASK … #define RT5663_GPIO1_TYPE_SHIFT … #define RT5663_GPIO1_TYPE_EN … #define RT5663_GPIO1_TYPE_DIS … /* IRQ Control 1 (0x00c1) */ #define RT5663_EN_IRQ_JD1_MASK … #define RT5663_EN_IRQ_JD1_SHIFT … #define RT5663_EN_IRQ_JD1_EN … #define RT5663_EN_IRQ_JD1_DIS … #define RT5663_SEL_GPIO1_MASK … #define RT5663_SEL_GPIO1_SHIFT … #define RT5663_SEL_GPIO1_EN … #define RT5663_SEL_GPIO1_DIS … /* Inline Command Function 2 (0x00dc) */ #define RT5663_PWR_MIC_DET_MASK … #define RT5663_PWR_MIC_DET_SHIFT … #define RT5663_PWR_MIC_DET_ON … #define RT5663_PWR_MIC_DET_OFF … /* Embeeded Jack and Type Detection Control 1 (0x00e6)*/ #define RT5663_CBJ_DET_MASK … #define RT5663_CBJ_DET_SHIFT … #define RT5663_CBJ_DET_DIS … #define RT5663_CBJ_DET_EN … #define RT5663_EXT_JD_MASK … #define RT5663_EXT_JD_SHIFT … #define RT5663_EXT_JD_EN … #define RT5663_EXT_JD_DIS … #define RT5663_POL_EXT_JD_MASK … #define RT5663_POL_EXT_JD_SHIFT … #define RT5663_POL_EXT_JD_EN … #define RT5663_POL_EXT_JD_DIS … #define RT5663_EM_JD_MASK … #define RT5663_EM_JD_SHIFT … #define RT5663_EM_JD_NOR … #define RT5663_EM_JD_RST … /* DACREF LDO Control (0x0112)*/ #define RT5663_PWR_LDO_DACREFL_MASK … #define RT5663_PWR_LDO_DACREFL_SHIFT … #define RT5663_PWR_LDO_DACREFR_MASK … #define RT5663_PWR_LDO_DACREFR_SHIFT … /* Stereo Dynamic Range Enhancement Control 9 (0x0168, 0x0169)*/ #define RT5663_DRE_GAIN_HP_MASK … #define RT5663_DRE_GAIN_HP_SHIFT … /* Combo Jack Control (0x0250) */ #define RT5663_INBUF_CBJ_BST1_MASK … #define RT5663_INBUF_CBJ_BST1_SHIFT … #define RT5663_INBUF_CBJ_BST1_ON … #define RT5663_INBUF_CBJ_BST1_OFF … #define RT5663_CBJ_SENSE_BST1_MASK … #define RT5663_CBJ_SENSE_BST1_SHIFT … #define RT5663_CBJ_SENSE_BST1_L … #define RT5663_CBJ_SENSE_BST1_R … /* Combo Jack Control (0x0251) */ #define RT5663_GAIN_BST1_MASK … #define RT5663_GAIN_BST1_SHIFT … /* Dummy register 1 (0x02fa) */ #define RT5663_EMB_CLK_MASK … #define RT5663_EMB_CLK_SHIFT … #define RT5663_EMB_CLK_EN … #define RT5663_EMB_CLK_DIS … #define RT5663_HPA_CPL_BIAS_MASK … #define RT5663_HPA_CPL_BIAS_SHIFT … #define RT5663_HPA_CPL_BIAS_0_5 … #define RT5663_HPA_CPL_BIAS_1 … #define RT5663_HPA_CPL_BIAS_2 … #define RT5663_HPA_CPL_BIAS_3 … #define RT5663_HPA_CPL_BIAS_4_1 … #define RT5663_HPA_CPL_BIAS_4_2 … #define RT5663_HPA_CPL_BIAS_6 … #define RT5663_HPA_CPL_BIAS_8 … #define RT5663_HPA_CPR_BIAS_MASK … #define RT5663_HPA_CPR_BIAS_SHIFT … #define RT5663_HPA_CPR_BIAS_0_5 … #define RT5663_HPA_CPR_BIAS_1 … #define RT5663_HPA_CPR_BIAS_2 … #define RT5663_HPA_CPR_BIAS_3 … #define RT5663_HPA_CPR_BIAS_4_1 … #define RT5663_HPA_CPR_BIAS_4_2 … #define RT5663_HPA_CPR_BIAS_6 … #define RT5663_HPA_CPR_BIAS_8 … #define RT5663_DUMMY_BIAS_MASK … #define RT5663_DUMMY_BIAS_SHIFT … #define RT5663_DUMMY_BIAS_0_5 … #define RT5663_DUMMY_BIAS_1 … #define RT5663_DUMMY_BIAS_2 … #define RT5663_DUMMY_BIAS_3 … #define RT5663_DUMMY_BIAS_4_1 … #define RT5663_DUMMY_BIAS_4_2 … #define RT5663_DUMMY_BIAS_6 … #define RT5663_DUMMY_BIAS_8 … /* System Clock Source */ enum { … }; /* PLL1 Source */ enum { … }; enum { … }; /* asrc clock source */ enum { … }; /* filter mask */ enum { … }; int rt5663_sel_asrc_clk_src(struct snd_soc_component *component, unsigned int filter_mask, unsigned int clk_src); #endif /* __RT5663_H__ */
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