/* SPDX-License-Identifier: GPL-2.0-only */ /* * rt5659.h -- RT5659/RT5658 ALSA SoC audio driver * * Copyright 2015 Realtek Microelectronics * Author: Bard Liao <[email protected]> */ #ifndef __RT5659_H__ #define __RT5659_H__ #include <sound/rt5659.h> #define DEVICE_ID … /* Info */ #define RT5659_RESET … #define RT5659_VENDOR_ID … #define RT5659_VENDOR_ID_1 … #define RT5659_DEVICE_ID … /* I/O - Output */ #define RT5659_SPO_VOL … #define RT5659_HP_VOL … #define RT5659_LOUT … #define RT5659_MONO_OUT … #define RT5659_HPL_GAIN … #define RT5659_HPR_GAIN … #define RT5659_MONO_GAIN … #define RT5659_SPDIF_CTRL_1 … #define RT5659_SPDIF_CTRL_2 … /* I/O - Input */ #define RT5659_CAL_BST_CTRL … #define RT5659_IN1_IN2 … #define RT5659_IN3_IN4 … #define RT5659_INL1_INR1_VOL … /* I/O - Speaker */ #define RT5659_EJD_CTRL_1 … #define RT5659_EJD_CTRL_2 … #define RT5659_EJD_CTRL_3 … #define RT5659_SILENCE_CTRL … #define RT5659_PSV_CTRL … /* I/O - Sidetone */ #define RT5659_SIDETONE_CTRL … /* I/O - ADC/DAC/DMIC */ #define RT5659_DAC1_DIG_VOL … #define RT5659_DAC2_DIG_VOL … #define RT5659_DAC_CTRL … #define RT5659_STO1_ADC_DIG_VOL … #define RT5659_MONO_ADC_DIG_VOL … #define RT5659_STO2_ADC_DIG_VOL … #define RT5659_STO1_BOOST … #define RT5659_MONO_BOOST … #define RT5659_STO2_BOOST … #define RT5659_HP_IMP_GAIN_1 … #define RT5659_HP_IMP_GAIN_2 … /* Mixer - D-D */ #define RT5659_STO1_ADC_MIXER … #define RT5659_MONO_ADC_MIXER … #define RT5659_AD_DA_MIXER … #define RT5659_STO_DAC_MIXER … #define RT5659_MONO_DAC_MIXER … #define RT5659_DIG_MIXER … #define RT5659_A_DAC_MUX … #define RT5659_DIG_INF23_DATA … /* Mixer - PDM */ #define RT5659_PDM_OUT_CTRL … #define RT5659_PDM_DATA_CTRL_1 … #define RT5659_PDM_DATA_CTRL_2 … #define RT5659_PDM_DATA_CTRL_3 … #define RT5659_PDM_DATA_CTRL_4 … #define RT5659_SPDIF_CTRL … /* Mixer - ADC */ #define RT5659_REC1_GAIN … #define RT5659_REC1_L1_MIXER … #define RT5659_REC1_L2_MIXER … #define RT5659_REC1_R1_MIXER … #define RT5659_REC1_R2_MIXER … #define RT5659_CAL_REC … #define RT5659_REC2_L1_MIXER … #define RT5659_REC2_L2_MIXER … #define RT5659_REC2_R1_MIXER … #define RT5659_REC2_R2_MIXER … #define RT5659_RC_CLK_CTRL … /* Mixer - DAC */ #define RT5659_SPK_L_MIXER … #define RT5659_SPK_R_MIXER … #define RT5659_SPO_AMP_GAIN … #define RT5659_ALC_BACK_GAIN … #define RT5659_MONOMIX_GAIN … #define RT5659_MONOMIX_IN_GAIN … #define RT5659_OUT_L_GAIN … #define RT5659_OUT_L_MIXER … #define RT5659_OUT_R_GAIN … #define RT5659_OUT_R_MIXER … #define RT5659_LOUT_MIXER … #define RT5659_HAPTIC_GEN_CTRL_1 … #define RT5659_HAPTIC_GEN_CTRL_2 … #define RT5659_HAPTIC_GEN_CTRL_3 … #define RT5659_HAPTIC_GEN_CTRL_4 … #define RT5659_HAPTIC_GEN_CTRL_5 … #define RT5659_HAPTIC_GEN_CTRL_6 … #define RT5659_HAPTIC_GEN_CTRL_7 … #define RT5659_HAPTIC_GEN_CTRL_8 … #define RT5659_HAPTIC_GEN_CTRL_9 … #define RT5659_HAPTIC_GEN_CTRL_10 … #define RT5659_HAPTIC_GEN_CTRL_11 … #define RT5659_HAPTIC_LPF_CTRL_1 … #define RT5659_HAPTIC_LPF_CTRL_2 … #define RT5659_HAPTIC_LPF_CTRL_3 … /* Power */ #define RT5659_PWR_DIG_1 … #define RT5659_PWR_DIG_2 … #define RT5659_PWR_ANLG_1 … #define RT5659_PWR_ANLG_2 … #define RT5659_PWR_ANLG_3 … #define RT5659_PWR_MIXER … #define RT5659_PWR_VOL … /* Private Register Control */ #define RT5659_PRIV_INDEX … #define RT5659_CLK_DET … #define RT5659_PRIV_DATA … /* System Clock Pre Divider Gating Control */ #define RT5659_PRE_DIV_1 … #define RT5659_PRE_DIV_2 … /* Format - ADC/DAC */ #define RT5659_I2S1_SDP … #define RT5659_I2S2_SDP … #define RT5659_I2S3_SDP … #define RT5659_ADDA_CLK_1 … #define RT5659_ADDA_CLK_2 … #define RT5659_DMIC_CTRL_1 … #define RT5659_DMIC_CTRL_2 … /* Format - TDM Control */ #define RT5659_TDM_CTRL_1 … #define RT5659_TDM_CTRL_2 … #define RT5659_TDM_CTRL_3 … #define RT5659_TDM_CTRL_4 … #define RT5659_TDM_CTRL_5 … /* Function - Analog */ #define RT5659_GLB_CLK … #define RT5659_PLL_CTRL_1 … #define RT5659_PLL_CTRL_2 … #define RT5659_ASRC_1 … #define RT5659_ASRC_2 … #define RT5659_ASRC_3 … #define RT5659_ASRC_4 … #define RT5659_ASRC_5 … #define RT5659_ASRC_6 … #define RT5659_ASRC_7 … #define RT5659_ASRC_8 … #define RT5659_ASRC_9 … #define RT5659_ASRC_10 … #define RT5659_DEPOP_1 … #define RT5659_DEPOP_2 … #define RT5659_DEPOP_3 … #define RT5659_HP_CHARGE_PUMP_1 … #define RT5659_HP_CHARGE_PUMP_2 … #define RT5659_MICBIAS_1 … #define RT5659_MICBIAS_2 … #define RT5659_ASRC_11 … #define RT5659_ASRC_12 … #define RT5659_ASRC_13 … #define RT5659_REC_M1_M2_GAIN_CTRL … #define RT5659_CLASSD_CTRL_1 … #define RT5659_CLASSD_CTRL_2 … /* Function - Digital */ #define RT5659_ADC_EQ_CTRL_1 … #define RT5659_ADC_EQ_CTRL_2 … #define RT5659_DAC_EQ_CTRL_1 … #define RT5659_DAC_EQ_CTRL_2 … #define RT5659_DAC_EQ_CTRL_3 … #define RT5659_IRQ_CTRL_1 … #define RT5659_IRQ_CTRL_2 … #define RT5659_IRQ_CTRL_3 … #define RT5659_IRQ_CTRL_4 … #define RT5659_IRQ_CTRL_5 … #define RT5659_IRQ_CTRL_6 … #define RT5659_INT_ST_1 … #define RT5659_INT_ST_2 … #define RT5659_GPIO_CTRL_1 … #define RT5659_GPIO_CTRL_2 … #define RT5659_GPIO_CTRL_3 … #define RT5659_GPIO_CTRL_4 … #define RT5659_GPIO_CTRL_5 … #define RT5659_GPIO_STA … #define RT5659_SINE_GEN_CTRL_1 … #define RT5659_SINE_GEN_CTRL_2 … #define RT5659_SINE_GEN_CTRL_3 … #define RT5659_HP_AMP_DET_CTRL_1 … #define RT5659_HP_AMP_DET_CTRL_2 … #define RT5659_SV_ZCD_1 … #define RT5659_SV_ZCD_2 … #define RT5659_IL_CMD_1 … #define RT5659_IL_CMD_2 … #define RT5659_IL_CMD_3 … #define RT5659_IL_CMD_4 … #define RT5659_4BTN_IL_CMD_1 … #define RT5659_4BTN_IL_CMD_2 … #define RT5659_4BTN_IL_CMD_3 … #define RT5659_PSV_IL_CMD_1 … #define RT5659_PSV_IL_CMD_2 … #define RT5659_ADC_STO1_HP_CTRL_1 … #define RT5659_ADC_STO1_HP_CTRL_2 … #define RT5659_ADC_MONO_HP_CTRL_1 … #define RT5659_ADC_MONO_HP_CTRL_2 … #define RT5659_AJD1_CTRL … #define RT5659_AJD2_AJD3_CTRL … #define RT5659_JD1_THD … #define RT5659_JD2_THD … #define RT5659_JD3_THD … #define RT5659_JD_CTRL_1 … #define RT5659_JD_CTRL_2 … #define RT5659_JD_CTRL_3 … #define RT5659_JD_CTRL_4 … /* General Control */ #define RT5659_DIG_MISC … #define RT5659_DUMMY_2 … #define RT5659_DUMMY_3 … #define RT5659_DAC_ADC_DIG_VOL … #define RT5659_BIAS_CUR_CTRL_1 … #define RT5659_BIAS_CUR_CTRL_2 … #define RT5659_BIAS_CUR_CTRL_3 … #define RT5659_BIAS_CUR_CTRL_4 … #define RT5659_BIAS_CUR_CTRL_5 … #define RT5659_BIAS_CUR_CTRL_6 … #define RT5659_BIAS_CUR_CTRL_7 … #define RT5659_BIAS_CUR_CTRL_8 … #define RT5659_BIAS_CUR_CTRL_9 … #define RT5659_BIAS_CUR_CTRL_10 … #define RT5659_MEMORY_TEST … #define RT5659_VREF_REC_OP_FB_CAP_CTRL … #define RT5659_CLASSD_0 … #define RT5659_CLASSD_1 … #define RT5659_CLASSD_2 … #define RT5659_CLASSD_3 … #define RT5659_CLASSD_4 … #define RT5659_CLASSD_5 … #define RT5659_CLASSD_6 … #define RT5659_CLASSD_7 … #define RT5659_CLASSD_8 … #define RT5659_CLASSD_9 … #define RT5659_CLASSD_10 … #define RT5659_CHARGE_PUMP_1 … #define RT5659_CHARGE_PUMP_2 … #define RT5659_DIG_IN_CTRL_1 … #define RT5659_DIG_IN_CTRL_2 … #define RT5659_PAD_DRIVING_CTRL … #define RT5659_SOFT_RAMP_DEPOP … #define RT5659_PLL … #define RT5659_CHOP_DAC … #define RT5659_CHOP_ADC … #define RT5659_CALIB_ADC_CTRL … #define RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL … #define RT5659_VOL_TEST … #define RT5659_TEST_MODE_CTRL_1 … #define RT5659_TEST_MODE_CTRL_2 … #define RT5659_TEST_MODE_CTRL_3 … #define RT5659_TEST_MODE_CTRL_4 … #define RT5659_BASSBACK_CTRL … #define RT5659_MP3_PLUS_CTRL_1 … #define RT5659_MP3_PLUS_CTRL_2 … #define RT5659_MP3_HPF_A1 … #define RT5659_MP3_HPF_A2 … #define RT5659_MP3_HPF_H0 … #define RT5659_MP3_LPF_H0 … #define RT5659_3D_SPK_CTRL … #define RT5659_3D_SPK_COEF_1 … #define RT5659_3D_SPK_COEF_2 … #define RT5659_3D_SPK_COEF_3 … #define RT5659_3D_SPK_COEF_4 … #define RT5659_3D_SPK_COEF_5 … #define RT5659_3D_SPK_COEF_6 … #define RT5659_3D_SPK_COEF_7 … #define RT5659_STO_NG2_CTRL_1 … #define RT5659_STO_NG2_CTRL_2 … #define RT5659_STO_NG2_CTRL_3 … #define RT5659_STO_NG2_CTRL_4 … #define RT5659_STO_NG2_CTRL_5 … #define RT5659_STO_NG2_CTRL_6 … #define RT5659_STO_NG2_CTRL_7 … #define RT5659_STO_NG2_CTRL_8 … #define RT5659_MONO_NG2_CTRL_1 … #define RT5659_MONO_NG2_CTRL_2 … #define RT5659_MONO_NG2_CTRL_3 … #define RT5659_MONO_NG2_CTRL_4 … #define RT5659_MONO_NG2_CTRL_5 … #define RT5659_MONO_NG2_CTRL_6 … #define RT5659_MID_HP_AMP_DET … #define RT5659_LOW_HP_AMP_DET … #define RT5659_LDO_CTRL … #define RT5659_HP_DECROSS_CTRL_1 … #define RT5659_HP_DECROSS_CTRL_2 … #define RT5659_HP_DECROSS_CTRL_3 … #define RT5659_HP_DECROSS_CTRL_4 … #define RT5659_HP_IMP_SENS_CTRL_1 … #define RT5659_HP_IMP_SENS_CTRL_2 … #define RT5659_HP_IMP_SENS_CTRL_3 … #define RT5659_HP_IMP_SENS_CTRL_4 … #define RT5659_HP_IMP_SENS_MAP_1 … #define RT5659_HP_IMP_SENS_MAP_2 … #define RT5659_HP_IMP_SENS_MAP_3 … #define RT5659_HP_IMP_SENS_MAP_4 … #define RT5659_HP_IMP_SENS_MAP_5 … #define RT5659_HP_IMP_SENS_MAP_6 … #define RT5659_HP_IMP_SENS_MAP_7 … #define RT5659_HP_IMP_SENS_MAP_8 … #define RT5659_HP_LOGIC_CTRL_1 … #define RT5659_HP_LOGIC_CTRL_2 … #define RT5659_HP_CALIB_CTRL_1 … #define RT5659_HP_CALIB_CTRL_2 … #define RT5659_HP_CALIB_CTRL_3 … #define RT5659_HP_CALIB_CTRL_4 … #define RT5659_HP_CALIB_CTRL_5 … #define RT5659_HP_CALIB_CTRL_6 … #define RT5659_HP_CALIB_CTRL_7 … #define RT5659_HP_CALIB_CTRL_9 … #define RT5659_HP_CALIB_CTRL_10 … #define RT5659_HP_CALIB_CTRL_11 … #define RT5659_HP_CALIB_STA_1 … #define RT5659_HP_CALIB_STA_2 … #define RT5659_HP_CALIB_STA_3 … #define RT5659_HP_CALIB_STA_4 … #define RT5659_HP_CALIB_STA_5 … #define RT5659_HP_CALIB_STA_6 … #define RT5659_HP_CALIB_STA_7 … #define RT5659_HP_CALIB_STA_8 … #define RT5659_HP_CALIB_STA_9 … #define RT5659_MONO_AMP_CALIB_CTRL_1 … #define RT5659_MONO_AMP_CALIB_CTRL_2 … #define RT5659_MONO_AMP_CALIB_CTRL_3 … #define RT5659_MONO_AMP_CALIB_CTRL_4 … #define RT5659_MONO_AMP_CALIB_CTRL_5 … #define RT5659_MONO_AMP_CALIB_STA_1 … #define RT5659_MONO_AMP_CALIB_STA_2 … #define RT5659_MONO_AMP_CALIB_STA_3 … #define RT5659_MONO_AMP_CALIB_STA_4 … #define RT5659_SPK_PWR_LMT_CTRL_1 … #define RT5659_SPK_PWR_LMT_CTRL_2 … #define RT5659_SPK_PWR_LMT_CTRL_3 … #define RT5659_SPK_PWR_LMT_STA_1 … #define RT5659_SPK_PWR_LMT_STA_2 … #define RT5659_SPK_PWR_LMT_STA_3 … #define RT5659_SPK_PWR_LMT_STA_4 … #define RT5659_SPK_PWR_LMT_STA_5 … #define RT5659_SPK_PWR_LMT_STA_6 … #define RT5659_FLEX_SPK_BST_CTRL_1 … #define RT5659_FLEX_SPK_BST_CTRL_2 … #define RT5659_FLEX_SPK_BST_CTRL_3 … #define RT5659_FLEX_SPK_BST_CTRL_4 … #define RT5659_SPK_EX_LMT_CTRL_1 … #define RT5659_SPK_EX_LMT_CTRL_2 … #define RT5659_SPK_EX_LMT_CTRL_3 … #define RT5659_SPK_EX_LMT_CTRL_4 … #define RT5659_SPK_EX_LMT_CTRL_5 … #define RT5659_SPK_EX_LMT_CTRL_6 … #define RT5659_SPK_EX_LMT_CTRL_7 … #define RT5659_ADJ_HPF_CTRL_1 … #define RT5659_ADJ_HPF_CTRL_2 … #define RT5659_SPK_DC_CAILB_CTRL_1 … #define RT5659_SPK_DC_CAILB_CTRL_2 … #define RT5659_SPK_DC_CAILB_CTRL_3 … #define RT5659_SPK_DC_CAILB_CTRL_4 … #define RT5659_SPK_DC_CAILB_CTRL_5 … #define RT5659_SPK_DC_CAILB_STA_1 … #define RT5659_SPK_DC_CAILB_STA_2 … #define RT5659_SPK_DC_CAILB_STA_3 … #define RT5659_SPK_DC_CAILB_STA_4 … #define RT5659_SPK_DC_CAILB_STA_5 … #define RT5659_SPK_DC_CAILB_STA_6 … #define RT5659_SPK_DC_CAILB_STA_7 … #define RT5659_SPK_DC_CAILB_STA_8 … #define RT5659_SPK_DC_CAILB_STA_9 … #define RT5659_SPK_DC_CAILB_STA_10 … #define RT5659_SPK_VDD_STA_1 … #define RT5659_SPK_VDD_STA_2 … #define RT5659_SPK_DC_DET_CTRL_1 … #define RT5659_SPK_DC_DET_CTRL_2 … #define RT5659_SPK_DC_DET_CTRL_3 … #define RT5659_PURE_DC_DET_CTRL_1 … #define RT5659_PURE_DC_DET_CTRL_2 … #define RT5659_DUMMY_4 … #define RT5659_DUMMY_5 … #define RT5659_DUMMY_6 … #define RT5659_DRC1_CTRL_1 … #define RT5659_DRC1_CTRL_2 … #define RT5659_DRC1_CTRL_3 … #define RT5659_DRC1_CTRL_4 … #define RT5659_DRC1_CTRL_5 … #define RT5659_DRC1_CTRL_6 … #define RT5659_DRC1_HARD_LMT_CTRL_1 … #define RT5659_DRC1_HARD_LMT_CTRL_2 … #define RT5659_DRC2_CTRL_1 … #define RT5659_DRC2_CTRL_2 … #define RT5659_DRC2_CTRL_3 … #define RT5659_DRC2_CTRL_4 … #define RT5659_DRC2_CTRL_5 … #define RT5659_DRC2_CTRL_6 … #define RT5659_DRC2_HARD_LMT_CTRL_1 … #define RT5659_DRC2_HARD_LMT_CTRL_2 … #define RT5659_DRC1_PRIV_1 … #define RT5659_DRC1_PRIV_2 … #define RT5659_DRC1_PRIV_3 … #define RT5659_DRC1_PRIV_4 … #define RT5659_DRC1_PRIV_5 … #define RT5659_DRC1_PRIV_6 … #define RT5659_DRC1_PRIV_7 … #define RT5659_DRC2_PRIV_1 … #define RT5659_DRC2_PRIV_2 … #define RT5659_DRC2_PRIV_3 … #define RT5659_DRC2_PRIV_4 … #define RT5659_DRC2_PRIV_5 … #define RT5659_DRC2_PRIV_6 … #define RT5659_DRC2_PRIV_7 … #define RT5659_MULTI_DRC_CTRL … #define RT5659_CROSS_OVER_1 … #define RT5659_CROSS_OVER_2 … #define RT5659_CROSS_OVER_3 … #define RT5659_CROSS_OVER_4 … #define RT5659_CROSS_OVER_5 … #define RT5659_CROSS_OVER_6 … #define RT5659_CROSS_OVER_7 … #define RT5659_CROSS_OVER_8 … #define RT5659_CROSS_OVER_9 … #define RT5659_CROSS_OVER_10 … #define RT5659_ALC_PGA_CTRL_1 … #define RT5659_ALC_PGA_CTRL_2 … #define RT5659_ALC_PGA_CTRL_3 … #define RT5659_ALC_PGA_CTRL_4 … #define RT5659_ALC_PGA_CTRL_5 … #define RT5659_ALC_PGA_CTRL_6 … #define RT5659_ALC_PGA_CTRL_7 … #define RT5659_ALC_PGA_CTRL_8 … #define RT5659_ALC_PGA_STA_1 … #define RT5659_ALC_PGA_STA_2 … #define RT5659_ALC_PGA_STA_3 … #define RT5659_DAC_L_EQ_PRE_VOL … #define RT5659_DAC_R_EQ_PRE_VOL … #define RT5659_DAC_L_EQ_POST_VOL … #define RT5659_DAC_R_EQ_POST_VOL … #define RT5659_DAC_L_EQ_LPF1_A1 … #define RT5659_DAC_L_EQ_LPF1_H0 … #define RT5659_DAC_R_EQ_LPF1_A1 … #define RT5659_DAC_R_EQ_LPF1_H0 … #define RT5659_DAC_L_EQ_BPF2_A1 … #define RT5659_DAC_L_EQ_BPF2_A2 … #define RT5659_DAC_L_EQ_BPF2_H0 … #define RT5659_DAC_R_EQ_BPF2_A1 … #define RT5659_DAC_R_EQ_BPF2_A2 … #define RT5659_DAC_R_EQ_BPF2_H0 … #define RT5659_DAC_L_EQ_BPF3_A1 … #define RT5659_DAC_L_EQ_BPF3_A2 … #define RT5659_DAC_L_EQ_BPF3_H0 … #define RT5659_DAC_R_EQ_BPF3_A1 … #define RT5659_DAC_R_EQ_BPF3_A2 … #define RT5659_DAC_R_EQ_BPF3_H0 … #define RT5659_DAC_L_EQ_BPF4_A1 … #define RT5659_DAC_L_EQ_BPF4_A2 … #define RT5659_DAC_L_EQ_BPF4_H0 … #define RT5659_DAC_R_EQ_BPF4_A1 … #define RT5659_DAC_R_EQ_BPF4_A2 … #define RT5659_DAC_R_EQ_BPF4_H0 … #define RT5659_DAC_L_EQ_HPF1_A1 … #define RT5659_DAC_L_EQ_HPF1_H0 … #define RT5659_DAC_R_EQ_HPF1_A1 … #define RT5659_DAC_R_EQ_HPF1_H0 … #define RT5659_DAC_L_EQ_HPF2_A1 … #define RT5659_DAC_L_EQ_HPF2_A2 … #define RT5659_DAC_L_EQ_HPF2_H0 … #define RT5659_DAC_R_EQ_HPF2_A1 … #define RT5659_DAC_R_EQ_HPF2_A2 … #define RT5659_DAC_R_EQ_HPF2_H0 … #define RT5659_DAC_L_BI_EQ_BPF1_H0_1 … #define RT5659_DAC_L_BI_EQ_BPF1_H0_2 … #define RT5659_DAC_L_BI_EQ_BPF1_B1_1 … #define RT5659_DAC_L_BI_EQ_BPF1_B1_2 … #define RT5659_DAC_L_BI_EQ_BPF1_B2_1 … #define RT5659_DAC_L_BI_EQ_BPF1_B2_2 … #define RT5659_DAC_L_BI_EQ_BPF1_A1_1 … #define RT5659_DAC_L_BI_EQ_BPF1_A1_2 … #define RT5659_DAC_L_BI_EQ_BPF1_A2_1 … #define RT5659_DAC_L_BI_EQ_BPF1_A2_2 … #define RT5659_DAC_R_BI_EQ_BPF1_H0_1 … #define RT5659_DAC_R_BI_EQ_BPF1_H0_2 … #define RT5659_DAC_R_BI_EQ_BPF1_B1_1 … #define RT5659_DAC_R_BI_EQ_BPF1_B1_2 … #define RT5659_DAC_R_BI_EQ_BPF1_B2_1 … #define RT5659_DAC_R_BI_EQ_BPF1_B2_2 … #define RT5659_DAC_R_BI_EQ_BPF1_A1_1 … #define RT5659_DAC_R_BI_EQ_BPF1_A1_2 … #define RT5659_DAC_R_BI_EQ_BPF1_A2_1 … #define RT5659_DAC_R_BI_EQ_BPF1_A2_2 … #define RT5659_ADC_L_EQ_LPF1_A1 … #define RT5659_ADC_R_EQ_LPF1_A1 … #define RT5659_ADC_L_EQ_LPF1_H0 … #define RT5659_ADC_R_EQ_LPF1_H0 … #define RT5659_ADC_L_EQ_BPF1_A1 … #define RT5659_ADC_R_EQ_BPF1_A1 … #define RT5659_ADC_L_EQ_BPF1_A2 … #define RT5659_ADC_R_EQ_BPF1_A2 … #define RT5659_ADC_L_EQ_BPF1_H0 … #define RT5659_ADC_R_EQ_BPF1_H0 … #define RT5659_ADC_L_EQ_BPF2_A1 … #define RT5659_ADC_R_EQ_BPF2_A1 … #define RT5659_ADC_L_EQ_BPF2_A2 … #define RT5659_ADC_R_EQ_BPF2_A2 … #define RT5659_ADC_L_EQ_BPF2_H0 … #define RT5659_ADC_R_EQ_BPF2_H0 … #define RT5659_ADC_L_EQ_BPF3_A1 … #define RT5659_ADC_R_EQ_BPF3_A1 … #define RT5659_ADC_L_EQ_BPF3_A2 … #define RT5659_ADC_R_EQ_BPF3_A2 … #define RT5659_ADC_L_EQ_BPF3_H0 … #define RT5659_ADC_R_EQ_BPF3_H0 … #define RT5659_ADC_L_EQ_BPF4_A1 … #define RT5659_ADC_R_EQ_BPF4_A1 … #define RT5659_ADC_L_EQ_BPF4_A2 … #define RT5659_ADC_R_EQ_BPF4_A2 … #define RT5659_ADC_L_EQ_BPF4_H0 … #define RT5659_ADC_R_EQ_BPF4_H0 … #define RT5659_ADC_L_EQ_HPF1_A1 … #define RT5659_ADC_R_EQ_HPF1_A1 … #define RT5659_ADC_L_EQ_HPF1_H0 … #define RT5659_ADC_R_EQ_HPF1_H0 … #define RT5659_ADC_L_EQ_PRE_VOL … #define RT5659_ADC_R_EQ_PRE_VOL … #define RT5659_ADC_L_EQ_POST_VOL … #define RT5659_ADC_R_EQ_POST_VOL … /* global definition */ #define RT5659_L_MUTE … #define RT5659_L_MUTE_SFT … #define RT5659_VOL_L_MUTE … #define RT5659_VOL_L_SFT … #define RT5659_R_MUTE … #define RT5659_R_MUTE_SFT … #define RT5659_VOL_R_MUTE … #define RT5659_VOL_R_SFT … #define RT5659_L_VOL_MASK … #define RT5659_L_VOL_SFT … #define RT5659_R_VOL_MASK … #define RT5659_R_VOL_SFT … /*Headphone Amp L/R Analog Gain and Digital NG2 Gain Control (0x0005 0x0006)*/ #define RT5659_G_HP … #define RT5659_G_HP_SFT … #define RT5659_G_STO_DA_DMIX … #define RT5659_G_STO_DA_SFT … /* IN1/IN2 Control (0x000c) */ #define RT5659_IN1_DF_MASK … #define RT5659_IN1_DF … #define RT5659_BST1_MASK … #define RT5659_BST1_SFT … #define RT5659_BST2_MASK … #define RT5659_BST2_SFT … /* IN3/IN4 Control (0x000d) */ #define RT5659_IN3_DF_MASK … #define RT5659_IN3_DF … #define RT5659_BST3_MASK … #define RT5659_BST3_SFT … #define RT5659_IN4_DF_MASK … #define RT5659_IN4_DF … #define RT5659_BST4_MASK … #define RT5659_BST4_SFT … /* INL and INR Volume Control (0x000f) */ #define RT5659_INL_VOL_MASK … #define RT5659_INL_VOL_SFT … #define RT5659_INR_VOL_MASK … #define RT5659_INR_VOL_SFT … /* Embeeded Jack and Type Detection Control 1 (0x0010) */ #define RT5659_EMB_JD_EN … #define RT5659_EMB_JD_EN_SFT … #define RT5659_JD_MODE … #define RT5659_JD_MODE_SFT … #define RT5659_EXT_JD_EN … #define RT5659_EXT_JD_EN_SFT … #define RT5659_EXT_JD_DIG … /* Embeeded Jack and Type Detection Control 2 (0x0011) */ #define RT5659_EXT_JD_SRC … #define RT5659_EXT_JD_SRC_SFT … #define RT5659_EXT_JD_SRC_GPIO_JD1 … #define RT5659_EXT_JD_SRC_GPIO_JD2 … #define RT5659_EXT_JD_SRC_JD1_1 … #define RT5659_EXT_JD_SRC_JD1_2 … #define RT5659_EXT_JD_SRC_JD2 … #define RT5659_EXT_JD_SRC_JD3 … #define RT5659_EXT_JD_SRC_MANUAL … /* Slience Detection Control (0x0015) */ #define RT5659_SIL_DET_MASK … #define RT5659_SIL_DET_DIS … #define RT5659_SIL_DET_EN … /* Sidetone Control (0x0018) */ #define RT5659_ST_SEL_MASK … #define RT5659_ST_SEL_SFT … #define RT5659_ST_EN … #define RT5659_ST_EN_SFT … /* DAC1 Digital Volume (0x0019) */ #define RT5659_DAC_L1_VOL_MASK … #define RT5659_DAC_L1_VOL_SFT … #define RT5659_DAC_R1_VOL_MASK … #define RT5659_DAC_R1_VOL_SFT … /* DAC2 Digital Volume (0x001a) */ #define RT5659_DAC_L2_VOL_MASK … #define RT5659_DAC_L2_VOL_SFT … #define RT5659_DAC_R2_VOL_MASK … #define RT5659_DAC_R2_VOL_SFT … /* DAC2 Control (0x001b) */ #define RT5659_M_DAC2_L_VOL … #define RT5659_M_DAC2_L_VOL_SFT … #define RT5659_M_DAC2_R_VOL … #define RT5659_M_DAC2_R_VOL_SFT … #define RT5659_DAC_L2_SEL_MASK … #define RT5659_DAC_L2_SEL_SFT … #define RT5659_DAC_R2_SEL_MASK … #define RT5659_DAC_R2_SEL_SFT … /* ADC Digital Volume Control (0x001c) */ #define RT5659_ADC_L_VOL_MASK … #define RT5659_ADC_L_VOL_SFT … #define RT5659_ADC_R_VOL_MASK … #define RT5659_ADC_R_VOL_SFT … /* Mono ADC Digital Volume Control (0x001d) */ #define RT5659_MONO_ADC_L_VOL_MASK … #define RT5659_MONO_ADC_L_VOL_SFT … #define RT5659_MONO_ADC_R_VOL_MASK … #define RT5659_MONO_ADC_R_VOL_SFT … /* Stereo1 ADC Boost Gain Control (0x001f) */ #define RT5659_STO1_ADC_L_BST_MASK … #define RT5659_STO1_ADC_L_BST_SFT … #define RT5659_STO1_ADC_R_BST_MASK … #define RT5659_STO1_ADC_R_BST_SFT … /* Mono ADC Boost Gain Control (0x0020) */ #define RT5659_MONO_ADC_L_BST_MASK … #define RT5659_MONO_ADC_L_BST_SFT … #define RT5659_MONO_ADC_R_BST_MASK … #define RT5659_MONO_ADC_R_BST_SFT … /* Stereo1 ADC Boost Gain Control (0x001f) */ #define RT5659_STO2_ADC_L_BST_MASK … #define RT5659_STO2_ADC_L_BST_SFT … #define RT5659_STO2_ADC_R_BST_MASK … #define RT5659_STO2_ADC_R_BST_SFT … /* Stereo ADC Mixer Control (0x0026) */ #define RT5659_M_STO1_ADC_L1 … #define RT5659_M_STO1_ADC_L1_SFT … #define RT5659_M_STO1_ADC_L2 … #define RT5659_M_STO1_ADC_L2_SFT … #define RT5659_STO1_ADC1_SRC_MASK … #define RT5659_STO1_ADC1_SRC_SFT … #define RT5659_STO1_ADC1_SRC_ADC … #define RT5659_STO1_ADC1_SRC_DACMIX … #define RT5659_STO1_ADC_SRC_MASK … #define RT5659_STO1_ADC_SRC_SFT … #define RT5659_STO1_ADC_SRC_ADC1 … #define RT5659_STO1_ADC_SRC_ADC2 … #define RT5659_STO1_ADC2_SRC_MASK … #define RT5659_STO1_ADC2_SRC_SFT … #define RT5659_STO1_DMIC_SRC_MASK … #define RT5659_STO1_DMIC_SRC_SFT … #define RT5659_STO1_DMIC_SRC_DMIC2 … #define RT5659_STO1_DMIC_SRC_DMIC1 … #define RT5659_M_STO1_ADC_R1 … #define RT5659_M_STO1_ADC_R1_SFT … #define RT5659_M_STO1_ADC_R2 … #define RT5659_M_STO1_ADC_R2_SFT … /* Mono1 ADC Mixer control (0x0027) */ #define RT5659_M_MONO_ADC_L1 … #define RT5659_M_MONO_ADC_L1_SFT … #define RT5659_M_MONO_ADC_L2 … #define RT5659_M_MONO_ADC_L2_SFT … #define RT5659_MONO_ADC_L2_SRC_MASK … #define RT5659_MONO_ADC_L2_SRC_SFT … #define RT5659_MONO_ADC_L1_SRC_MASK … #define RT5659_MONO_ADC_L1_SRC_SFT … #define RT5659_MONO_ADC_L_SRC_MASK … #define RT5659_MONO_ADC_L_SRC_SFT … #define RT5659_MONO_DMIC_L_SRC_MASK … #define RT5659_MONO_DMIC_L_SRC_SFT … #define RT5659_M_MONO_ADC_R1 … #define RT5659_M_MONO_ADC_R1_SFT … #define RT5659_M_MONO_ADC_R2 … #define RT5659_M_MONO_ADC_R2_SFT … #define RT5659_STO2_ADC_SRC_MASK … #define RT5659_STO2_ADC_SRC_SFT … #define RT5659_MONO_ADC_R2_SRC_MASK … #define RT5659_MONO_ADC_R2_SRC_SFT … #define RT5659_MONO_ADC_R1_SRC_MASK … #define RT5659_MONO_ADC_R1_SRC_SFT … #define RT5659_MONO_ADC_R_SRC_MASK … #define RT5659_MONO_ADC_R_SRC_SFT … #define RT5659_MONO_DMIC_R_SRC_MASK … #define RT5659_MONO_DMIC_R_SRC_SFT … /* ADC Mixer to DAC Mixer Control (0x0029) */ #define RT5659_M_ADCMIX_L … #define RT5659_M_ADCMIX_L_SFT … #define RT5659_M_DAC1_L … #define RT5659_M_DAC1_L_SFT … #define RT5659_DAC1_R_SEL_MASK … #define RT5659_DAC1_R_SEL_SFT … #define RT5659_DAC1_R_SEL_IF1 … #define RT5659_DAC1_R_SEL_IF2 … #define RT5659_DAC1_R_SEL_IF3 … #define RT5659_DAC1_L_SEL_MASK … #define RT5659_DAC1_L_SEL_SFT … #define RT5659_DAC1_L_SEL_IF1 … #define RT5659_DAC1_L_SEL_IF2 … #define RT5659_DAC1_L_SEL_IF3 … #define RT5659_M_ADCMIX_R … #define RT5659_M_ADCMIX_R_SFT … #define RT5659_M_DAC1_R … #define RT5659_M_DAC1_R_SFT … /* Stereo DAC Mixer Control (0x002a) */ #define RT5659_M_DAC_L1_STO_L … #define RT5659_M_DAC_L1_STO_L_SFT … #define RT5659_G_DAC_L1_STO_L_MASK … #define RT5659_G_DAC_L1_STO_L_SFT … #define RT5659_M_DAC_R1_STO_L … #define RT5659_M_DAC_R1_STO_L_SFT … #define RT5659_G_DAC_R1_STO_L_MASK … #define RT5659_G_DAC_R1_STO_L_SFT … #define RT5659_M_DAC_L2_STO_L … #define RT5659_M_DAC_L2_STO_L_SFT … #define RT5659_G_DAC_L2_STO_L_MASK … #define RT5659_G_DAC_L2_STO_L_SFT … #define RT5659_M_DAC_R2_STO_L … #define RT5659_M_DAC_R2_STO_L_SFT … #define RT5659_G_DAC_R2_STO_L_MASK … #define RT5659_G_DAC_R2_STO_L_SFT … #define RT5659_M_DAC_L1_STO_R … #define RT5659_M_DAC_L1_STO_R_SFT … #define RT5659_G_DAC_L1_STO_R_MASK … #define RT5659_G_DAC_L1_STO_R_SFT … #define RT5659_M_DAC_R1_STO_R … #define RT5659_M_DAC_R1_STO_R_SFT … #define RT5659_G_DAC_R1_STO_R_MASK … #define RT5659_G_DAC_R1_STO_R_SFT … #define RT5659_M_DAC_L2_STO_R … #define RT5659_M_DAC_L2_STO_R_SFT … #define RT5659_G_DAC_L2_STO_R_MASK … #define RT5659_G_DAC_L2_STO_R_SFT … #define RT5659_M_DAC_R2_STO_R … #define RT5659_M_DAC_R2_STO_R_SFT … #define RT5659_G_DAC_R2_STO_R_MASK … #define RT5659_G_DAC_R2_STO_R_SFT … /* Mono DAC Mixer Control (0x002b) */ #define RT5659_M_DAC_L1_MONO_L … #define RT5659_M_DAC_L1_MONO_L_SFT … #define RT5659_G_DAC_L1_MONO_L_MASK … #define RT5659_G_DAC_L1_MONO_L_SFT … #define RT5659_M_DAC_R1_MONO_L … #define RT5659_M_DAC_R1_MONO_L_SFT … #define RT5659_G_DAC_R1_MONO_L_MASK … #define RT5659_G_DAC_R1_MONO_L_SFT … #define RT5659_M_DAC_L2_MONO_L … #define RT5659_M_DAC_L2_MONO_L_SFT … #define RT5659_G_DAC_L2_MONO_L_MASK … #define RT5659_G_DAC_L2_MONO_L_SFT … #define RT5659_M_DAC_R2_MONO_L … #define RT5659_M_DAC_R2_MONO_L_SFT … #define RT5659_G_DAC_R2_MONO_L_MASK … #define RT5659_G_DAC_R2_MONO_L_SFT … #define RT5659_M_DAC_L1_MONO_R … #define RT5659_M_DAC_L1_MONO_R_SFT … #define RT5659_G_DAC_L1_MONO_R_MASK … #define RT5659_G_DAC_L1_MONO_R_SFT … #define RT5659_M_DAC_R1_MONO_R … #define RT5659_M_DAC_R1_MONO_R_SFT … #define RT5659_G_DAC_R1_MONO_R_MASK … #define RT5659_G_DAC_R1_MONO_R_SFT … #define RT5659_M_DAC_L2_MONO_R … #define RT5659_M_DAC_L2_MONO_R_SFT … #define RT5659_G_DAC_L2_MONO_R_MASK … #define RT5659_G_DAC_L2_MONO_R_SFT … #define RT5659_M_DAC_R2_MONO_R … #define RT5659_M_DAC_R2_MONO_R_SFT … #define RT5659_G_DAC_R2_MONO_R_MASK … #define RT5659_G_DAC_R2_MONO_R_SFT … /* Digital Mixer Control (0x002c) */ #define RT5659_M_DAC_MIX_L … #define RT5659_M_DAC_MIX_L_SFT … #define RT5659_DAC_MIX_L_MASK … #define RT5659_DAC_MIX_L_SFT … #define RT5659_M_DAC_MIX_R … #define RT5659_M_DAC_MIX_R_SFT … #define RT5659_DAC_MIX_R_MASK … #define RT5659_DAC_MIX_R_SFT … /* Analog DAC Input Source Control (0x002d) */ #define RT5659_A_DACL1_SEL … #define RT5659_A_DACL1_SFT … #define RT5659_A_DACR1_SEL … #define RT5659_A_DACR1_SFT … #define RT5659_A_DACL2_SEL … #define RT5659_A_DACL2_SFT … #define RT5659_A_DACR2_SEL … #define RT5659_A_DACR2_SFT … /* Digital Interface Data Control (0x002f) */ #define RT5659_IF2_ADC3_IN_MASK … #define RT5659_IF2_ADC3_IN_SFT … #define RT5659_IF2_ADC_IN_MASK … #define RT5659_IF2_ADC_IN_SFT … #define RT5659_IF2_DAC_SEL_MASK … #define RT5659_IF2_DAC_SEL_SFT … #define RT5659_IF2_ADC_SEL_MASK … #define RT5659_IF2_ADC_SEL_SFT … #define RT5659_IF3_DAC_SEL_MASK … #define RT5659_IF3_DAC_SEL_SFT … #define RT5659_IF3_ADC_SEL_MASK … #define RT5659_IF3_ADC_SEL_SFT … #define RT5659_IF3_ADC_IN_MASK … #define RT5659_IF3_ADC_IN_SFT … /* PDM Output Control (0x0031) */ #define RT5659_PDM1_L_MASK … #define RT5659_PDM1_L_SFT … #define RT5659_M_PDM1_L … #define RT5659_M_PDM1_L_SFT … #define RT5659_PDM1_R_MASK … #define RT5659_PDM1_R_SFT … #define RT5659_M_PDM1_R … #define RT5659_M_PDM1_R_SFT … #define RT5659_PDM2_BUSY … #define RT5659_PDM1_BUSY … #define RT5659_PDM_PATTERN … #define RT5659_PDM_GAIN … #define RT5659_PDM_DIV_MASK … /*S/PDIF Output Control (0x0036) */ #define RT5659_SPDIF_SEL_MASK … #define RT5659_SPDIF_SEL_SFT … /* REC Left Mixer Control 2 (0x003c) */ #define RT5659_M_BST1_RM1_L … #define RT5659_M_BST1_RM1_L_SFT … #define RT5659_M_BST2_RM1_L … #define RT5659_M_BST2_RM1_L_SFT … #define RT5659_M_BST3_RM1_L … #define RT5659_M_BST3_RM1_L_SFT … #define RT5659_M_BST4_RM1_L … #define RT5659_M_BST4_RM1_L_SFT … #define RT5659_M_INL_RM1_L … #define RT5659_M_INL_RM1_L_SFT … #define RT5659_M_SPKVOLL_RM1_L … #define RT5659_M_SPKVOLL_RM1_L_SFT … /* REC Right Mixer Control 2 (0x003e) */ #define RT5659_M_BST1_RM1_R … #define RT5659_M_BST1_RM1_R_SFT … #define RT5659_M_BST2_RM1_R … #define RT5659_M_BST2_RM1_R_SFT … #define RT5659_M_BST3_RM1_R … #define RT5659_M_BST3_RM1_R_SFT … #define RT5659_M_BST4_RM1_R … #define RT5659_M_BST4_RM1_R_SFT … #define RT5659_M_INR_RM1_R … #define RT5659_M_INR_RM1_R_SFT … #define RT5659_M_HPOVOLR_RM1_R … #define RT5659_M_HPOVOLR_RM1_R_SFT … /* SPK Left Mixer Control (0x0046) */ #define RT5659_M_BST3_SM_L … #define RT5659_M_BST3_SM_L_SFT … #define RT5659_M_IN_R_SM_L … #define RT5659_M_IN_R_SM_L_SFT … #define RT5659_M_IN_L_SM_L … #define RT5659_M_IN_L_SM_L_SFT … #define RT5659_M_BST1_SM_L … #define RT5659_M_BST1_SM_L_SFT … #define RT5659_M_DAC_L2_SM_L … #define RT5659_M_DAC_L2_SM_L_SFT … /* SPK Right Mixer Control (0x0047) */ #define RT5659_M_BST3_SM_R … #define RT5659_M_BST3_SM_R_SFT … #define RT5659_M_IN_R_SM_R … #define RT5659_M_IN_R_SM_R_SFT … #define RT5659_M_IN_L_SM_R … #define RT5659_M_IN_L_SM_R_SFT … #define RT5659_M_BST4_SM_R … #define RT5659_M_BST4_SM_R_SFT … #define RT5659_M_DAC_R2_SM_R … #define RT5659_M_DAC_R2_SM_R_SFT … /* SPO Amp Input and Gain Control (0x0048) */ #define RT5659_M_DAC_L2_SPKOMIX … #define RT5659_M_DAC_L2_SPKOMIX_SFT … #define RT5659_M_SPKVOLL_SPKOMIX … #define RT5659_M_SPKVOLL_SPKOMIX_SFT … #define RT5659_M_DAC_R2_SPKOMIX … #define RT5659_M_DAC_R2_SPKOMIX_SFT … #define RT5659_M_SPKVOLR_SPKOMIX … #define RT5659_M_SPKVOLR_SPKOMIX_SFT … /* MONOMIX Input and Gain Control (0x004b) */ #define RT5659_M_MONOVOL_MA … #define RT5659_M_MONOVOL_MA_SFT … #define RT5659_M_DAC_L2_MA … #define RT5659_M_DAC_L2_MA_SFT … #define RT5659_M_BST3_MM … #define RT5659_M_BST3_MM_SFT … #define RT5659_M_BST2_MM … #define RT5659_M_BST2_MM_SFT … #define RT5659_M_BST1_MM … #define RT5659_M_BST1_MM_SFT … #define RT5659_M_DAC_R2_MM … #define RT5659_M_DAC_R2_MM_SFT … #define RT5659_M_DAC_L2_MM … #define RT5659_M_DAC_L2_MM_SFT … /* Output Left Mixer Control 1 (0x004d) */ #define RT5659_G_BST3_OM_L_MASK … #define RT5659_G_BST3_OM_L_SFT … #define RT5659_G_BST2_OM_L_MASK … #define RT5659_G_BST2_OM_L_SFT … #define RT5659_G_BST1_OM_L_MASK … #define RT5659_G_BST1_OM_L_SFT … #define RT5659_G_IN_L_OM_L_MASK … #define RT5659_G_IN_L_OM_L_SFT … #define RT5659_G_DAC_L2_OM_L_MASK … #define RT5659_G_DAC_L2_OM_L_SFT … /* Output Left Mixer Input Control (0x004e) */ #define RT5659_M_BST3_OM_L … #define RT5659_M_BST3_OM_L_SFT … #define RT5659_M_BST2_OM_L … #define RT5659_M_BST2_OM_L_SFT … #define RT5659_M_BST1_OM_L … #define RT5659_M_BST1_OM_L_SFT … #define RT5659_M_IN_L_OM_L … #define RT5659_M_IN_L_OM_L_SFT … #define RT5659_M_DAC_L2_OM_L … #define RT5659_M_DAC_L2_OM_L_SFT … /* Output Right Mixer Input Control (0x0050) */ #define RT5659_M_BST4_OM_R … #define RT5659_M_BST4_OM_R_SFT … #define RT5659_M_BST3_OM_R … #define RT5659_M_BST3_OM_R_SFT … #define RT5659_M_BST2_OM_R … #define RT5659_M_BST2_OM_R_SFT … #define RT5659_M_IN_R_OM_R … #define RT5659_M_IN_R_OM_R_SFT … #define RT5659_M_DAC_R2_OM_R … #define RT5659_M_DAC_R2_OM_R_SFT … /* LOUT Mixer Control (0x0052) */ #define RT5659_M_DAC_L2_LM … #define RT5659_M_DAC_L2_LM_SFT … #define RT5659_M_DAC_R2_LM … #define RT5659_M_DAC_R2_LM_SFT … #define RT5659_M_OV_L_LM … #define RT5659_M_OV_L_LM_SFT … #define RT5659_M_OV_R_LM … #define RT5659_M_OV_R_LM_SFT … /* Power Management for Digital 1 (0x0061) */ #define RT5659_PWR_I2S1 … #define RT5659_PWR_I2S1_BIT … #define RT5659_PWR_I2S2 … #define RT5659_PWR_I2S2_BIT … #define RT5659_PWR_I2S3 … #define RT5659_PWR_I2S3_BIT … #define RT5659_PWR_SPDIF … #define RT5659_PWR_SPDIF_BIT … #define RT5659_PWR_DAC_L1 … #define RT5659_PWR_DAC_L1_BIT … #define RT5659_PWR_DAC_R1 … #define RT5659_PWR_DAC_R1_BIT … #define RT5659_PWR_DAC_L2 … #define RT5659_PWR_DAC_L2_BIT … #define RT5659_PWR_DAC_R2 … #define RT5659_PWR_DAC_R2_BIT … #define RT5659_PWR_LDO … #define RT5659_PWR_LDO_BIT … #define RT5659_PWR_ADC_L1 … #define RT5659_PWR_ADC_L1_BIT … #define RT5659_PWR_ADC_R1 … #define RT5659_PWR_ADC_R1_BIT … #define RT5659_PWR_ADC_L2 … #define RT5659_PWR_ADC_L2_BIT … #define RT5659_PWR_ADC_R2 … #define RT5659_PWR_ADC_R2_BIT … #define RT5659_PWR_CLS_D … #define RT5659_PWR_CLS_D_BIT … /* Power Management for Digital 2 (0x0062) */ #define RT5659_PWR_ADC_S1F … #define RT5659_PWR_ADC_S1F_BIT … #define RT5659_PWR_ADC_S2F … #define RT5659_PWR_ADC_S2F_BIT … #define RT5659_PWR_ADC_MF_L … #define RT5659_PWR_ADC_MF_L_BIT … #define RT5659_PWR_ADC_MF_R … #define RT5659_PWR_ADC_MF_R_BIT … #define RT5659_PWR_DAC_S1F … #define RT5659_PWR_DAC_S1F_BIT … #define RT5659_PWR_DAC_MF_L … #define RT5659_PWR_DAC_MF_L_BIT … #define RT5659_PWR_DAC_MF_R … #define RT5659_PWR_DAC_MF_R_BIT … #define RT5659_PWR_PDM1 … #define RT5659_PWR_PDM1_BIT … /* Power Management for Analog 1 (0x0063) */ #define RT5659_PWR_VREF1 … #define RT5659_PWR_VREF1_BIT … #define RT5659_PWR_FV1 … #define RT5659_PWR_FV1_BIT … #define RT5659_PWR_VREF2 … #define RT5659_PWR_VREF2_BIT … #define RT5659_PWR_FV2 … #define RT5659_PWR_FV2_BIT … #define RT5659_PWR_VREF3 … #define RT5659_PWR_VREF3_BIT … #define RT5659_PWR_FV3 … #define RT5659_PWR_FV3_BIT … #define RT5659_PWR_MB … #define RT5659_PWR_MB_BIT … #define RT5659_PWR_LM … #define RT5659_PWR_LM_BIT … #define RT5659_PWR_BG … #define RT5659_PWR_BG_BIT … #define RT5659_PWR_MA … #define RT5659_PWR_MA_BIT … #define RT5659_PWR_HA_L … #define RT5659_PWR_HA_L_BIT … #define RT5659_PWR_HA_R … #define RT5659_PWR_HA_R_BIT … /* Power Management for Analog 2 (0x0064) */ #define RT5659_PWR_BST1 … #define RT5659_PWR_BST1_BIT … #define RT5659_PWR_BST2 … #define RT5659_PWR_BST2_BIT … #define RT5659_PWR_BST3 … #define RT5659_PWR_BST3_BIT … #define RT5659_PWR_BST4 … #define RT5659_PWR_BST4_BIT … #define RT5659_PWR_MB1 … #define RT5659_PWR_MB1_BIT … #define RT5659_PWR_MB2 … #define RT5659_PWR_MB2_BIT … #define RT5659_PWR_MB3 … #define RT5659_PWR_MB3_BIT … #define RT5659_PWR_BST1_P … #define RT5659_PWR_BST1_P_BIT … #define RT5659_PWR_BST2_P … #define RT5659_PWR_BST2_P_BIT … #define RT5659_PWR_BST3_P … #define RT5659_PWR_BST3_P_BIT … #define RT5659_PWR_BST4_P … #define RT5659_PWR_BST4_P_BIT … #define RT5659_PWR_JD1 … #define RT5659_PWR_JD1_BIT … #define RT5659_PWR_JD2 … #define RT5659_PWR_JD2_BIT … #define RT5659_PWR_JD3 … #define RT5659_PWR_JD3_BIT … /* Power Management for Analog 3 (0x0065) */ #define RT5659_PWR_BST_L … #define RT5659_PWR_BST_L_BIT … #define RT5659_PWR_BST_R … #define RT5659_PWR_BST_R_BIT … #define RT5659_PWR_PLL … #define RT5659_PWR_PLL_BIT … #define RT5659_PWR_LDO5 … #define RT5659_PWR_LDO5_BIT … #define RT5659_PWR_LDO4 … #define RT5659_PWR_LDO4_BIT … #define RT5659_PWR_LDO3 … #define RT5659_PWR_LDO3_BIT … #define RT5659_PWR_LDO2 … #define RT5659_PWR_LDO2_BIT … #define RT5659_PWR_SVD … #define RT5659_PWR_SVD_BIT … /* Power Management for Mixer (0x0066) */ #define RT5659_PWR_OM_L … #define RT5659_PWR_OM_L_BIT … #define RT5659_PWR_OM_R … #define RT5659_PWR_OM_R_BIT … #define RT5659_PWR_SM_L … #define RT5659_PWR_SM_L_BIT … #define RT5659_PWR_SM_R … #define RT5659_PWR_SM_R_BIT … #define RT5659_PWR_RM1_L … #define RT5659_PWR_RM1_L_BIT … #define RT5659_PWR_RM1_R … #define RT5659_PWR_RM1_R_BIT … #define RT5659_PWR_MM … #define RT5659_PWR_MM_BIT … #define RT5659_PWR_RM2_L … #define RT5659_PWR_RM2_L_BIT … #define RT5659_PWR_RM2_R … #define RT5659_PWR_RM2_R_BIT … /* Power Management for Volume (0x0067) */ #define RT5659_PWR_SV_L … #define RT5659_PWR_SV_L_BIT … #define RT5659_PWR_SV_R … #define RT5659_PWR_SV_R_BIT … #define RT5659_PWR_OV_L … #define RT5659_PWR_OV_L_BIT … #define RT5659_PWR_OV_R … #define RT5659_PWR_OV_R_BIT … #define RT5659_PWR_IN_L … #define RT5659_PWR_IN_L_BIT … #define RT5659_PWR_IN_R … #define RT5659_PWR_IN_R_BIT … #define RT5659_PWR_MV … #define RT5659_PWR_MV_BIT … #define RT5659_PWR_MIC_DET … #define RT5659_PWR_MIC_DET_BIT … /* I2S1/2/3 Audio Serial Data Port Control (0x0070 0x0071 0x0072) */ #define RT5659_I2S_MS_MASK … #define RT5659_I2S_MS_SFT … #define RT5659_I2S_MS_M … #define RT5659_I2S_MS_S … #define RT5659_I2S_O_CP_MASK … #define RT5659_I2S_O_CP_SFT … #define RT5659_I2S_O_CP_OFF … #define RT5659_I2S_O_CP_U_LAW … #define RT5659_I2S_O_CP_A_LAW … #define RT5659_I2S_I_CP_MASK … #define RT5659_I2S_I_CP_SFT … #define RT5659_I2S_I_CP_OFF … #define RT5659_I2S_I_CP_U_LAW … #define RT5659_I2S_I_CP_A_LAW … #define RT5659_I2S_BP_MASK … #define RT5659_I2S_BP_SFT … #define RT5659_I2S_BP_NOR … #define RT5659_I2S_BP_INV … #define RT5659_I2S_DL_MASK … #define RT5659_I2S_DL_SFT … #define RT5659_I2S_DL_16 … #define RT5659_I2S_DL_20 … #define RT5659_I2S_DL_24 … #define RT5659_I2S_DL_8 … #define RT5659_I2S_DF_MASK … #define RT5659_I2S_DF_SFT … #define RT5659_I2S_DF_I2S … #define RT5659_I2S_DF_LEFT … #define RT5659_I2S_DF_PCM_A … #define RT5659_I2S_DF_PCM_B … #define RT5659_I2S_DF_PCM_A_N … #define RT5659_I2S_DF_PCM_B_N … /* ADC/DAC Clock Control 1 (0x0073) */ #define RT5659_I2S_PD1_MASK … #define RT5659_I2S_PD1_SFT … #define RT5659_I2S_PD1_1 … #define RT5659_I2S_PD1_2 … #define RT5659_I2S_PD1_3 … #define RT5659_I2S_PD1_4 … #define RT5659_I2S_PD1_6 … #define RT5659_I2S_PD1_8 … #define RT5659_I2S_PD1_12 … #define RT5659_I2S_PD1_16 … #define RT5659_I2S_BCLK_MS2_MASK … #define RT5659_I2S_BCLK_MS2_SFT … #define RT5659_I2S_BCLK_MS2_32 … #define RT5659_I2S_BCLK_MS2_64 … #define RT5659_I2S_PD2_MASK … #define RT5659_I2S_PD2_SFT … #define RT5659_I2S_PD2_1 … #define RT5659_I2S_PD2_2 … #define RT5659_I2S_PD2_3 … #define RT5659_I2S_PD2_4 … #define RT5659_I2S_PD2_6 … #define RT5659_I2S_PD2_8 … #define RT5659_I2S_PD2_12 … #define RT5659_I2S_PD2_16 … #define RT5659_I2S_BCLK_MS3_MASK … #define RT5659_I2S_BCLK_MS3_SFT … #define RT5659_I2S_BCLK_MS3_32 … #define RT5659_I2S_BCLK_MS3_64 … #define RT5659_I2S_PD3_MASK … #define RT5659_I2S_PD3_SFT … #define RT5659_I2S_PD3_1 … #define RT5659_I2S_PD3_2 … #define RT5659_I2S_PD3_3 … #define RT5659_I2S_PD3_4 … #define RT5659_I2S_PD3_6 … #define RT5659_I2S_PD3_8 … #define RT5659_I2S_PD3_12 … #define RT5659_I2S_PD3_16 … #define RT5659_DAC_OSR_MASK … #define RT5659_DAC_OSR_SFT … #define RT5659_DAC_OSR_128 … #define RT5659_DAC_OSR_64 … #define RT5659_DAC_OSR_32 … #define RT5659_DAC_OSR_16 … #define RT5659_ADC_OSR_MASK … #define RT5659_ADC_OSR_SFT … #define RT5659_ADC_OSR_128 … #define RT5659_ADC_OSR_64 … #define RT5659_ADC_OSR_32 … #define RT5659_ADC_OSR_16 … /* Digital Microphone Control (0x0075) */ #define RT5659_DMIC_1_EN_MASK … #define RT5659_DMIC_1_EN_SFT … #define RT5659_DMIC_1_DIS … #define RT5659_DMIC_1_EN … #define RT5659_DMIC_2_EN_MASK … #define RT5659_DMIC_2_EN_SFT … #define RT5659_DMIC_2_DIS … #define RT5659_DMIC_2_EN … #define RT5659_DMIC_1L_LH_MASK … #define RT5659_DMIC_1L_LH_SFT … #define RT5659_DMIC_1L_LH_RISING … #define RT5659_DMIC_1L_LH_FALLING … #define RT5659_DMIC_1R_LH_MASK … #define RT5659_DMIC_1R_LH_SFT … #define RT5659_DMIC_1R_LH_RISING … #define RT5659_DMIC_1R_LH_FALLING … #define RT5659_DMIC_2_DP_MASK … #define RT5659_DMIC_2_DP_SFT … #define RT5659_DMIC_2_DP_GPIO6 … #define RT5659_DMIC_2_DP_GPIO10 … #define RT5659_DMIC_2_DP_GPIO12 … #define RT5659_DMIC_2_DP_IN2P … #define RT5659_DMIC_CLK_MASK … #define RT5659_DMIC_CLK_SFT … #define RT5659_DMIC_1_DP_MASK … #define RT5659_DMIC_1_DP_SFT … #define RT5659_DMIC_1_DP_GPIO5 … #define RT5659_DMIC_1_DP_GPIO9 … #define RT5659_DMIC_1_DP_GPIO11 … #define RT5659_DMIC_1_DP_IN2N … /* TDM control 1 (0x0078)*/ #define RT5659_DS_ADC_SLOT01_SFT … #define RT5659_DS_ADC_SLOT23_SFT … #define RT5659_DS_ADC_SLOT45_SFT … #define RT5659_DS_ADC_SLOT67_SFT … #define RT5659_ADCDAT_SRC_MASK … #define RT5659_ADCDAT_SRC_SFT … /* Global Clock Control (0x0080) */ #define RT5659_SCLK_SRC_MASK … #define RT5659_SCLK_SRC_SFT … #define RT5659_SCLK_SRC_MCLK … #define RT5659_SCLK_SRC_PLL1 … #define RT5659_SCLK_SRC_RCCLK … #define RT5659_PLL1_SRC_MASK … #define RT5659_PLL1_SRC_SFT … #define RT5659_PLL1_SRC_MCLK … #define RT5659_PLL1_SRC_BCLK1 … #define RT5659_PLL1_SRC_BCLK2 … #define RT5659_PLL1_SRC_BCLK3 … #define RT5659_PLL1_PD_MASK … #define RT5659_PLL1_PD_SFT … #define RT5659_PLL1_PD_1 … #define RT5659_PLL1_PD_2 … #define RT5659_PLL_INP_MAX … #define RT5659_PLL_INP_MIN … /* PLL M/N/K Code Control 1 (0x0081) */ #define RT5659_PLL_N_MAX … #define RT5659_PLL_N_MASK … #define RT5659_PLL_N_SFT … #define RT5659_PLL_K_MAX … #define RT5659_PLL_K_MASK … #define RT5659_PLL_K_SFT … /* PLL M/N/K Code Control 2 (0x0082) */ #define RT5659_PLL_M_MAX … #define RT5659_PLL_M_MASK … #define RT5659_PLL_M_SFT … #define RT5659_PLL_M_BP … #define RT5659_PLL_M_BP_SFT … /* PLL tracking mode 1 (0x0083) */ #define RT5659_I2S3_ASRC_MASK … #define RT5659_I2S3_ASRC_SFT … #define RT5659_I2S2_ASRC_MASK … #define RT5659_I2S2_ASRC_SFT … #define RT5659_I2S1_ASRC_MASK … #define RT5659_I2S1_ASRC_SFT … #define RT5659_DAC_STO_ASRC_MASK … #define RT5659_DAC_STO_ASRC_SFT … #define RT5659_DAC_MONO_L_ASRC_MASK … #define RT5659_DAC_MONO_L_ASRC_SFT … #define RT5659_DAC_MONO_R_ASRC_MASK … #define RT5659_DAC_MONO_R_ASRC_SFT … #define RT5659_DMIC_STO1_ASRC_MASK … #define RT5659_DMIC_STO1_ASRC_SFT … #define RT5659_DMIC_MONO_L_ASRC_MASK … #define RT5659_DMIC_MONO_L_ASRC_SFT … #define RT5659_DMIC_MONO_R_ASRC_MASK … #define RT5659_DMIC_MONO_R_ASRC_SFT … #define RT5659_ADC_STO1_ASRC_MASK … #define RT5659_ADC_STO1_ASRC_SFT … #define RT5659_ADC_MONO_L_ASRC_MASK … #define RT5659_ADC_MONO_L_ASRC_SFT … #define RT5659_ADC_MONO_R_ASRC_MASK … #define RT5659_ADC_MONO_R_ASRC_SFT … /* PLL tracking mode 2 (0x0084)*/ #define RT5659_DA_STO_T_MASK … #define RT5659_DA_STO_T_SFT … #define RT5659_DA_MONO_L_T_MASK … #define RT5659_DA_MONO_L_T_SFT … #define RT5659_DA_MONO_R_T_MASK … #define RT5659_DA_MONO_R_T_SFT … #define RT5659_AD_STO1_T_MASK … #define RT5659_AD_STO1_T_SFT … /* PLL tracking mode 3 (0x0085)*/ #define RT5659_AD_STO2_T_MASK … #define RT5659_AD_STO2_T_SFT … #define RT5659_AD_MONO_L_T_MASK … #define RT5659_AD_MONO_L_T_SFT … #define RT5659_AD_MONO_R_T_MASK … #define RT5659_AD_MONO_R_T_SFT … /* ASRC Control 4 (0x0086) */ #define RT5659_I2S1_RATE_MASK … #define RT5659_I2S1_RATE_SFT … #define RT5659_I2S2_RATE_MASK … #define RT5659_I2S2_RATE_SFT … #define RT5659_I2S3_RATE_MASK … #define RT5659_I2S3_RATE_SFT … /* Depop Mode Control 1 (0x8e) */ #define RT5659_SMT_TRIG_MASK … #define RT5659_SMT_TRIG_SFT … #define RT5659_SMT_TRIG_DIS … #define RT5659_SMT_TRIG_EN … #define RT5659_HP_L_SMT_MASK … #define RT5659_HP_L_SMT_SFT … #define RT5659_HP_L_SMT_DIS … #define RT5659_HP_L_SMT_EN … #define RT5659_HP_R_SMT_MASK … #define RT5659_HP_R_SMT_SFT … #define RT5659_HP_R_SMT_DIS … #define RT5659_HP_R_SMT_EN … #define RT5659_HP_CD_PD_MASK … #define RT5659_HP_CD_PD_SFT … #define RT5659_HP_CD_PD_DIS … #define RT5659_HP_CD_PD_EN … #define RT5659_RSTN_MASK … #define RT5659_RSTN_SFT … #define RT5659_RSTN_DIS … #define RT5659_RSTN_EN … #define RT5659_RSTP_MASK … #define RT5659_RSTP_SFT … #define RT5659_RSTP_DIS … #define RT5659_RSTP_EN … #define RT5659_HP_CO_MASK … #define RT5659_HP_CO_SFT … #define RT5659_HP_CO_DIS … #define RT5659_HP_CO_EN … #define RT5659_HP_CP_MASK … #define RT5659_HP_CP_SFT … #define RT5659_HP_CP_PD … #define RT5659_HP_CP_PU … #define RT5659_HP_SG_MASK … #define RT5659_HP_SG_SFT … #define RT5659_HP_SG_DIS … #define RT5659_HP_SG_EN … #define RT5659_HP_DP_MASK … #define RT5659_HP_DP_SFT … #define RT5659_HP_DP_PD … #define RT5659_HP_DP_PU … #define RT5659_HP_CB_MASK … #define RT5659_HP_CB_SFT … #define RT5659_HP_CB_PD … #define RT5659_HP_CB_PU … /* Depop Mode Control 2 (0x8f) */ #define RT5659_DEPOP_MASK … #define RT5659_DEPOP_SFT … #define RT5659_DEPOP_AUTO … #define RT5659_DEPOP_MAN … #define RT5659_RAMP_MASK … #define RT5659_RAMP_SFT … #define RT5659_RAMP_DIS … #define RT5659_RAMP_EN … #define RT5659_BPS_MASK … #define RT5659_BPS_SFT … #define RT5659_BPS_DIS … #define RT5659_BPS_EN … #define RT5659_FAST_UPDN_MASK … #define RT5659_FAST_UPDN_SFT … #define RT5659_FAST_UPDN_DIS … #define RT5659_FAST_UPDN_EN … #define RT5659_MRES_MASK … #define RT5659_MRES_SFT … #define RT5659_MRES_15MO … #define RT5659_MRES_25MO … #define RT5659_MRES_35MO … #define RT5659_MRES_45MO … #define RT5659_VLO_MASK … #define RT5659_VLO_SFT … #define RT5659_VLO_3V … #define RT5659_VLO_32V … #define RT5659_DIG_DP_MASK … #define RT5659_DIG_DP_SFT … #define RT5659_DIG_DP_DIS … #define RT5659_DIG_DP_EN … #define RT5659_DP_TH_MASK … #define RT5659_DP_TH_SFT … /* Depop Mode Control 3 (0x90) */ #define RT5659_CP_SYS_MASK … #define RT5659_CP_SYS_SFT … #define RT5659_CP_FQ1_MASK … #define RT5659_CP_FQ1_SFT … #define RT5659_CP_FQ2_MASK … #define RT5659_CP_FQ2_SFT … #define RT5659_CP_FQ3_MASK … #define RT5659_CP_FQ3_SFT … #define RT5659_CP_FQ_1_5_KHZ … #define RT5659_CP_FQ_3_KHZ … #define RT5659_CP_FQ_6_KHZ … #define RT5659_CP_FQ_12_KHZ … #define RT5659_CP_FQ_24_KHZ … #define RT5659_CP_FQ_48_KHZ … #define RT5659_CP_FQ_96_KHZ … #define RT5659_CP_FQ_192_KHZ … /* HPOUT charge pump 1 (0x0091) */ #define RT5659_OSW_L_MASK … #define RT5659_OSW_L_SFT … #define RT5659_OSW_L_DIS … #define RT5659_OSW_L_EN … #define RT5659_OSW_R_MASK … #define RT5659_OSW_R_SFT … #define RT5659_OSW_R_DIS … #define RT5659_OSW_R_EN … #define RT5659_PM_HP_MASK … #define RT5659_PM_HP_SFT … #define RT5659_PM_HP_LV … #define RT5659_PM_HP_MV … #define RT5659_PM_HP_HV … #define RT5659_IB_HP_MASK … #define RT5659_IB_HP_SFT … #define RT5659_IB_HP_125IL … #define RT5659_IB_HP_25IL … #define RT5659_IB_HP_5IL … #define RT5659_IB_HP_1IL … /* PV detection and SPK gain control (0x92) */ #define RT5659_PVDD_DET_MASK … #define RT5659_PVDD_DET_SFT … #define RT5659_PVDD_DET_DIS … #define RT5659_PVDD_DET_EN … #define RT5659_SPK_AG_MASK … #define RT5659_SPK_AG_SFT … #define RT5659_SPK_AG_DIS … #define RT5659_SPK_AG_EN … /* Micbias Control (0x93) */ #define RT5659_MIC1_BS_MASK … #define RT5659_MIC1_BS_SFT … #define RT5659_MIC1_BS_9AV … #define RT5659_MIC1_BS_75AV … #define RT5659_MIC2_BS_MASK … #define RT5659_MIC2_BS_SFT … #define RT5659_MIC2_BS_9AV … #define RT5659_MIC2_BS_75AV … #define RT5659_MIC1_CLK_MASK … #define RT5659_MIC1_CLK_SFT … #define RT5659_MIC1_CLK_DIS … #define RT5659_MIC1_CLK_EN … #define RT5659_MIC2_CLK_MASK … #define RT5659_MIC2_CLK_SFT … #define RT5659_MIC2_CLK_DIS … #define RT5659_MIC2_CLK_EN … #define RT5659_MIC1_OVCD_MASK … #define RT5659_MIC1_OVCD_SFT … #define RT5659_MIC1_OVCD_DIS … #define RT5659_MIC1_OVCD_EN … #define RT5659_MIC1_OVTH_MASK … #define RT5659_MIC1_OVTH_SFT … #define RT5659_MIC1_OVTH_600UA … #define RT5659_MIC1_OVTH_1500UA … #define RT5659_MIC1_OVTH_2000UA … #define RT5659_MIC2_OVCD_MASK … #define RT5659_MIC2_OVCD_SFT … #define RT5659_MIC2_OVCD_DIS … #define RT5659_MIC2_OVCD_EN … #define RT5659_MIC2_OVTH_MASK … #define RT5659_MIC2_OVTH_SFT … #define RT5659_MIC2_OVTH_600UA … #define RT5659_MIC2_OVTH_1500UA … #define RT5659_MIC2_OVTH_2000UA … #define RT5659_PWR_MB_MASK … #define RT5659_PWR_MB_SFT … #define RT5659_PWR_MB_PD … #define RT5659_PWR_MB_PU … #define RT5659_PWR_CLK25M_MASK … #define RT5659_PWR_CLK25M_SFT … #define RT5659_PWR_CLK25M_PD … #define RT5659_PWR_CLK25M_PU … /* REC Mixer 2 Left Control 2 (0x009c) */ #define RT5659_M_BST1_RM2_L … #define RT5659_M_BST1_RM2_L_SFT … #define RT5659_M_BST2_RM2_L … #define RT5659_M_BST2_RM2_L_SFT … #define RT5659_M_BST3_RM2_L … #define RT5659_M_BST3_RM2_L_SFT … #define RT5659_M_BST4_RM2_L … #define RT5659_M_BST4_RM2_L_SFT … #define RT5659_M_OUTVOLL_RM2_L … #define RT5659_M_OUTVOLL_RM2_L_SFT … #define RT5659_M_SPKVOL_RM2_L … #define RT5659_M_SPKVOL_RM2_L_SFT … /* REC Mixer 2 Right Control 2 (0x009e) */ #define RT5659_M_BST1_RM2_R … #define RT5659_M_BST1_RM2_R_SFT … #define RT5659_M_BST2_RM2_R … #define RT5659_M_BST2_RM2_R_SFT … #define RT5659_M_BST3_RM2_R … #define RT5659_M_BST3_RM2_R_SFT … #define RT5659_M_BST4_RM2_R … #define RT5659_M_BST4_RM2_R_SFT … #define RT5659_M_OUTVOLR_RM2_R … #define RT5659_M_OUTVOLR_RM2_R_SFT … #define RT5659_M_MONOVOL_RM2_R … #define RT5659_M_MONOVOL_RM2_R_SFT … /* Class D Output Control (0x00a0) */ #define RT5659_POW_CLSD_DB_MASK … #define RT5659_POW_CLSD_DB_EN … #define RT5659_POW_CLSD_DB_DIS … /* EQ Control 1 (0x00b0) */ #define RT5659_EQ_SRC_DAC … #define RT5659_EQ_SRC_ADC … #define RT5659_EQ_UPD … #define RT5659_EQ_UPD_BIT … #define RT5659_EQ_CD_MASK … #define RT5659_EQ_CD_SFT … #define RT5659_EQ_CD_DIS … #define RT5659_EQ_CD_EN … #define RT5659_EQ_DITH_MASK … #define RT5659_EQ_DITH_SFT … #define RT5659_EQ_DITH_NOR … #define RT5659_EQ_DITH_LSB … #define RT5659_EQ_DITH_LSB_1 … #define RT5659_EQ_DITH_LSB_2 … /* IRQ Control 1 (0x00b7) */ #define RT5659_JD1_1_EN_MASK … #define RT5659_JD1_1_EN_SFT … #define RT5659_JD1_1_DIS … #define RT5659_JD1_1_EN … #define RT5659_JD1_2_EN_MASK … #define RT5659_JD1_2_EN_SFT … #define RT5659_JD1_2_DIS … #define RT5659_JD1_2_EN … #define RT5659_IL_IRQ_MASK … #define RT5659_IL_IRQ_DIS … #define RT5659_IL_IRQ_EN … /* IRQ Control 5 (0x00ba) */ #define RT5659_IRQ_JD_EN … #define RT5659_IRQ_JD_EN_SFT … /* GPIO Control 1 (0x00c0) */ #define RT5659_GP1_PIN_MASK … #define RT5659_GP1_PIN_SFT … #define RT5659_GP1_PIN_GPIO1 … #define RT5659_GP1_PIN_IRQ … #define RT5659_GP2_PIN_MASK … #define RT5659_GP2_PIN_SFT … #define RT5659_GP2_PIN_GPIO2 … #define RT5659_GP2_PIN_DMIC1_SCL … #define RT5659_GP3_PIN_MASK … #define RT5659_GP3_PIN_SFT … #define RT5659_GP3_PIN_GPIO3 … #define RT5659_GP3_PIN_PDM_SCL … #define RT5659_GP4_PIN_MASK … #define RT5659_GP4_PIN_SFT … #define RT5659_GP4_PIN_GPIO4 … #define RT5659_GP4_PIN_PDM_SDA … #define RT5659_GP5_PIN_MASK … #define RT5659_GP5_PIN_SFT … #define RT5659_GP5_PIN_GPIO5 … #define RT5659_GP5_PIN_DMIC1_SDA … #define RT5659_GP6_PIN_MASK … #define RT5659_GP6_PIN_SFT … #define RT5659_GP6_PIN_GPIO6 … #define RT5659_GP6_PIN_DMIC2_SDA … #define RT5659_GP7_PIN_MASK … #define RT5659_GP7_PIN_SFT … #define RT5659_GP7_PIN_GPIO7 … #define RT5659_GP7_PIN_PDM_SCL … #define RT5659_GP8_PIN_MASK … #define RT5659_GP8_PIN_SFT … #define RT5659_GP8_PIN_GPIO8 … #define RT5659_GP8_PIN_PDM_SDA … #define RT5659_GP9_PIN_MASK … #define RT5659_GP9_PIN_SFT … #define RT5659_GP9_PIN_GPIO9 … #define RT5659_GP9_PIN_DMIC1_SDA … #define RT5659_GP10_PIN_MASK … #define RT5659_GP10_PIN_SFT … #define RT5659_GP10_PIN_GPIO10 … #define RT5659_GP10_PIN_DMIC2_SDA … #define RT5659_GP11_PIN_MASK … #define RT5659_GP11_PIN_SFT … #define RT5659_GP11_PIN_GPIO11 … #define RT5659_GP11_PIN_DMIC1_SDA … #define RT5659_GP12_PIN_MASK … #define RT5659_GP12_PIN_SFT … #define RT5659_GP12_PIN_GPIO12 … #define RT5659_GP12_PIN_DMIC2_SDA … #define RT5659_GP13_PIN_MASK … #define RT5659_GP13_PIN_SFT … #define RT5659_GP13_PIN_GPIO13 … #define RT5659_GP13_PIN_SPDIF_SDA … #define RT5659_GP13_PIN_DMIC2_SCL … #define RT5659_GP13_PIN_PDM_SCL … #define RT5659_GP15_PIN_MASK … #define RT5659_GP15_PIN_SFT … #define RT5659_GP15_PIN_GPIO15 … #define RT5659_GP15_PIN_DMIC3_SCL … #define RT5659_GP15_PIN_PDM_SDA … /* GPIO Control 2 (0x00c1)*/ #define RT5659_GP1_PF_IN … #define RT5659_GP1_PF_OUT … #define RT5659_GP1_PF_MASK … #define RT5659_GP1_PF_SFT … /* GPIO Control 3 (0x00c2) */ #define RT5659_I2S2_PIN_MASK … #define RT5659_I2S2_PIN_SFT … #define RT5659_I2S2_PIN_I2S … #define RT5659_I2S2_PIN_GPIO … /* Soft volume and zero cross control 1 (0x00d9) */ #define RT5659_SV_MASK … #define RT5659_SV_SFT … #define RT5659_SV_DIS … #define RT5659_SV_EN … #define RT5659_OUT_SV_MASK … #define RT5659_OUT_SV_SFT … #define RT5659_OUT_SV_DIS … #define RT5659_OUT_SV_EN … #define RT5659_HP_SV_MASK … #define RT5659_HP_SV_SFT … #define RT5659_HP_SV_DIS … #define RT5659_HP_SV_EN … #define RT5659_ZCD_DIG_MASK … #define RT5659_ZCD_DIG_SFT … #define RT5659_ZCD_DIG_DIS … #define RT5659_ZCD_DIG_EN … #define RT5659_ZCD_MASK … #define RT5659_ZCD_SFT … #define RT5659_ZCD_PD … #define RT5659_ZCD_PU … #define RT5659_SV_DLY_MASK … #define RT5659_SV_DLY_SFT … /* Soft volume and zero cross control 2 (0x00da) */ #define RT5659_ZCD_HP_MASK … #define RT5659_ZCD_HP_SFT … #define RT5659_ZCD_HP_DIS … #define RT5659_ZCD_HP_EN … /* 4 Button Inline Command Control 2 (0x00e0) */ #define RT5659_4BTN_IL_MASK … #define RT5659_4BTN_IL_EN … #define RT5659_4BTN_IL_DIS … /* Analog JD Control 1 (0x00f0) */ #define RT5659_JD1_MODE_MASK … #define RT5659_JD1_MODE_0 … #define RT5659_JD1_MODE_1 … #define RT5659_JD1_MODE_2 … /* Jack Detect Control 3 (0x00f8) */ #define RT5659_JD_TRI_HPO_SEL_MASK … #define RT5659_JD_TRI_HPO_SEL_SFT … #define RT5659_JD_HPO_GPIO_JD1 … #define RT5659_JD_HPO_JD1_1 … #define RT5659_JD_HPO_JD1_2 … #define RT5659_JD_HPO_JD2 … #define RT5659_JD_HPO_GPIO_JD2 … #define RT5659_JD_HPO_JD3 … #define RT5659_JD_HPO_JD_D … /* Digital Misc Control (0x00fa) */ #define RT5659_AM_MASK … #define RT5659_AM_EN … #define RT5659_AM_DIS … #define RT5659_DIG_GATE_CTRL … #define RT5659_DIG_GATE_CTRL_SFT … /* Chopper and Clock control for ADC (0x011c)*/ #define RT5659_M_RF_DIG_MASK … #define RT5659_M_RF_DIG_SFT … #define RT5659_M_RI_DIG … /* Chopper and Clock control for DAC (0x013a)*/ #define RT5659_CKXEN_DAC1_MASK … #define RT5659_CKXEN_DAC1_SFT … #define RT5659_CKGEN_DAC1_MASK … #define RT5659_CKGEN_DAC1_SFT … #define RT5659_CKXEN_DAC2_MASK … #define RT5659_CKXEN_DAC2_SFT … #define RT5659_CKGEN_DAC2_MASK … #define RT5659_CKGEN_DAC2_SFT … /* Chopper and Clock control for ADC (0x013b)*/ #define RT5659_CKXEN_ADC1_MASK … #define RT5659_CKXEN_ADC1_SFT … #define RT5659_CKGEN_ADC1_MASK … #define RT5659_CKGEN_ADC1_SFT … #define RT5659_CKXEN_ADC2_MASK … #define RT5659_CKXEN_ADC2_SFT … #define RT5659_CKGEN_ADC2_MASK … #define RT5659_CKGEN_ADC2_SFT … /* Test Mode Control 1 (0x0145) */ #define RT5659_AD2DA_LB_MASK … #define RT5659_AD2DA_LB_SFT … /* Stereo Noise Gate Control 1 (0x0160) */ #define RT5659_NG2_EN_MASK … #define RT5659_NG2_EN … #define RT5659_NG2_DIS … /* System Clock Source */ enum { … }; /* PLL1 Source */ enum { … }; enum { … }; struct rt5659_pll_code { … }; struct rt5659_priv { … }; int rt5659_set_jack_detect(struct snd_soc_component *component, struct snd_soc_jack *hs_jack); #endif /* __RT5659_H__ */
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