/* SPDX-License-Identifier: GPL-2.0-only */ /* * rt5682s.h -- RT5682I-VS ALSA SoC audio driver * * Copyright 2021 Realtek Microelectronics * Author: Derek Fang <[email protected]> */ #ifndef __RT5682S_H__ #define __RT5682S_H__ #include <sound/rt5682s.h> #include <linux/regulator/consumer.h> #include <linux/gpio/consumer.h> #include <linux/clk.h> #include <linux/clkdev.h> #include <linux/clk-provider.h> /* Info */ #define RT5682S_RESET … #define RT5682S_VERSION_ID … #define RT5682S_VENDOR_ID … #define RT5682S_DEVICE_ID … /* I/O - Output */ #define RT5682S_HP_CTRL_1 … #define RT5682S_HP_CTRL_2 … #define RT5682S_HPL_GAIN … #define RT5682S_HPR_GAIN … #define RT5682S_I2C_CTRL … /* I/O - Input */ #define RT5682S_CBJ_BST_CTRL … #define RT5682S_CBJ_DET_CTRL … #define RT5682S_CBJ_CTRL_1 … #define RT5682S_CBJ_CTRL_2 … #define RT5682S_CBJ_CTRL_3 … #define RT5682S_CBJ_CTRL_4 … #define RT5682S_CBJ_CTRL_5 … #define RT5682S_CBJ_CTRL_6 … #define RT5682S_CBJ_CTRL_7 … #define RT5682S_CBJ_CTRL_8 … /* I/O - ADC/DAC/DMIC */ #define RT5682S_DAC1_DIG_VOL … #define RT5682S_STO1_ADC_DIG_VOL … #define RT5682S_STO1_ADC_BOOST … #define RT5682S_HP_IMP_GAIN_1 … #define RT5682S_HP_IMP_GAIN_2 … /* Mixer - D-D */ #define RT5682S_SIDETONE_CTRL … #define RT5682S_STO1_ADC_MIXER … #define RT5682S_AD_DA_MIXER … #define RT5682S_STO1_DAC_MIXER … #define RT5682S_A_DAC1_MUX … #define RT5682S_DIG_INF2_DATA … /* Mixer - ADC */ #define RT5682S_REC_MIXER … #define RT5682S_CAL_REC … /* HP Analog Offset Control */ #define RT5682S_HP_ANA_OST_CTRL_1 … #define RT5682S_HP_ANA_OST_CTRL_2 … #define RT5682S_HP_ANA_OST_CTRL_3 … /* Power */ #define RT5682S_PWR_DIG_1 … #define RT5682S_PWR_DIG_2 … #define RT5682S_PWR_ANLG_1 … #define RT5682S_PWR_ANLG_2 … #define RT5682S_PWR_ANLG_3 … #define RT5682S_PWR_MIXER … #define RT5682S_MB_CTRL … #define RT5682S_CLK_GATE_TCON_1 … #define RT5682S_CLK_GATE_TCON_2 … #define RT5682S_CLK_GATE_TCON_3 … /* Clock Detect */ #define RT5682S_CLK_DET … /* Filter Auto Reset */ #define RT5682S_RESET_LPF_CTRL … #define RT5682S_RESET_HPF_CTRL … /* DMIC */ #define RT5682S_DMIC_CTRL_1 … #define RT5682S_LPF_AD_DMIC … /* Format - ADC/DAC */ #define RT5682S_I2S1_SDP … #define RT5682S_I2S2_SDP … #define RT5682S_ADDA_CLK_1 … #define RT5682S_ADDA_CLK_2 … #define RT5682S_I2S1_F_DIV_CTRL_1 … #define RT5682S_I2S1_F_DIV_CTRL_2 … /* Format - TDM Control */ #define RT5682S_TDM_CTRL … #define RT5682S_TDM_ADDA_CTRL_1 … #define RT5682S_TDM_ADDA_CTRL_2 … #define RT5682S_DATA_SEL_CTRL_1 … #define RT5682S_TDM_TCON_CTRL_1 … #define RT5682S_TDM_TCON_CTRL_2 … /* Function - Analog */ #define RT5682S_GLB_CLK … #define RT5682S_PLL_TRACK_1 … #define RT5682S_PLL_TRACK_2 … #define RT5682S_PLL_TRACK_3 … #define RT5682S_PLL_TRACK_4 … #define RT5682S_PLL_TRACK_5 … #define RT5682S_PLL_TRACK_6 … #define RT5682S_PLL_TRACK_11 … #define RT5682S_DEPOP_1 … #define RT5682S_HP_CHARGE_PUMP_1 … #define RT5682S_HP_CHARGE_PUMP_2 … #define RT5682S_HP_CHARGE_PUMP_3 … #define RT5682S_MICBIAS_1 … #define RT5682S_MICBIAS_2 … #define RT5682S_MICBIAS_3 … #define RT5682S_PLL_TRACK_12 … #define RT5682S_PLL_TRACK_14 … #define RT5682S_PLL_CTRL_1 … #define RT5682S_PLL_CTRL_2 … #define RT5682S_PLL_CTRL_3 … #define RT5682S_PLL_CTRL_4 … #define RT5682S_PLL_CTRL_5 … #define RT5682S_PLL_CTRL_6 … #define RT5682S_PLL_CTRL_7 … #define RT5682S_RC_CLK_CTRL … #define RT5682S_I2S2_M_CLK_CTRL_1 … #define RT5682S_I2S2_F_DIV_CTRL_1 … #define RT5682S_I2S2_F_DIV_CTRL_2 … #define RT5682S_IRQ_CTRL_1 … #define RT5682S_IRQ_CTRL_2 … #define RT5682S_IRQ_CTRL_3 … #define RT5682S_IRQ_CTRL_4 … #define RT5682S_INT_ST_1 … #define RT5682S_GPIO_CTRL_1 … #define RT5682S_GPIO_CTRL_2 … #define RT5682S_GPIO_ST … #define RT5682S_HP_AMP_DET_CTRL_1 … #define RT5682S_MID_HP_AMP_DET … #define RT5682S_LOW_HP_AMP_DET … #define RT5682S_DELAY_BUF_CTRL … #define RT5682S_SV_ZCD_1 … #define RT5682S_SV_ZCD_2 … #define RT5682S_IL_CMD_1 … #define RT5682S_IL_CMD_2 … #define RT5682S_IL_CMD_3 … #define RT5682S_IL_CMD_4 … #define RT5682S_IL_CMD_5 … #define RT5682S_IL_CMD_6 … #define RT5682S_4BTN_IL_CMD_1 … #define RT5682S_4BTN_IL_CMD_2 … #define RT5682S_4BTN_IL_CMD_3 … #define RT5682S_4BTN_IL_CMD_4 … #define RT5682S_4BTN_IL_CMD_5 … #define RT5682S_4BTN_IL_CMD_6 … #define RT5682S_4BTN_IL_CMD_7 … #define RT5682S_ADC_STO1_HP_CTRL_1 … #define RT5682S_ADC_STO1_HP_CTRL_2 … #define RT5682S_AJD1_CTRL … #define RT5682S_JD_CTRL_1 … /* General Control */ #define RT5682S_DUMMY_1 … #define RT5682S_DUMMY_2 … #define RT5682S_DUMMY_3 … #define RT5682S_DAC_ADC_DIG_VOL1 … #define RT5682S_BIAS_CUR_CTRL_2 … #define RT5682S_BIAS_CUR_CTRL_3 … #define RT5682S_BIAS_CUR_CTRL_4 … #define RT5682S_BIAS_CUR_CTRL_5 … #define RT5682S_BIAS_CUR_CTRL_6 … #define RT5682S_BIAS_CUR_CTRL_7 … #define RT5682S_BIAS_CUR_CTRL_8 … #define RT5682S_BIAS_CUR_CTRL_9 … #define RT5682S_BIAS_CUR_CTRL_10 … #define RT5682S_VREF_REC_OP_FB_CAP_CTRL_1 … #define RT5682S_VREF_REC_OP_FB_CAP_CTRL_2 … #define RT5682S_CHARGE_PUMP_1 … #define RT5682S_DIG_IN_CTRL_1 … #define RT5682S_PAD_DRIVING_CTRL … #define RT5682S_CHOP_DAC_1 … #define RT5682S_CHOP_DAC_2 … #define RT5682S_CHOP_ADC … #define RT5682S_CALIB_ADC_CTRL … #define RT5682S_VOL_TEST … #define RT5682S_SPKVDD_DET_ST … #define RT5682S_TEST_MODE_CTRL_1 … #define RT5682S_TEST_MODE_CTRL_2 … #define RT5682S_TEST_MODE_CTRL_3 … #define RT5682S_TEST_MODE_CTRL_4 … #define RT5682S_PLL_INTERNAL_1 … #define RT5682S_PLL_INTERNAL_2 … #define RT5682S_PLL_INTERNAL_3 … #define RT5682S_PLL_INTERNAL_4 … #define RT5682S_STO_NG2_CTRL_1 … #define RT5682S_STO_NG2_CTRL_2 … #define RT5682S_STO_NG2_CTRL_3 … #define RT5682S_STO_NG2_CTRL_4 … #define RT5682S_STO_NG2_CTRL_5 … #define RT5682S_STO_NG2_CTRL_6 … #define RT5682S_STO_NG2_CTRL_7 … #define RT5682S_STO_NG2_CTRL_8 … #define RT5682S_STO_NG2_CTRL_9 … #define RT5682S_STO_NG2_CTRL_10 … #define RT5682S_STO1_DAC_SIL_DET … #define RT5682S_SIL_PSV_CTRL1 … #define RT5682S_SIL_PSV_CTRL2 … #define RT5682S_SIL_PSV_CTRL3 … #define RT5682S_SIL_PSV_CTRL4 … #define RT5682S_SIL_PSV_CTRL5 … #define RT5682S_HP_IMP_SENS_CTRL_1 … #define RT5682S_HP_IMP_SENS_CTRL_2 … #define RT5682S_HP_IMP_SENS_CTRL_3 … #define RT5682S_HP_IMP_SENS_CTRL_4 … #define RT5682S_HP_IMP_SENS_CTRL_5 … #define RT5682S_HP_IMP_SENS_CTRL_6 … #define RT5682S_HP_IMP_SENS_CTRL_7 … #define RT5682S_HP_IMP_SENS_CTRL_8 … #define RT5682S_HP_IMP_SENS_CTRL_9 … #define RT5682S_HP_IMP_SENS_CTRL_10 … #define RT5682S_HP_IMP_SENS_CTRL_11 … #define RT5682S_HP_IMP_SENS_CTRL_12 … #define RT5682S_HP_IMP_SENS_CTRL_13 … #define RT5682S_HP_IMP_SENS_CTRL_14 … #define RT5682S_HP_IMP_SENS_CTRL_15 … #define RT5682S_HP_IMP_SENS_CTRL_16 … #define RT5682S_HP_IMP_SENS_CTRL_17 … #define RT5682S_HP_IMP_SENS_CTRL_18 … #define RT5682S_HP_IMP_SENS_CTRL_19 … #define RT5682S_HP_IMP_SENS_CTRL_20 … #define RT5682S_HP_IMP_SENS_CTRL_21 … #define RT5682S_HP_IMP_SENS_CTRL_22 … #define RT5682S_HP_IMP_SENS_CTRL_23 … #define RT5682S_HP_IMP_SENS_CTRL_24 … #define RT5682S_HP_IMP_SENS_CTRL_25 … #define RT5682S_HP_IMP_SENS_CTRL_26 … #define RT5682S_HP_IMP_SENS_CTRL_27 … #define RT5682S_HP_IMP_SENS_CTRL_28 … #define RT5682S_HP_IMP_SENS_CTRL_29 … #define RT5682S_HP_IMP_SENS_CTRL_30 … #define RT5682S_HP_IMP_SENS_CTRL_31 … #define RT5682S_HP_IMP_SENS_CTRL_32 … #define RT5682S_HP_IMP_SENS_CTRL_33 … #define RT5682S_HP_IMP_SENS_CTRL_34 … #define RT5682S_HP_IMP_SENS_CTRL_35 … #define RT5682S_HP_IMP_SENS_CTRL_36 … #define RT5682S_HP_IMP_SENS_CTRL_37 … #define RT5682S_HP_IMP_SENS_CTRL_38 … #define RT5682S_HP_IMP_SENS_CTRL_39 … #define RT5682S_HP_IMP_SENS_CTRL_40 … #define RT5682S_HP_IMP_SENS_CTRL_41 … #define RT5682S_HP_IMP_SENS_CTRL_42 … #define RT5682S_HP_IMP_SENS_CTRL_43 … #define RT5682S_HP_IMP_SENS_CTRL_44 … #define RT5682S_HP_IMP_SENS_CTRL_45 … #define RT5682S_HP_IMP_SENS_CTRL_46 … #define RT5682S_HP_LOGIC_CTRL_1 … #define RT5682S_HP_LOGIC_CTRL_2 … #define RT5682S_HP_LOGIC_CTRL_3 … #define RT5682S_HP_CALIB_CTRL_1 … #define RT5682S_HP_CALIB_CTRL_2 … #define RT5682S_HP_CALIB_CTRL_3 … #define RT5682S_HP_CALIB_CTRL_4 … #define RT5682S_HP_CALIB_CTRL_5 … #define RT5682S_HP_CALIB_CTRL_6 … #define RT5682S_HP_CALIB_CTRL_7 … #define RT5682S_HP_CALIB_CTRL_8 … #define RT5682S_HP_CALIB_CTRL_9 … #define RT5682S_HP_CALIB_CTRL_10 … #define RT5682S_HP_CALIB_CTRL_11 … #define RT5682S_HP_CALIB_ST_1 … #define RT5682S_HP_CALIB_ST_2 … #define RT5682S_HP_CALIB_ST_3 … #define RT5682S_HP_CALIB_ST_4 … #define RT5682S_HP_CALIB_ST_5 … #define RT5682S_HP_CALIB_ST_6 … #define RT5682S_HP_CALIB_ST_7 … #define RT5682S_HP_CALIB_ST_8 … #define RT5682S_HP_CALIB_ST_9 … #define RT5682S_HP_CALIB_ST_10 … #define RT5682S_HP_CALIB_ST_11 … #define RT5682S_SAR_IL_CMD_1 … #define RT5682S_SAR_IL_CMD_2 … #define RT5682S_SAR_IL_CMD_3 … #define RT5682S_SAR_IL_CMD_4 … #define RT5682S_SAR_IL_CMD_5 … #define RT5682S_SAR_IL_CMD_6 … #define RT5682S_SAR_IL_CMD_7 … #define RT5682S_SAR_IL_CMD_8 … #define RT5682S_SAR_IL_CMD_9 … #define RT5682S_SAR_IL_CMD_10 … #define RT5682S_SAR_IL_CMD_11 … #define RT5682S_SAR_IL_CMD_12 … #define RT5682S_SAR_IL_CMD_13 … #define RT5682S_SAR_IL_CMD_14 … #define RT5682S_DUMMY_4 … #define RT5682S_DUMMY_5 … #define RT5682S_DUMMY_6 … #define RT5682S_VERSION_ID_HIDE … #define RT5682S_VERSION_ID_CUS … #define RT5682S_SCAN_CTL … #define RT5682S_HP_AMP_DET … #define RT5682S_BIAS_CUR_CTRL_11 … #define RT5682S_BIAS_CUR_CTRL_12 … #define RT5682S_BIAS_CUR_CTRL_13 … #define RT5682S_BIAS_CUR_CTRL_14 … #define RT5682S_BIAS_CUR_CTRL_15 … #define RT5682S_BIAS_CUR_CTRL_16 … #define RT5682S_BIAS_CUR_CTRL_17 … #define RT5682S_BIAS_CUR_CTRL_18 … #define RT5682S_I2C_TRANS_CTRL … #define RT5682S_DUMMY_7 … #define RT5682S_DUMMY_8 … #define RT5682S_DMIC_FLOAT_DET … #define RT5682S_HA_CMP_OP_1 … #define RT5682S_HA_CMP_OP_2 … #define RT5682S_HA_CMP_OP_3 … #define RT5682S_HA_CMP_OP_4 … #define RT5682S_HA_CMP_OP_5 … #define RT5682S_HA_CMP_OP_6 … #define RT5682S_HA_CMP_OP_7 … #define RT5682S_HA_CMP_OP_8 … #define RT5682S_HA_CMP_OP_9 … #define RT5682S_HA_CMP_OP_10 … #define RT5682S_HA_CMP_OP_11 … #define RT5682S_HA_CMP_OP_12 … #define RT5682S_HA_CMP_OP_13 … #define RT5682S_HA_CMP_OP_14 … #define RT5682S_HA_CMP_OP_15 … #define RT5682S_HA_CMP_OP_16 … #define RT5682S_HA_CMP_OP_17 … #define RT5682S_HA_CMP_OP_18 … #define RT5682S_HA_CMP_OP_19 … #define RT5682S_HA_CMP_OP_20 … #define RT5682S_HA_CMP_OP_21 … #define RT5682S_HA_CMP_OP_22 … #define RT5682S_HA_CMP_OP_23 … #define RT5682S_HA_CMP_OP_24 … #define RT5682S_HA_CMP_OP_25 … #define RT5682S_NEW_CBJ_DET_CTL_1 … #define RT5682S_NEW_CBJ_DET_CTL_2 … #define RT5682S_NEW_CBJ_DET_CTL_3 … #define RT5682S_NEW_CBJ_DET_CTL_4 … #define RT5682S_NEW_CBJ_DET_CTL_5 … #define RT5682S_NEW_CBJ_DET_CTL_6 … #define RT5682S_NEW_CBJ_DET_CTL_7 … #define RT5682S_NEW_CBJ_DET_CTL_8 … #define RT5682S_NEW_CBJ_DET_CTL_9 … #define RT5682S_NEW_CBJ_DET_CTL_10 … #define RT5682S_NEW_CBJ_DET_CTL_11 … #define RT5682S_NEW_CBJ_DET_CTL_12 … #define RT5682S_NEW_CBJ_DET_CTL_13 … #define RT5682S_NEW_CBJ_DET_CTL_14 … #define RT5682S_NEW_CBJ_DET_CTL_15 … #define RT5682S_NEW_CBJ_DET_CTL_16 … #define RT5682S_DA_FILTER_1 … #define RT5682S_DA_FILTER_2 … #define RT5682S_DA_FILTER_3 … #define RT5682S_DA_FILTER_4 … #define RT5682S_DA_FILTER_5 … #define RT5682S_CLK_SW_TEST_1 … #define RT5682S_CLK_SW_TEST_2 … #define RT5682S_CLK_SW_TEST_3 … #define RT5682S_CLK_SW_TEST_4 … #define RT5682S_CLK_SW_TEST_5 … #define RT5682S_CLK_SW_TEST_6 … #define RT5682S_CLK_SW_TEST_7 … #define RT5682S_CLK_SW_TEST_8 … #define RT5682S_CLK_SW_TEST_9 … #define RT5682S_CLK_SW_TEST_10 … #define RT5682S_CLK_SW_TEST_11 … #define RT5682S_CLK_SW_TEST_12 … #define RT5682S_CLK_SW_TEST_13 … #define RT5682S_CLK_SW_TEST_14 … #define RT5682S_EFUSE_MANU_WRITE_1 … #define RT5682S_EFUSE_MANU_WRITE_2 … #define RT5682S_EFUSE_MANU_WRITE_3 … #define RT5682S_EFUSE_MANU_WRITE_4 … #define RT5682S_EFUSE_MANU_WRITE_5 … #define RT5682S_EFUSE_MANU_WRITE_6 … #define RT5682S_EFUSE_READ_1 … #define RT5682S_EFUSE_READ_2 … #define RT5682S_EFUSE_READ_3 … #define RT5682S_EFUSE_READ_4 … #define RT5682S_EFUSE_READ_5 … #define RT5682S_EFUSE_READ_6 … #define RT5682S_EFUSE_READ_7 … #define RT5682S_EFUSE_READ_8 … #define RT5682S_EFUSE_READ_9 … #define RT5682S_EFUSE_READ_10 … #define RT5682S_EFUSE_READ_11 … #define RT5682S_EFUSE_READ_12 … #define RT5682S_EFUSE_READ_13 … #define RT5682S_EFUSE_READ_14 … #define RT5682S_EFUSE_READ_15 … #define RT5682S_EFUSE_READ_16 … #define RT5682S_EFUSE_READ_17 … #define RT5682S_EFUSE_READ_18 … #define RT5682S_EFUSE_TIMING_CTL_1 … #define RT5682S_EFUSE_TIMING_CTL_2 … #define RT5682S_PILOT_DIG_CTL_1 … #define RT5682S_PILOT_DIG_CTL_2 … #define RT5682S_HP_AMP_DET_CTL_1 … #define RT5682S_HP_AMP_DET_CTL_2 … #define RT5682S_HP_AMP_DET_CTL_3 … #define RT5682S_HP_AMP_DET_CTL_4 … #define RT5682S_MAX_REG … /* global definition */ #define RT5682S_L_MUTE … #define RT5682S_L_MUTE_SFT … #define RT5682S_R_MUTE … #define RT5682S_R_MUTE_SFT … #define RT5682S_L_VOL_SFT … #define RT5682S_R_VOL_SFT … #define RT5682S_CLK_SRC_MCLK … #define RT5682S_CLK_SRC_PLL1 … #define RT5682S_CLK_SRC_PLL2 … #define RT5682S_CLK_SRC_RCCLK … /* Headphone Amp Control 2 (0x0003) */ #define RT5682S_HPO_L_PATH_MASK … #define RT5682S_HPO_L_PATH_EN … #define RT5682S_HPO_L_PATH_DIS … #define RT5682S_HPO_R_PATH_MASK … #define RT5682S_HPO_R_PATH_EN … #define RT5682S_HPO_R_PATH_DIS … #define RT5682S_HPO_SEL_IP_EN_SW … #define RT5682S_HPO_IP_EN_GATING … #define RT5682S_HPO_IP_NO_GATING … /*Headphone Amp L/R Analog Gain and Digital NG2 Gain Control (0x0005 0x0006)*/ #define RT5682S_G_HP … #define RT5682S_G_HP_SFT … #define RT5682S_G_STO_DA_DMIX … #define RT5682S_G_STO_DA_SFT … /* Embeeded Jack and Type Detection Control 2 (0x0010) */ #define RT5682S_EMB_JD_MASK … #define RT5682S_EMB_JD_EN … #define RT5682S_EMB_JD_EN_SFT … #define RT5682S_EMB_JD_RST … #define RT5682S_JD_MODE … #define RT5682S_JD_MODE_SFT … #define RT5682S_DET_TYPE … #define RT5682S_DET_TYPE_SFT … #define RT5682S_POLA_EXT_JD_MASK … #define RT5682S_POLA_EXT_JD_LOW … #define RT5682S_POLA_EXT_JD_HIGH … #define RT5682S_SEL_FAST_OFF_MASK … #define RT5682S_SEL_FAST_OFF_SFT … #define RT5682S_POL_FAST_OFF_MASK … #define RT5682S_POL_FAST_OFF_HIGH … #define RT5682S_POL_FAST_OFF_LOW … #define RT5682S_FAST_OFF_MASK … #define RT5682S_FAST_OFF_EN … #define RT5682S_FAST_OFF_DIS … #define RT5682S_VREF_POW_MASK … #define RT5682S_VREF_POW_FSM … #define RT5682S_VREF_POW_REG … #define RT5682S_MB1_PATH_BIT … #define RT5682S_MB1_PATH_MASK … #define RT5682S_CTRL_MB1_REG … #define RT5682S_CTRL_MB1_FSM … #define RT5682S_MB2_PATH_BIT … #define RT5682S_MB2_PATH_MASK … #define RT5682S_CTRL_MB2_REG … #define RT5682S_CTRL_MB2_FSM … #define RT5682S_TRIG_JD_MASK … #define RT5682S_TRIG_JD_HIGH … #define RT5682S_TRIG_JD_LOW … #define RT5682S_MIC_CAP_MASK … #define RT5682S_MIC_CAP_HS … #define RT5682S_MIC_CAP_HP … #define RT5682S_MIC_CAP_SRC_MASK … #define RT5682S_MIC_CAP_SRC_REG … #define RT5682S_MIC_CAP_SRC_ANA … /* Embeeded Jack and Type Detection Control 3 (0x0011) */ #define RT5682S_SEL_CBJ_TYPE_SLOW … #define RT5682S_SEL_CBJ_TYPE_NORM … #define RT5682S_SEL_CBJ_TYPE_MASK … #define RT5682S_POW_BG_MB1_MASK … #define RT5682S_POW_BG_MB1_REG … #define RT5682S_POW_BG_MB1_FSM … #define RT5682S_POW_BG_MB2_MASK … #define RT5682S_POW_BG_MB2_REG … #define RT5682S_POW_BG_MB2_FSM … #define RT5682S_EXT_JD_SRC … #define RT5682S_EXT_JD_SRC_SFT … #define RT5682S_EXT_JD_SRC_GPIO_JD1 … #define RT5682S_EXT_JD_SRC_GPIO_JD2 … #define RT5682S_EXT_JD_SRC_JDH … #define RT5682S_EXT_JD_SRC_JDL … #define RT5682S_EXT_JD_SRC_MANUAL … #define RT5682S_JACK_TYPE_MASK … /* Combo Jack and Type Detection Control 4 (0x0012) */ #define RT5682S_CBJ_IN_BUF_MASK … #define RT5682S_CBJ_IN_BUF_EN … #define RT5682S_CBJ_IN_BUF_DIS … #define RT5682S_CBJ_IN_BUF_BIT … /* Combo Jack and Type Detection Control 5 (0x0013) */ #define RT5682S_SEL_SHT_MID_TON_MASK … #define RT5682S_SEL_SHT_MID_TON_2 … #define RT5682S_SEL_SHT_MID_TON_3 … #define RT5682S_CBJ_JD_TEST_MASK … #define RT5682S_CBJ_JD_TEST_NORM … #define RT5682S_CBJ_JD_TEST_MODE … /* Combo Jack and Type Detection Control 6 (0x0014) */ #define RT5682S_JD_FAST_OFF_SRC_MASK … #define RT5682S_JD_FAST_OFF_SRC_JDH … #define RT5682S_JD_FAST_OFF_SRC_GPIO6 … #define RT5682S_JD_FAST_OFF_SRC_GPIO5 … #define RT5682S_JD_FAST_OFF_SRC_GPIO4 … #define RT5682S_JD_FAST_OFF_SRC_GPIO3 … #define RT5682S_JD_FAST_OFF_SRC_GPIO2 … #define RT5682S_JD_FAST_OFF_SRC_GPIO1 … /* DAC1 Digital Volume (0x0019) */ #define RT5682S_DAC_L1_VOL_MASK … #define RT5682S_DAC_L1_VOL_SFT … #define RT5682S_DAC_R1_VOL_MASK … #define RT5682S_DAC_R1_VOL_SFT … /* ADC Digital Volume Control (0x001c) */ #define RT5682S_ADC_L_VOL_MASK … #define RT5682S_ADC_L_VOL_SFT … #define RT5682S_ADC_R_VOL_MASK … #define RT5682S_ADC_R_VOL_SFT … /* Stereo1 ADC Boost Gain Control (0x001f) */ #define RT5682S_STO1_ADC_L_BST_MASK … #define RT5682S_STO1_ADC_L_BST_SFT … #define RT5682S_STO1_ADC_R_BST_MASK … #define RT5682S_STO1_ADC_R_BST_SFT … /* Sidetone Control (0x0024) */ #define RT5682S_ST_SRC_SEL … #define RT5682S_ST_SRC_SFT … #define RT5682S_ST_EN_MASK … #define RT5682S_ST_DIS … #define RT5682S_ST_EN … #define RT5682S_ST_EN_SFT … /* Stereo1 ADC Mixer Control (0x0026) */ #define RT5682S_M_STO1_ADC_L1 … #define RT5682S_M_STO1_ADC_L1_SFT … #define RT5682S_M_STO1_ADC_L2 … #define RT5682S_M_STO1_ADC_L2_SFT … #define RT5682S_STO1_ADC1L_SRC_MASK … #define RT5682S_STO1_ADC1L_SRC_SFT … #define RT5682S_STO1_ADC1_SRC_ADC … #define RT5682S_STO1_ADC1_SRC_DACMIX … #define RT5682S_STO1_ADC2L_SRC_MASK … #define RT5682S_STO1_ADC2L_SRC_SFT … #define RT5682S_STO1_ADCL_SRC_MASK … #define RT5682S_STO1_ADCL_SRC_SFT … #define RT5682S_M_STO1_ADC_R1 … #define RT5682S_M_STO1_ADC_R1_SFT … #define RT5682S_M_STO1_ADC_R2 … #define RT5682S_M_STO1_ADC_R2_SFT … #define RT5682S_STO1_ADC1R_SRC_MASK … #define RT5682S_STO1_ADC1R_SRC_SFT … #define RT5682S_STO1_ADC2R_SRC_MASK … #define RT5682S_STO1_ADC2R_SRC_SFT … #define RT5682S_STO1_ADCR_SRC_MASK … #define RT5682S_STO1_ADCR_SRC_SFT … /* ADC Mixer to DAC Mixer Control (0x0029) */ #define RT5682S_M_ADCMIX_L … #define RT5682S_M_ADCMIX_L_SFT … #define RT5682S_M_DAC1_L … #define RT5682S_M_DAC1_L_SFT … #define RT5682S_M_ADCMIX_R … #define RT5682S_M_ADCMIX_R_SFT … #define RT5682S_M_DAC1_R … #define RT5682S_M_DAC1_R_SFT … /* Stereo1 DAC Mixer Control (0x002a) */ #define RT5682S_M_DAC_L1_STO_L … #define RT5682S_M_DAC_L1_STO_L_SFT … #define RT5682S_G_DAC_L1_STO_L_MASK … #define RT5682S_G_DAC_L1_STO_L_SFT … #define RT5682S_M_DAC_R1_STO_L … #define RT5682S_M_DAC_R1_STO_L_SFT … #define RT5682S_G_DAC_R1_STO_L_MASK … #define RT5682S_G_DAC_R1_STO_L_SFT … #define RT5682S_M_DAC_L1_STO_R … #define RT5682S_M_DAC_L1_STO_R_SFT … #define RT5682S_G_DAC_L1_STO_R_MASK … #define RT5682S_G_DAC_L1_STO_R_SFT … #define RT5682S_M_DAC_R1_STO_R … #define RT5682S_M_DAC_R1_STO_R_SFT … #define RT5682S_G_DAC_R1_STO_R_MASK … #define RT5682S_G_DAC_R1_STO_R_SFT … /* Analog DAC1 Input Source Control (0x002b) */ #define RT5682S_M_ST_STO_L … #define RT5682S_M_ST_STO_L_SFT … #define RT5682S_M_ST_STO_R … #define RT5682S_M_ST_STO_R_SFT … #define RT5682S_DAC_L1_SRC_MASK … #define RT5682S_A_DACL1_SFT … #define RT5682S_DAC_R1_SRC_MASK … #define RT5682S_A_DACR1_SFT … /* Digital Interface Data Control (0x0030) */ #define RT5682S_IF2_DAC_SEL_MASK … #define RT5682S_IF2_DAC_SEL_SFT … #define RT5682S_IF2_ADC_SEL_MASK … #define RT5682S_IF2_ADC_SEL_SFT … /* REC Left/Right Mixer Control 2 (0x003c) */ #define RT5682S_BST_CBJ_MASK … #define RT5682S_BST_CBJ_SFT … #define RT5682S_M_CBJ_RM1_L … #define RT5682S_M_CBJ_RM1_L_SFT … #define RT5682S_M_CBJ_RM1_R … #define RT5682S_M_CBJ_RM1_R_SFT … /* REC Left/Right Mixer Calibration Control(0x0044) */ #define RT5682S_PWR_RM1_R_BIT … #define RT5682S_PWR_RM1_L_BIT … /* Power Management for Digital 1 (0x0061) */ #define RT5682S_PWR_I2S1 … #define RT5682S_PWR_I2S1_BIT … #define RT5682S_PWR_I2S2 … #define RT5682S_PWR_I2S2_BIT … #define RT5682S_PRE_CHR_DAC_L1 … #define RT5682S_PRE_CHR_DAC_L1_BIT … #define RT5682S_PRE_CHR_DAC_R1 … #define RT5682S_PRE_CHR_DAC_R1_BIT … #define RT5682S_PWR_DAC_L1 … #define RT5682S_PWR_DAC_L1_BIT … #define RT5682S_PWR_DAC_R1 … #define RT5682S_PWR_DAC_R1_BIT … #define RT5682S_PWR_LDO … #define RT5682S_PWR_LDO_BIT … #define RT5682S_PWR_D2S_L … #define RT5682S_PWR_D2S_L_BIT … #define RT5682S_PWR_D2S_R … #define RT5682S_PWR_D2S_R_BIT … #define RT5682S_PWR_ADC_L1 … #define RT5682S_PWR_ADC_L1_BIT … #define RT5682S_PWR_ADC_R1 … #define RT5682S_PWR_ADC_R1_BIT … #define RT5682S_EFUSE_SW_EN … #define RT5682S_EFUSE_SW_DIS … #define RT5682S_PWR_EFUSE … #define RT5682S_PWR_EFUSE_BIT … #define RT5682S_DIG_GATE_CTRL … #define RT5682S_DIG_GATE_CTRL_SFT … /* Power Management for Digital 2 (0x0062) */ #define RT5682S_PWR_ADC_S1F … #define RT5682S_PWR_ADC_S1F_BIT … #define RT5682S_PWR_DAC_S1F … #define RT5682S_PWR_DAC_S1F_BIT … #define RT5682S_DLDO_I_LIMIT_MASK … #define RT5682S_DLDO_I_LIMIT_EN … #define RT5682S_DLDO_I_LIMIT_DIS … #define RT5682S_DLDO_I_BIAS_SEL_4 … #define RT5682S_DLDO_I_BIAS_SEL_0 … #define RT5682S_DLDO_REG_TEST_1 … #define RT5682S_DLDO_REG_TEST_0 … #define RT5682S_DLDO_SRC_REG … #define RT5682S_DLDO_SRC_EFUSE … /* Power Management for Analog 1 (0x0063) */ #define RT5682S_PWR_VREF1 … #define RT5682S_PWR_VREF1_BIT … #define RT5682S_PWR_FV1 … #define RT5682S_PWR_FV1_BIT … #define RT5682S_PWR_VREF2 … #define RT5682S_PWR_VREF2_BIT … #define RT5682S_PWR_FV2 … #define RT5682S_PWR_FV2_BIT … #define RT5682S_LDO1_DBG_MASK … #define RT5682S_PWR_MB … #define RT5682S_PWR_MB_BIT … #define RT5682S_PWR_BG … #define RT5682S_PWR_BG_BIT … #define RT5682S_LDO1_BYPASS_MASK … #define RT5682S_LDO1_BYPASS … #define RT5682S_LDO1_NOT_BYPASS … /* Power Management for Analog 2 (0x0064) */ #define RT5682S_PWR_MCLK0_WD … #define RT5682S_PWR_MCLK0_WD_BIT … #define RT5682S_PWR_MCLK1_WD … #define RT5682S_PWR_MCLK1_WD_BIT … #define RT5682S_RST_MCLK0 … #define RT5682S_RST_MCLK0_BIT … #define RT5682S_RST_MCLK1 … #define RT5682S_RST_MCLK1_BIT … #define RT5682S_PWR_MB1 … #define RT5682S_PWR_MB1_PWR_DOWN … #define RT5682S_PWR_MB1_BIT … #define RT5682S_PWR_MB2 … #define RT5682S_PWR_MB2_PWR_DOWN … #define RT5682S_PWR_MB2_BIT … #define RT5682S_PWR_JD_MASK … #define RT5682S_PWR_JD_ENABLE … #define RT5682S_PWR_JD_DISABLE … /* Power Management for Analog 3 (0x0065) */ #define RT5682S_PWR_LDO_PLLA … #define RT5682S_PWR_LDO_PLLA_BIT … #define RT5682S_PWR_LDO_PLLB … #define RT5682S_PWR_LDO_PLLB_BIT … #define RT5682S_PWR_BIAS_PLLA … #define RT5682S_PWR_BIAS_PLLA_BIT … #define RT5682S_PWR_BIAS_PLLB … #define RT5682S_PWR_BIAS_PLLB_BIT … #define RT5682S_PWR_CBJ … #define RT5682S_PWR_CBJ_BIT … #define RT5682S_RSTB_PLLB … #define RT5682S_RSTB_PLLB_BIT … #define RT5682S_RSTB_PLLA … #define RT5682S_RSTB_PLLA_BIT … #define RT5682S_PWR_PLLB … #define RT5682S_PWR_PLLB_BIT … #define RT5682S_PWR_PLLA … #define RT5682S_PWR_PLLA_BIT … #define RT5682S_PWR_LDO_MB2 … #define RT5682S_PWR_LDO_MB2_BIT … #define RT5682S_PWR_LDO_MB1 … #define RT5682S_PWR_LDO_MB1_BIT … #define RT5682S_PWR_BGLDO … #define RT5682S_PWR_BGLDO_BIT … /* Power Management for Mixer (0x0066) */ #define RT5682S_PWR_CLK_COMP_8FS … #define RT5682S_PWR_CLK_COMP_8FS_BIT … #define RT5682S_DBG_BGLDO_MASK … #define RT5682S_DBG_BGLDO_SFT … #define RT5682S_DBG_BGLDO_MB1_MASK … #define RT5682S_DBG_BGLDO_MB1_SFT … #define RT5682S_DBG_BGLDO_MB2_MASK … #define RT5682S_DBG_BGLDO_MB2_SFT … #define RT5682S_DLDO_BGLDO_MASK … #define RT5682S_DLDO_BGLDO_MB2_SFT … #define RT5682S_PWR_STO1_DAC_L … #define RT5682S_PWR_STO1_DAC_L_BIT … #define RT5682S_PWR_STO1_DAC_R … #define RT5682S_PWR_STO1_DAC_R_BIT … #define RT5682S_DVO_BGLDO_MB1_MASK … #define RT5682S_DVO_BGLDO_MB1_SFT … #define RT5682S_DVO_BGLDO_MB2_MASK … /* MCLK and System Clock Detection Control (0x006b) */ #define RT5682S_SYS_CLK_DET … #define RT5682S_SYS_CLK_DET_SFT … #define RT5682S_PLL1_CLK_DET … #define RT5682S_PLL1_CLK_DET_SFT … /* Digital Microphone Control 1 (0x006e) */ #define RT5682S_DMIC_1_EN_MASK … #define RT5682S_DMIC_1_EN_SFT … #define RT5682S_DMIC_1_DIS … #define RT5682S_DMIC_1_EN … #define RT5682S_FIFO_CLK_DIV_MASK … #define RT5682S_FIFO_CLK_DIV_2 … #define RT5682S_DMIC_1_DP_MASK … #define RT5682S_DMIC_1_DP_SFT … #define RT5682S_DMIC_1_DP_GPIO2 … #define RT5682S_DMIC_1_DP_GPIO5 … #define RT5682S_DMIC_CLK_MASK … #define RT5682S_DMIC_CLK_SFT … /* I2S1 Audio Serial Data Port Control (0x0070) */ #define RT5682S_SEL_ADCDAT_MASK … #define RT5682S_SEL_ADCDAT_OUT … #define RT5682S_SEL_ADCDAT_IN … #define RT5682S_SEL_ADCDAT_SFT … #define RT5682S_I2S1_TX_CHL_MASK … #define RT5682S_I2S1_TX_CHL_SFT … #define RT5682S_I2S1_TX_CHL_16 … #define RT5682S_I2S1_TX_CHL_20 … #define RT5682S_I2S1_TX_CHL_24 … #define RT5682S_I2S1_TX_CHL_32 … #define RT5682S_I2S1_TX_CHL_8 … #define RT5682S_I2S1_RX_CHL_MASK … #define RT5682S_I2S1_RX_CHL_SFT … #define RT5682S_I2S1_RX_CHL_16 … #define RT5682S_I2S1_RX_CHL_20 … #define RT5682S_I2S1_RX_CHL_24 … #define RT5682S_I2S1_RX_CHL_32 … #define RT5682S_I2S1_RX_CHL_8 … #define RT5682S_I2S1_MONO_MASK … #define RT5682S_I2S1_MONO_EN … #define RT5682S_I2S1_MONO_DIS … #define RT5682S_I2S1_DL_MASK … #define RT5682S_I2S1_DL_SFT … #define RT5682S_I2S1_DL_16 … #define RT5682S_I2S1_DL_20 … #define RT5682S_I2S1_DL_24 … #define RT5682S_I2S1_DL_32 … #define RT5682S_I2S1_DL_8 … /* I2S1/2 Audio Serial Data Port Control (0x0071) */ #define RT5682S_I2S2_MS_MASK … #define RT5682S_I2S2_MS_SFT … #define RT5682S_I2S2_MS_M … #define RT5682S_I2S2_MS_S … #define RT5682S_I2S2_PIN_CFG_MASK … #define RT5682S_I2S2_PIN_CFG_SFT … #define RT5682S_I2S2_OUT_MASK … #define RT5682S_I2S2_OUT_SFT … #define RT5682S_I2S2_OUT_UM … #define RT5682S_I2S2_OUT_M … #define RT5682S_I2S_BP_MASK … #define RT5682S_I2S_BP_SFT … #define RT5682S_I2S_BP_NOR … #define RT5682S_I2S_BP_INV … #define RT5682S_I2S2_MONO_MASK … #define RT5682S_I2S2_MONO_EN … #define RT5682S_I2S2_MONO_DIS … #define RT5682S_I2S2_DL_MASK … #define RT5682S_I2S2_DL_SFT … #define RT5682S_I2S2_DL_8 … #define RT5682S_I2S2_DL_16 … #define RT5682S_I2S2_DL_20 … #define RT5682S_I2S2_DL_24 … #define RT5682S_I2S2_DL_32 … #define RT5682S_I2S_DF_MASK … #define RT5682S_I2S_DF_SFT … #define RT5682S_I2S_DF_I2S … #define RT5682S_I2S_DF_LEFT … #define RT5682S_I2S_DF_PCM_A … #define RT5682S_I2S_DF_PCM_B … #define RT5682S_I2S_DF_PCM_A_N … #define RT5682S_I2S_DF_PCM_B_N … /* ADC/DAC Clock Control 1 (0x0073) */ #define RT5682S_ADC_OSR_MASK … #define RT5682S_ADC_OSR_SFT … #define RT5682S_ADC_OSR_D_1 … #define RT5682S_ADC_OSR_D_2 … #define RT5682S_ADC_OSR_D_4 … #define RT5682S_ADC_OSR_D_6 … #define RT5682S_ADC_OSR_D_8 … #define RT5682S_ADC_OSR_D_12 … #define RT5682S_ADC_OSR_D_16 … #define RT5682S_ADC_OSR_D_24 … #define RT5682S_ADC_OSR_D_32 … #define RT5682S_ADC_OSR_D_48 … #define RT5682S_I2S_M_D_MASK … #define RT5682S_I2S_M_D_SFT … #define RT5682S_I2S_M_D_1 … #define RT5682S_I2S_M_D_2 … #define RT5682S_I2S_M_D_3 … #define RT5682S_I2S_M_D_4 … #define RT5682S_I2S_M_D_6 … #define RT5682S_I2S_M_D_8 … #define RT5682S_I2S_M_D_12 … #define RT5682S_I2S_M_D_16 … #define RT5682S_I2S_M_D_24 … #define RT5682S_I2S_M_D_32 … #define RT5682S_I2S_M_D_48 … #define RT5682S_I2S_M_CLK_SRC_MASK … #define RT5682S_I2S_M_CLK_SRC_SFT … #define RT5682S_DAC_OSR_MASK … #define RT5682S_DAC_OSR_SFT … #define RT5682S_DAC_OSR_D_1 … #define RT5682S_DAC_OSR_D_2 … #define RT5682S_DAC_OSR_D_4 … #define RT5682S_DAC_OSR_D_6 … #define RT5682S_DAC_OSR_D_8 … #define RT5682S_DAC_OSR_D_12 … #define RT5682S_DAC_OSR_D_16 … #define RT5682S_DAC_OSR_D_24 … #define RT5682S_DAC_OSR_D_32 … #define RT5682S_DAC_OSR_D_48 … /* ADC/DAC Clock Control 2 (0x0074) */ #define RT5682S_I2S2_BCLK_MS2_MASK … #define RT5682S_I2S2_BCLK_MS2_SFT … #define RT5682S_I2S2_BCLK_MS2_32 … #define RT5682S_I2S2_BCLK_MS2_64 … /* TDM control 1 (0x0079) */ #define RT5682S_TDM_TX_CH_MASK … #define RT5682S_TDM_TX_CH_2 … #define RT5682S_TDM_TX_CH_4 … #define RT5682S_TDM_TX_CH_6 … #define RT5682S_TDM_TX_CH_8 … #define RT5682S_TDM_RX_CH_MASK … #define RT5682S_TDM_RX_CH_2 … #define RT5682S_TDM_RX_CH_4 … #define RT5682S_TDM_RX_CH_6 … #define RT5682S_TDM_RX_CH_8 … #define RT5682S_TDM_ADC_LCA_MASK … #define RT5682S_TDM_ADC_LCA_SFT … #define RT5682S_TDM_ADC_DL_MASK … #define RT5682S_TDM_ADC_DL_SFT … /* TDM control 2 (0x007a) */ #define RT5682S_IF1_ADC1_SEL_SFT … #define RT5682S_IF1_ADC2_SEL_SFT … #define RT5682S_IF1_ADC3_SEL_SFT … #define RT5682S_IF1_ADC4_SEL_SFT … #define RT5682S_TDM_ADC_SEL_SFT … /* TDM control 3 (0x007b) */ #define RT5682S_TDM_EN … /* TDM/I2S control (0x007e) */ #define RT5682S_TDM_S_BP_MASK … #define RT5682S_TDM_S_BP_SFT … #define RT5682S_TDM_S_BP_NOR … #define RT5682S_TDM_S_BP_INV … #define RT5682S_TDM_S_LP_MASK … #define RT5682S_TDM_S_LP_SFT … #define RT5682S_TDM_S_LP_NOR … #define RT5682S_TDM_S_LP_INV … #define RT5682S_TDM_DF_MASK … #define RT5682S_TDM_DF_SFT … #define RT5682S_TDM_DF_I2S … #define RT5682S_TDM_DF_LEFT … #define RT5682S_TDM_DF_PCM_A … #define RT5682S_TDM_DF_PCM_B … #define RT5682S_TDM_DF_PCM_A_N … #define RT5682S_TDM_DF_PCM_B_N … #define RT5682S_TDM_BCLK_MS1_MASK … #define RT5682S_TDM_BCLK_MS1_SFT … #define RT5682S_TDM_BCLK_MS1_32 … #define RT5682S_TDM_BCLK_MS1_64 … #define RT5682S_TDM_BCLK_MS1_128 … #define RT5682S_TDM_BCLK_MS1_256 … #define RT5682S_TDM_BCLK_MS1_16 … #define RT5682S_TDM_CL_MASK … #define RT5682S_TDM_CL_16 … #define RT5682S_TDM_CL_20 … #define RT5682S_TDM_CL_24 … #define RT5682S_TDM_CL_32 … #define RT5682S_TDM_M_BP_MASK … #define RT5682S_TDM_M_BP_SFT … #define RT5682S_TDM_M_BP_NOR … #define RT5682S_TDM_M_BP_INV … #define RT5682S_TDM_M_LP_MASK … #define RT5682S_TDM_M_LP_SFT … #define RT5682S_TDM_M_LP_NOR … #define RT5682S_TDM_M_LP_INV … #define RT5682S_TDM_MS_MASK … #define RT5682S_TDM_MS_SFT … #define RT5682S_TDM_MS_S … #define RT5682S_TDM_MS_M … /* Global Clock Control (0x0080) */ #define RT5682S_SCLK_SRC_MASK … #define RT5682S_SCLK_SRC_SFT … #define RT5682S_PLL_SRC_MASK … #define RT5682S_PLL_SRC_SFT … #define RT5682S_PLL_SRC_MCLK … #define RT5682S_PLL_SRC_BCLK1 … #define RT5682S_PLL_SRC_RC … /* PLL tracking mode 1 (0x0083) */ #define RT5682S_DA_ASRC_MASK … #define RT5682S_DA_ASRC_SFT … #define RT5682S_DAC_STO1_ASRC_MASK … #define RT5682S_DAC_STO1_ASRC_SFT … #define RT5682S_AD_ASRC_MASK … #define RT5682S_AD_ASRC_SFT … #define RT5682S_AD_ASRC_SEL_MASK … #define RT5682S_AD_ASRC_SEL_SFT … #define RT5682S_DMIC_ASRC_MASK … #define RT5682S_DMIC_ASRC_SFT … #define RT5682S_ADC_STO1_ASRC_MASK … #define RT5682S_ADC_STO1_ASRC_SFT … #define RT5682S_DA_ASRC_SEL_MASK … #define RT5682S_DA_ASRC_SEL_SFT … /* PLL tracking mode 2 3 (0x0084)(0x0085)*/ #define RT5682S_FILTER_CLK_SEL_MASK … #define RT5682S_FILTER_CLK_SEL_SFT … #define RT5682S_FILTER_CLK_DIV_MASK … #define RT5682S_FILTER_CLK_DIV_SFT … /* ASRC Control 4 (0x0086) */ #define RT5682S_ASRCIN_FTK_N1_MASK … #define RT5682S_ASRCIN_FTK_N1_SFT … #define RT5682S_ASRCIN_FTK_N2_MASK … #define RT5682S_ASRCIN_FTK_N2_SFT … #define RT5682S_ASRCIN_FTK_M1_MASK … #define RT5682S_ASRCIN_FTK_M1_SFT … #define RT5682S_ASRCIN_FTK_M2_MASK … #define RT5682S_ASRCIN_FTK_M2_SFT … /* ASRC Control 11 (0x008c) */ #define RT5682S_ASRCIN_AUTO_CLKOUT_MASK … #define RT5682S_ASRCIN_AUTO_CLKOUT_EN … #define RT5682S_ASRCIN_AUTO_CLKOUT_DIS … #define RT5682S_ASRCIN_AUTO_RST_MASK … #define RT5682S_ASRCIN_AUTO_RST_EN … #define RT5682S_ASRCIN_AUTO_RST_DIS … #define RT5682S_SEL_LRCK_DET_MASK … #define RT5682S_SEL_LRCK_DET_DIV8 … #define RT5682S_SEL_LRCK_DET_DIV4 … #define RT5682S_SEL_LRCK_DET_DIV2 … #define RT5682S_SEL_LRCK_DET_DIV1 … /* Depop Mode Control 1 (0x008e) */ #define RT5682S_OUT_HP_L_EN … #define RT5682S_OUT_HP_R_EN … #define RT5682S_LDO_PUMP_EN … #define RT5682S_LDO_PUMP_EN_SFT … #define RT5682S_PUMP_EN … #define RT5682S_PUMP_EN_SFT … #define RT5682S_CAPLESS_L_EN … #define RT5682S_CAPLESS_L_EN_SFT … #define RT5682S_CAPLESS_R_EN … #define RT5682S_CAPLESS_R_EN_SFT … /* Depop Mode Control 2 (0x8f) */ #define RT5682S_RAMP_MASK … #define RT5682S_RAMP_SFT … #define RT5682S_RAMP_DIS … #define RT5682S_RAMP_EN … #define RT5682S_BPS_MASK … #define RT5682S_BPS_SFT … #define RT5682S_BPS_DIS … #define RT5682S_BPS_EN … #define RT5682S_FAST_UPDN_MASK … #define RT5682S_FAST_UPDN_SFT … #define RT5682S_FAST_UPDN_DIS … #define RT5682S_FAST_UPDN_EN … #define RT5682S_VLO_MASK … #define RT5682S_VLO_SFT … #define RT5682S_VLO_3V … #define RT5682S_VLO_33V … /* HPOUT charge pump 1 (0x0091) */ #define RT5682S_OSW_L_MASK … #define RT5682S_OSW_L_SFT … #define RT5682S_OSW_L_DIS … #define RT5682S_OSW_L_EN … #define RT5682S_OSW_R_MASK … #define RT5682S_OSW_R_SFT … #define RT5682S_OSW_R_DIS … #define RT5682S_OSW_R_EN … #define RT5682S_PM_HP_MASK … #define RT5682S_PM_HP_SFT … #define RT5682S_PM_HP_LV … #define RT5682S_PM_HP_MV … #define RT5682S_PM_HP_HV … /* Micbias Control1 (0x93) */ #define RT5682S_MIC1_OV_MASK … #define RT5682S_MIC1_OV_SFT … #define RT5682S_MIC1_OV_2V7 … #define RT5682S_MIC1_OV_2V4 … #define RT5682S_MIC1_OV_2V25 … #define RT5682S_MIC1_OV_1V8 … #define RT5682S_MIC2_OV_MASK … #define RT5682S_MIC2_OV_SFT … #define RT5682S_MIC2_OV_2V7 … #define RT5682S_MIC2_OV_2V4 … #define RT5682S_MIC2_OV_2V25 … #define RT5682S_MIC2_OV_1V8 … /* Micbias Control2 (0x0094) */ #define RT5682S_PWR_CLK25M_MASK … #define RT5682S_PWR_CLK25M_SFT … #define RT5682S_PWR_CLK25M_PD … #define RT5682S_PWR_CLK25M_PU … #define RT5682S_PWR_CLK1M_MASK … #define RT5682S_PWR_CLK1M_SFT … #define RT5682S_PWR_CLK1M_PD … #define RT5682S_PWR_CLK1M_PU … /* PLL M/N/K Code Control 1 (0x0098) */ #define RT5682S_PLLA_N_MASK … /* PLL M/N/K Code Control 2 (0x0099) */ #define RT5682S_PLLA_M_MASK … #define RT5682S_PLLA_M_SFT … #define RT5682S_PLLA_K_MASK … /* PLL M/N/K Code Control 3 (0x009a) */ #define RT5682S_PLLB_N_MASK … /* PLL M/N/K Code Control 4 (0x009b) */ #define RT5682S_PLLB_M_MASK … #define RT5682S_PLLB_M_SFT … #define RT5682S_PLLB_K_MASK … /* PLL M/N/K Code Control 6 (0x009d) */ #define RT5682S_PLLB_SEL_PS_MASK … #define RT5682S_PLLB_SEL_PS_SFT … #define RT5682S_PLLB_BYP_PS_MASK … #define RT5682S_PLLB_BYP_PS_SFT … #define RT5682S_PLLB_M_BP_MASK … #define RT5682S_PLLB_M_BP_SFT … #define RT5682S_PLLB_K_BP_MASK … #define RT5682S_PLLB_K_BP_SFT … #define RT5682S_PLLA_M_BP_MASK … #define RT5682S_PLLA_M_BP_SFT … #define RT5682S_PLLA_K_BP_MASK … #define RT5682S_PLLA_K_BP_SFT … /* PLL M/N/K Code Control 7 (0x009e) */ #define RT5682S_PLLB_SRC_MASK … #define RT5682S_PLLB_SRC_DFIN … #define RT5682S_PLLB_SRC_PLLA … /* RC Clock Control (0x009f) */ #define RT5682S_POW_IRQ … #define RT5682S_POW_JDH … /* I2S2 Master Mode Clock Control 1 (0x00a0) */ #define RT5682S_I2S2_M_CLK_SRC_MASK … #define RT5682S_I2S2_M_CLK_SRC_SFT … #define RT5682S_I2S2_M_D_MASK … #define RT5682S_I2S2_M_D_1 … #define RT5682S_I2S2_M_D_2 … #define RT5682S_I2S2_M_D_3 … #define RT5682S_I2S2_M_D_4 … #define RT5682S_I2S2_M_D_6 … #define RT5682S_I2S2_M_D_8 … #define RT5682S_I2S2_M_D_12 … #define RT5682S_I2S2_M_D_16 … #define RT5682S_I2S2_M_D_24 … #define RT5682S_I2S2_M_D_32 … #define RT5682S_I2S2_M_D_48 … #define RT5682S_I2S2_M_D_SFT … /* IRQ Control 1 (0x00b6) */ #define RT5682S_JD1_PULSE_EN_MASK … #define RT5682S_JD1_PULSE_EN_SFT … #define RT5682S_JD1_PULSE_DIS … #define RT5682S_JD1_PULSE_EN … /* IRQ Control 2 (0x00b7) */ #define RT5682S_JD1_EN_MASK … #define RT5682S_JD1_EN_SFT … #define RT5682S_JD1_DIS … #define RT5682S_JD1_EN … #define RT5682S_JD1_POL_MASK … #define RT5682S_JD1_POL_NOR … #define RT5682S_JD1_POL_INV … #define RT5682S_JD1_IRQ_MASK … #define RT5682S_JD1_IRQ_LEV … #define RT5682S_JD1_IRQ_PUL … /* IRQ Control 3 (0x00b8) */ #define RT5682S_IL_IRQ_MASK … #define RT5682S_IL_IRQ_DIS … #define RT5682S_IL_IRQ_EN … #define RT5682S_IL_IRQ_TYPE_MASK … #define RT5682S_IL_IRQ_LEV … #define RT5682S_IL_IRQ_PUL … /* GPIO Control 1 (0x00c0) */ #define RT5682S_GP1_PIN_MASK … #define RT5682S_GP1_PIN_SFT … #define RT5682S_GP1_PIN_GPIO1 … #define RT5682S_GP1_PIN_IRQ … #define RT5682S_GP1_PIN_DMIC_CLK … #define RT5682S_GP2_PIN_MASK … #define RT5682S_GP2_PIN_SFT … #define RT5682S_GP2_PIN_GPIO2 … #define RT5682S_GP2_PIN_LRCK2 … #define RT5682S_GP2_PIN_DMIC_SDA … #define RT5682S_GP3_PIN_MASK … #define RT5682S_GP3_PIN_SFT … #define RT5682S_GP3_PIN_GPIO3 … #define RT5682S_GP3_PIN_BCLK2 … #define RT5682S_GP3_PIN_DMIC_CLK … #define RT5682S_GP4_PIN_MASK … #define RT5682S_GP4_PIN_SFT … #define RT5682S_GP4_PIN_GPIO4 … #define RT5682S_GP4_PIN_ADCDAT1 … #define RT5682S_GP4_PIN_DMIC_CLK … #define RT5682S_GP4_PIN_ADCDAT2 … #define RT5682S_GP5_PIN_MASK … #define RT5682S_GP5_PIN_SFT … #define RT5682S_GP5_PIN_GPIO5 … #define RT5682S_GP5_PIN_DACDAT1 … #define RT5682S_GP5_PIN_DMIC_SDA … #define RT5682S_GP6_PIN_MASK … #define RT5682S_GP6_PIN_SFT … #define RT5682S_GP6_PIN_GPIO6 … #define RT5682S_GP6_PIN_LRCK1 … /* GPIO Control 2 (0x00c1)*/ #define RT5682S_GP1_PF_MASK … #define RT5682S_GP1_PF_IN … #define RT5682S_GP1_PF_OUT … #define RT5682S_GP1_OUT_MASK … #define RT5682S_GP1_OUT_L … #define RT5682S_GP1_OUT_H … #define RT5682S_GP2_PF_MASK … #define RT5682S_GP2_PF_IN … #define RT5682S_GP2_PF_OUT … #define RT5682S_GP2_OUT_MASK … #define RT5682S_GP2_OUT_L … #define RT5682S_GP2_OUT_H … #define RT5682S_GP3_PF_MASK … #define RT5682S_GP3_PF_IN … #define RT5682S_GP3_PF_OUT … #define RT5682S_GP3_OUT_MASK … #define RT5682S_GP3_OUT_L … #define RT5682S_GP3_OUT_H … #define RT5682S_GP4_PF_MASK … #define RT5682S_GP4_PF_IN … #define RT5682S_GP4_PF_OUT … #define RT5682S_GP4_OUT_MASK … #define RT5682S_GP4_OUT_L … #define RT5682S_GP4_OUT_H … #define RT5682S_GP5_PF_MASK … #define RT5682S_GP5_PF_IN … #define RT5682S_GP5_PF_OUT … #define RT5682S_GP5_OUT_MASK … #define RT5682S_GP5_OUT_L … #define RT5682S_GP5_OUT_H … #define RT5682S_GP6_PF_MASK … #define RT5682S_GP6_PF_IN … #define RT5682S_GP6_PF_OUT … #define RT5682S_GP6_OUT_MASK … #define RT5682S_GP6_OUT_L … #define RT5682S_GP6_OUT_H … /* GPIO Status (0x00c2) */ #define RT5682S_GP6_ST … #define RT5682S_GP5_ST … #define RT5682S_GP4_ST … #define RT5682S_GP3_ST … #define RT5682S_GP2_ST … #define RT5682S_GP1_ST … /* Soft volume and zero cross control 1 (0x00d9) */ #define RT5682S_ZCD_MASK … #define RT5682S_ZCD_SFT … #define RT5682S_ZCD_PD … #define RT5682S_ZCD_PU … /* 4 Button Inline Command Control 2 (0x00e3) */ #define RT5682S_4BTN_IL_MASK … #define RT5682S_4BTN_IL_EN … #define RT5682S_4BTN_IL_DIS … #define RT5682S_4BTN_IL_RST_MASK … #define RT5682S_4BTN_IL_NOR … #define RT5682S_4BTN_IL_RST … /* 4 Button Inline Command Control 3~6 (0x00e5~0x00e8) */ #define RT5682S_4BTN_IL_HOLD_WIN_MASK … #define RT5682S_4BTN_IL_HOLD_WIN_SFT … #define RT5682S_4BTN_IL_CLICK_WIN_MASK … #define RT5682S_4BTN_IL_CLICK_WIN_SFT … /* Analog JD Control (0x00f0) */ #define RT5682S_JDH_RS_MASK … #define RT5682S_JDH_NO_PLUG … #define RT5682S_JDH_PLUG … /* Bias current control 7 (0x0110) */ #define RT5682S_LDO_DACREF_MASK … #define RT5682S_LDO_DACREF_1_607V … #define RT5682S_LDO_DACREF_1_5V … #define RT5682S_LDO_DACREF_1_406V … #define RT5682S_LDO_DACREF_1_731V … /* Charge Pump Internal Register1 (0x0125) */ #define RT5682S_CP_CLK_HP_MASK … #define RT5682S_CP_CLK_HP_100KHZ … #define RT5682S_CP_CLK_HP_200KHZ … #define RT5682S_CP_CLK_HP_300KHZ … #define RT5682S_CP_CLK_HP_600KHZ … /* Pad Driving Control (0x0136) */ #define RT5682S_PAD_DRV_GP1_MASK … #define RT5682S_PAD_DRV_GP1_HIGH … #define RT5682S_PAD_DRV_GP1_LOW … #define RT5682S_PAD_DRV_GP2_MASK … #define RT5682S_PAD_DRV_GP2_HIGH … #define RT5682S_PAD_DRV_GP2_LOW … #define RT5682S_PAD_DRV_GP3_MASK … #define RT5682S_PAD_DRV_GP3_HIGH … #define RT5682S_PAD_DRV_GP3_LOW … #define RT5682S_PAD_DRV_GP4_MASK … #define RT5682S_PAD_DRV_GP4_HIGH … #define RT5682S_PAD_DRV_GP4_LOW … #define RT5682S_PAD_DRV_GP5_MASK … #define RT5682S_PAD_DRV_GP5_HIGH … #define RT5682S_PAD_DRV_GP5_LOW … #define RT5682S_PAD_DRV_GP6_MASK … #define RT5682S_PAD_DRV_GP6_HIGH … #define RT5682S_PAD_DRV_GP6_LOW … /* Chopper and Clock control for DAC (0x013a)*/ #define RT5682S_CKXEN_DAC1_MASK … #define RT5682S_CKXEN_DAC1_SFT … #define RT5682S_CKGEN_DAC1_MASK … #define RT5682S_CKGEN_DAC1_SFT … /* Chopper and Clock control for ADC (0x013b)*/ #define RT5682S_CKXEN_ADC1_MASK … #define RT5682S_CKXEN_ADC1_SFT … #define RT5682S_CKGEN_ADC1_MASK … #define RT5682S_CKGEN_ADC1_SFT … /* Volume test (0x013f)*/ #define RT5682S_SEL_CLK_VOL_MASK … #define RT5682S_SEL_CLK_VOL_EN … #define RT5682S_SEL_CLK_VOL_DIS … /* Test Mode Control 1 (0x0145) */ #define RT5682S_AD2DA_LB_MASK … #define RT5682S_AD2DA_LB_SFT … /* Stereo Noise Gate Control 1 (0x0160) */ #define RT5682S_NG2_EN_MASK … #define RT5682S_NG2_EN … #define RT5682S_NG2_DIS … /* Stereo1 DAC Silence Detection Control (0x0190) */ #define RT5682S_DEB_STO_DAC_MASK … #define RT5682S_DEB_80_MS … /* HP Behavior Logic Control 2 (0x01db) */ #define RT5682S_HP_SIG_SRC_MASK … #define RT5682S_HP_SIG_SRC_1BIT_CTL … #define RT5682S_HP_SIG_SRC_REG … #define RT5682S_HP_SIG_SRC_IMPE_REG … #define RT5682S_HP_SIG_SRC_DC_CALI … /* SAR ADC Inline Command Control 1 (0x0210) */ #define RT5682S_SAR_BUTDET_MASK … #define RT5682S_SAR_BUTDET_EN … #define RT5682S_SAR_BUTDET_DIS … #define RT5682S_SAR_BUTDET_POW_MASK … #define RT5682S_SAR_BUTDET_POW_SAV … #define RT5682S_SAR_BUTDET_POW_NORM … #define RT5682S_SAR_BUTDET_RST_MASK … #define RT5682S_SAR_BUTDET_RST_NORM … #define RT5682S_SAR_BUTDET_RST … #define RT5682S_SAR_POW_MASK … #define RT5682S_SAR_POW_EN … #define RT5682S_SAR_POW_DIS … #define RT5682S_SAR_RST_MASK … #define RT5682S_SAR_RST_NORMAL … #define RT5682S_SAR_RST … #define RT5682S_SAR_BYPASS_MASK … #define RT5682S_SAR_BYPASS_EN … #define RT5682S_SAR_BYPASS_DIS … #define RT5682S_SAR_SEL_MB1_2_MASK … #define RT5682S_SAR_SEL_MB1_2_SFT … #define RT5682S_SAR_SEL_MODE_MASK … #define RT5682S_SAR_SEL_MODE_CMP … #define RT5682S_SAR_SEL_MODE_ADC … #define RT5682S_SAR_SEL_MB1_2_CTL_MASK … #define RT5682S_SAR_SEL_MB1_2_AUTO … #define RT5682S_SAR_SEL_MB1_2_MANU … #define RT5682S_SAR_SEL_SIGNAL_MASK … #define RT5682S_SAR_SEL_SIGNAL_AUTO … #define RT5682S_SAR_SEL_SIGNAL_MANU … /* SAR ADC Inline Command Control 2 (0x0211) */ #define RT5682S_SAR_ADC_PSV_MASK … #define RT5682S_SAR_ADC_PSV_ENTRY … /* SAR ADC Inline Command Control 13 (0x021c) */ #define RT5682S_SAR_SOUR_MASK … #define RT5682S_SAR_SOUR_BTN … #define RT5682S_SAR_SOUR_TYPE … /* Headphone Amp Detection Control 1 (0x3b00) */ #define RT5682S_CP_SW_SIZE_MASK … #define RT5682S_CP_SW_SIZE_L … #define RT5682S_CP_SW_SIZE_M … #define RT5682S_CP_SW_SIZE_S … #define RT5682S_STEREO_RATES … #define RT5682S_FORMATS … /* System Clock Source */ enum { … }; /* PLL Source */ enum { … }; enum { … }; enum { … }; /* filter mask */ enum { … }; enum { … }; enum { … }; struct pll_calc_map { … }; enum { … }; struct rt5682s_priv { … }; int rt5682s_sel_asrc_clk_src(struct snd_soc_component *component, unsigned int filter_mask, unsigned int clk_src); #endif /* __RT5682S_H__ */
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