/* SPDX-License-Identifier: GPL-2.0 */ /* * sgtl5000.h - SGTL5000 audio codec interface * * Copyright 2010-2011 Freescale Semiconductor, Inc. */ #ifndef _SGTL5000_H #define _SGTL5000_H /* * Registers addresses */ #define SGTL5000_CHIP_ID … #define SGTL5000_CHIP_DIG_POWER … #define SGTL5000_CHIP_CLK_CTRL … #define SGTL5000_CHIP_I2S_CTRL … #define SGTL5000_CHIP_SSS_CTRL … #define SGTL5000_CHIP_ADCDAC_CTRL … #define SGTL5000_CHIP_DAC_VOL … #define SGTL5000_CHIP_PAD_STRENGTH … #define SGTL5000_CHIP_ANA_ADC_CTRL … #define SGTL5000_CHIP_ANA_HP_CTRL … #define SGTL5000_CHIP_ANA_CTRL … #define SGTL5000_CHIP_LINREG_CTRL … #define SGTL5000_CHIP_REF_CTRL … #define SGTL5000_CHIP_MIC_CTRL … #define SGTL5000_CHIP_LINE_OUT_CTRL … #define SGTL5000_CHIP_LINE_OUT_VOL … #define SGTL5000_CHIP_ANA_POWER … #define SGTL5000_CHIP_PLL_CTRL … #define SGTL5000_CHIP_CLK_TOP_CTRL … #define SGTL5000_CHIP_ANA_STATUS … #define SGTL5000_CHIP_SHORT_CTRL … #define SGTL5000_CHIP_ANA_TEST2 … #define SGTL5000_DAP_CTRL … #define SGTL5000_DAP_PEQ … #define SGTL5000_DAP_BASS_ENHANCE … #define SGTL5000_DAP_BASS_ENHANCE_CTRL … #define SGTL5000_DAP_AUDIO_EQ … #define SGTL5000_DAP_SURROUND … #define SGTL5000_DAP_FLT_COEF_ACCESS … #define SGTL5000_DAP_COEF_WR_B0_MSB … #define SGTL5000_DAP_COEF_WR_B0_LSB … #define SGTL5000_DAP_EQ_BASS_BAND0 … #define SGTL5000_DAP_EQ_BASS_BAND1 … #define SGTL5000_DAP_EQ_BASS_BAND2 … #define SGTL5000_DAP_EQ_BASS_BAND3 … #define SGTL5000_DAP_EQ_BASS_BAND4 … #define SGTL5000_DAP_MAIN_CHAN … #define SGTL5000_DAP_MIX_CHAN … #define SGTL5000_DAP_AVC_CTRL … #define SGTL5000_DAP_AVC_THRESHOLD … #define SGTL5000_DAP_AVC_ATTACK … #define SGTL5000_DAP_AVC_DECAY … #define SGTL5000_DAP_COEF_WR_B1_MSB … #define SGTL5000_DAP_COEF_WR_B1_LSB … #define SGTL5000_DAP_COEF_WR_B2_MSB … #define SGTL5000_DAP_COEF_WR_B2_LSB … #define SGTL5000_DAP_COEF_WR_A1_MSB … #define SGTL5000_DAP_COEF_WR_A1_LSB … #define SGTL5000_DAP_COEF_WR_A2_MSB … #define SGTL5000_DAP_COEF_WR_A2_LSB … /* * Field Definitions. */ /* * SGTL5000_CHIP_ID */ #define SGTL5000_PARTID_MASK … #define SGTL5000_PARTID_SHIFT … #define SGTL5000_PARTID_WIDTH … #define SGTL5000_PARTID_PART_ID … #define SGTL5000_REVID_MASK … #define SGTL5000_REVID_SHIFT … #define SGTL5000_REVID_WIDTH … /* * SGTL5000_CHIP_DIG_POWER */ #define SGTL5000_DIG_POWER_DEFAULT … #define SGTL5000_ADC_EN … #define SGTL5000_DAC_EN … #define SGTL5000_DAP_POWERUP … #define SGTL5000_I2S_OUT_POWERUP … #define SGTL5000_I2S_IN_POWERUP … /* * SGTL5000_CHIP_CLK_CTRL */ #define SGTL5000_CHIP_CLK_CTRL_DEFAULT … #define SGTL5000_RATE_MODE_MASK … #define SGTL5000_RATE_MODE_SHIFT … #define SGTL5000_RATE_MODE_WIDTH … #define SGTL5000_RATE_MODE_DIV_1 … #define SGTL5000_RATE_MODE_DIV_2 … #define SGTL5000_RATE_MODE_DIV_4 … #define SGTL5000_RATE_MODE_DIV_6 … #define SGTL5000_SYS_FS_MASK … #define SGTL5000_SYS_FS_SHIFT … #define SGTL5000_SYS_FS_WIDTH … #define SGTL5000_SYS_FS_32k … #define SGTL5000_SYS_FS_44_1k … #define SGTL5000_SYS_FS_48k … #define SGTL5000_SYS_FS_96k … #define SGTL5000_MCLK_FREQ_MASK … #define SGTL5000_MCLK_FREQ_SHIFT … #define SGTL5000_MCLK_FREQ_WIDTH … #define SGTL5000_MCLK_FREQ_256FS … #define SGTL5000_MCLK_FREQ_384FS … #define SGTL5000_MCLK_FREQ_512FS … #define SGTL5000_MCLK_FREQ_PLL … /* * SGTL5000_CHIP_I2S_CTRL */ #define SGTL5000_I2S_SCLKFREQ_MASK … #define SGTL5000_I2S_SCLKFREQ_SHIFT … #define SGTL5000_I2S_SCLKFREQ_WIDTH … #define SGTL5000_I2S_SCLKFREQ_64FS … #define SGTL5000_I2S_SCLKFREQ_32FS … #define SGTL5000_I2S_MASTER … #define SGTL5000_I2S_SCLK_INV … #define SGTL5000_I2S_DLEN_MASK … #define SGTL5000_I2S_DLEN_SHIFT … #define SGTL5000_I2S_DLEN_WIDTH … #define SGTL5000_I2S_DLEN_32 … #define SGTL5000_I2S_DLEN_24 … #define SGTL5000_I2S_DLEN_20 … #define SGTL5000_I2S_DLEN_16 … #define SGTL5000_I2S_MODE_MASK … #define SGTL5000_I2S_MODE_SHIFT … #define SGTL5000_I2S_MODE_WIDTH … #define SGTL5000_I2S_MODE_I2S_LJ … #define SGTL5000_I2S_MODE_RJ … #define SGTL5000_I2S_MODE_PCM … #define SGTL5000_I2S_LRALIGN … #define SGTL5000_I2S_LRPOL … /* * SGTL5000_CHIP_SSS_CTRL */ #define SGTL5000_DAP_MIX_LRSWAP … #define SGTL5000_DAP_LRSWAP … #define SGTL5000_DAC_LRSWAP … #define SGTL5000_I2S_OUT_LRSWAP … #define SGTL5000_DAP_MIX_SEL_MASK … #define SGTL5000_DAP_MIX_SEL_SHIFT … #define SGTL5000_DAP_MIX_SEL_WIDTH … #define SGTL5000_DAP_MIX_SEL_ADC … #define SGTL5000_DAP_MIX_SEL_I2S_IN … #define SGTL5000_DAP_SEL_MASK … #define SGTL5000_DAP_SEL_SHIFT … #define SGTL5000_DAP_SEL_WIDTH … #define SGTL5000_DAP_SEL_ADC … #define SGTL5000_DAP_SEL_I2S_IN … #define SGTL5000_DAC_SEL_MASK … #define SGTL5000_DAC_SEL_SHIFT … #define SGTL5000_DAC_SEL_WIDTH … #define SGTL5000_DAC_SEL_ADC … #define SGTL5000_DAC_SEL_I2S_IN … #define SGTL5000_DAC_SEL_DAP … #define SGTL5000_I2S_OUT_SEL_MASK … #define SGTL5000_I2S_OUT_SEL_SHIFT … #define SGTL5000_I2S_OUT_SEL_WIDTH … #define SGTL5000_I2S_OUT_SEL_ADC … #define SGTL5000_I2S_OUT_SEL_I2S_IN … #define SGTL5000_I2S_OUT_SEL_DAP … /* * SGTL5000_CHIP_ADCDAC_CTRL */ #define SGTL5000_VOL_BUSY_DAC_RIGHT … #define SGTL5000_VOL_BUSY_DAC_LEFT … #define SGTL5000_DAC_VOL_RAMP_EN … #define SGTL5000_DAC_VOL_RAMP_EXPO … #define SGTL5000_DAC_MUTE_RIGHT … #define SGTL5000_DAC_MUTE_LEFT … #define SGTL5000_ADC_HPF_FREEZE … #define SGTL5000_ADC_HPF_BYPASS … /* * SGTL5000_CHIP_DAC_VOL */ #define SGTL5000_DAC_VOL_RIGHT_MASK … #define SGTL5000_DAC_VOL_RIGHT_SHIFT … #define SGTL5000_DAC_VOL_RIGHT_WIDTH … #define SGTL5000_DAC_VOL_LEFT_MASK … #define SGTL5000_DAC_VOL_LEFT_SHIFT … #define SGTL5000_DAC_VOL_LEFT_WIDTH … /* * SGTL5000_CHIP_PAD_STRENGTH */ #define SGTL5000_PAD_I2S_LRCLK_MASK … #define SGTL5000_PAD_I2S_LRCLK_SHIFT … #define SGTL5000_PAD_I2S_LRCLK_WIDTH … #define SGTL5000_PAD_I2S_SCLK_MASK … #define SGTL5000_PAD_I2S_SCLK_SHIFT … #define SGTL5000_PAD_I2S_SCLK_WIDTH … #define SGTL5000_PAD_I2S_DOUT_MASK … #define SGTL5000_PAD_I2S_DOUT_SHIFT … #define SGTL5000_PAD_I2S_DOUT_WIDTH … #define SGTL5000_PAD_I2C_SDA_MASK … #define SGTL5000_PAD_I2C_SDA_SHIFT … #define SGTL5000_PAD_I2C_SDA_WIDTH … #define SGTL5000_PAD_I2C_SCL_MASK … #define SGTL5000_PAD_I2C_SCL_SHIFT … #define SGTL5000_PAD_I2C_SCL_WIDTH … /* * SGTL5000_CHIP_ANA_ADC_CTRL */ #define SGTL5000_ADC_VOL_M6DB … #define SGTL5000_ADC_VOL_RIGHT_MASK … #define SGTL5000_ADC_VOL_RIGHT_SHIFT … #define SGTL5000_ADC_VOL_RIGHT_WIDTH … #define SGTL5000_ADC_VOL_LEFT_MASK … #define SGTL5000_ADC_VOL_LEFT_SHIFT … #define SGTL5000_ADC_VOL_LEFT_WIDTH … /* * SGTL5000_CHIP_ANA_HP_CTRL */ #define SGTL5000_HP_VOL_RIGHT_MASK … #define SGTL5000_HP_VOL_RIGHT_SHIFT … #define SGTL5000_HP_VOL_RIGHT_WIDTH … #define SGTL5000_HP_VOL_LEFT_MASK … #define SGTL5000_HP_VOL_LEFT_SHIFT … #define SGTL5000_HP_VOL_LEFT_WIDTH … /* * SGTL5000_CHIP_ANA_CTRL */ #define SGTL5000_CHIP_ANA_CTRL_DEFAULT … #define SGTL5000_LINE_OUT_MUTE … #define SGTL5000_HP_SEL_MASK … #define SGTL5000_HP_SEL_SHIFT … #define SGTL5000_HP_SEL_WIDTH … #define SGTL5000_HP_SEL_DAC … #define SGTL5000_HP_SEL_LINE_IN … #define SGTL5000_HP_ZCD_EN … #define SGTL5000_HP_MUTE … #define SGTL5000_ADC_SEL_MASK … #define SGTL5000_ADC_SEL_SHIFT … #define SGTL5000_ADC_SEL_WIDTH … #define SGTL5000_ADC_SEL_MIC … #define SGTL5000_ADC_SEL_LINE_IN … #define SGTL5000_ADC_ZCD_EN … #define SGTL5000_ADC_MUTE … /* * SGTL5000_CHIP_LINREG_CTRL */ #define SGTL5000_VDDC_MAN_ASSN_MASK … #define SGTL5000_VDDC_MAN_ASSN_SHIFT … #define SGTL5000_VDDC_MAN_ASSN_WIDTH … #define SGTL5000_VDDC_MAN_ASSN_VDDA … #define SGTL5000_VDDC_MAN_ASSN_VDDIO … #define SGTL5000_VDDC_ASSN_OVRD … #define SGTL5000_LINREG_VDDD_MASK … #define SGTL5000_LINREG_VDDD_SHIFT … #define SGTL5000_LINREG_VDDD_WIDTH … /* * SGTL5000_CHIP_REF_CTRL */ #define SGTL5000_ANA_GND_MASK … #define SGTL5000_ANA_GND_SHIFT … #define SGTL5000_ANA_GND_WIDTH … #define SGTL5000_ANA_GND_BASE … #define SGTL5000_ANA_GND_STP … #define SGTL5000_BIAS_CTRL_MASK … #define SGTL5000_BIAS_CTRL_SHIFT … #define SGTL5000_BIAS_CTRL_WIDTH … #define SGTL5000_SMALL_POP … /* * SGTL5000_CHIP_MIC_CTRL */ #define SGTL5000_BIAS_R_MASK … #define SGTL5000_BIAS_R_SHIFT … #define SGTL5000_BIAS_R_WIDTH … #define SGTL5000_BIAS_R_off … #define SGTL5000_BIAS_R_2K … #define SGTL5000_BIAS_R_4k … #define SGTL5000_BIAS_R_8k … #define SGTL5000_BIAS_VOLT_MASK … #define SGTL5000_BIAS_VOLT_SHIFT … #define SGTL5000_BIAS_VOLT_WIDTH … #define SGTL5000_MIC_GAIN_MASK … #define SGTL5000_MIC_GAIN_SHIFT … #define SGTL5000_MIC_GAIN_WIDTH … /* * SGTL5000_CHIP_LINE_OUT_CTRL */ #define SGTL5000_LINE_OUT_CURRENT_MASK … #define SGTL5000_LINE_OUT_CURRENT_SHIFT … #define SGTL5000_LINE_OUT_CURRENT_WIDTH … #define SGTL5000_LINE_OUT_CURRENT_180u … #define SGTL5000_LINE_OUT_CURRENT_270u … #define SGTL5000_LINE_OUT_CURRENT_360u … #define SGTL5000_LINE_OUT_CURRENT_450u … #define SGTL5000_LINE_OUT_CURRENT_540u … #define SGTL5000_LINE_OUT_GND_MASK … #define SGTL5000_LINE_OUT_GND_SHIFT … #define SGTL5000_LINE_OUT_GND_WIDTH … #define SGTL5000_LINE_OUT_GND_BASE … #define SGTL5000_LINE_OUT_GND_STP … #define SGTL5000_LINE_OUT_GND_MAX … /* * SGTL5000_CHIP_LINE_OUT_VOL */ #define SGTL5000_LINE_OUT_VOL_RIGHT_MASK … #define SGTL5000_LINE_OUT_VOL_RIGHT_SHIFT … #define SGTL5000_LINE_OUT_VOL_RIGHT_WIDTH … #define SGTL5000_LINE_OUT_VOL_LEFT_MASK … #define SGTL5000_LINE_OUT_VOL_LEFT_SHIFT … #define SGTL5000_LINE_OUT_VOL_LEFT_WIDTH … /* * SGTL5000_CHIP_ANA_POWER */ #define SGTL5000_ANA_POWER_DEFAULT … #define SGTL5000_DAC_STEREO … #define SGTL5000_LINREG_SIMPLE_POWERUP … #define SGTL5000_STARTUP_POWERUP … #define SGTL5000_VDDC_CHRGPMP_POWERUP … #define SGTL5000_PLL_POWERUP … #define SGTL5000_LINEREG_D_POWERUP … #define SGTL5000_VCOAMP_POWERUP … #define SGTL5000_VAG_POWERUP … #define SGTL5000_ADC_STEREO … #define SGTL5000_REFTOP_POWERUP … #define SGTL5000_HP_POWERUP … #define SGTL5000_DAC_POWERUP … #define SGTL5000_CAPLESS_HP_POWERUP … #define SGTL5000_ADC_POWERUP … #define SGTL5000_LINE_OUT_POWERUP … /* * SGTL5000_CHIP_PLL_CTRL */ #define SGTL5000_PLL_INT_DIV_MASK … #define SGTL5000_PLL_INT_DIV_SHIFT … #define SGTL5000_PLL_INT_DIV_WIDTH … #define SGTL5000_PLL_FRAC_DIV_MASK … #define SGTL5000_PLL_FRAC_DIV_SHIFT … #define SGTL5000_PLL_FRAC_DIV_WIDTH … /* * SGTL5000_CHIP_CLK_TOP_CTRL */ #define SGTL5000_INT_OSC_EN … #define SGTL5000_INPUT_FREQ_DIV2 … /* * SGTL5000_CHIP_ANA_STATUS */ #define SGTL5000_HP_LRSHORT … #define SGTL5000_CAPLESS_SHORT … #define SGTL5000_PLL_LOCKED … /* * SGTL5000_CHIP_SHORT_CTRL */ #define SGTL5000_LVLADJR_MASK … #define SGTL5000_LVLADJR_SHIFT … #define SGTL5000_LVLADJR_WIDTH … #define SGTL5000_LVLADJL_MASK … #define SGTL5000_LVLADJL_SHIFT … #define SGTL5000_LVLADJL_WIDTH … #define SGTL5000_LVLADJC_MASK … #define SGTL5000_LVLADJC_SHIFT … #define SGTL5000_LVLADJC_WIDTH … #define SGTL5000_LR_SHORT_MOD_MASK … #define SGTL5000_LR_SHORT_MOD_SHIFT … #define SGTL5000_LR_SHORT_MOD_WIDTH … #define SGTL5000_CM_SHORT_MOD_MASK … #define SGTL5000_CM_SHORT_MOD_SHIFT … #define SGTL5000_CM_SHORT_MOD_WIDTH … /* *SGTL5000_CHIP_ANA_TEST2 */ #define SGTL5000_MONO_DAC … /* * SGTL5000_DAP_CTRL */ #define SGTL5000_DAP_MIX_EN … #define SGTL5000_DAP_EN … #define SGTL5000_SYSCLK … #define SGTL5000_LRCLK … /* * SGTL5000_DAP_AUDIO_EQ */ #define SGTL5000_DAP_SEL_PEQ … #define SGTL5000_DAP_SEL_TONE_CTRL … #define SGTL5000_DAP_SEL_GEQ … #endif
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