/* SPDX-License-Identifier: GPL-2.0-only */ /* * ALSA SoC TLV320AIC23 codec driver * * Author: Arun KS, <[email protected]> * Copyright: (C) 2008 Mistral Solutions Pvt Ltd */ #ifndef _TLV320AIC23_H #define _TLV320AIC23_H struct device; struct regmap_config; extern const struct regmap_config tlv320aic23_regmap; int tlv320aic23_probe(struct device *dev, struct regmap *regmap); /* Codec TLV320AIC23 */ #define TLV320AIC23_LINVOL … #define TLV320AIC23_RINVOL … #define TLV320AIC23_LCHNVOL … #define TLV320AIC23_RCHNVOL … #define TLV320AIC23_ANLG … #define TLV320AIC23_DIGT … #define TLV320AIC23_PWR … #define TLV320AIC23_DIGT_FMT … #define TLV320AIC23_SRATE … #define TLV320AIC23_ACTIVE … #define TLV320AIC23_RESET … /* Left (right) line input volume control register */ #define TLV320AIC23_LRS_ENABLED … #define TLV320AIC23_LIM_MUTED … #define TLV320AIC23_LIV_DEFAULT … #define TLV320AIC23_LIV_MAX … #define TLV320AIC23_LIV_MIN … /* Left (right) channel headphone volume control register */ #define TLV320AIC23_LZC_ON … #define TLV320AIC23_LHV_DEFAULT … #define TLV320AIC23_LHV_MAX … #define TLV320AIC23_LHV_MIN … /* Analog audio path control register */ #define TLV320AIC23_STA_REG(x) … #define TLV320AIC23_STE_ENABLED … #define TLV320AIC23_DAC_SELECTED … #define TLV320AIC23_BYPASS_ON … #define TLV320AIC23_INSEL_MIC … #define TLV320AIC23_MICM_MUTED … #define TLV320AIC23_MICB_20DB … /* Digital audio path control register */ #define TLV320AIC23_DACM_MUTE … #define TLV320AIC23_DEEMP_32K … #define TLV320AIC23_DEEMP_44K … #define TLV320AIC23_DEEMP_48K … #define TLV320AIC23_ADCHP_ON … /* Power control down register */ #define TLV320AIC23_DEVICE_PWR_OFF … #define TLV320AIC23_CLK_OFF … #define TLV320AIC23_OSC_OFF … #define TLV320AIC23_OUT_OFF … #define TLV320AIC23_DAC_OFF … #define TLV320AIC23_ADC_OFF … #define TLV320AIC23_MIC_OFF … #define TLV320AIC23_LINE_OFF … /* Digital audio interface register */ #define TLV320AIC23_MS_MASTER … #define TLV320AIC23_LRSWAP_ON … #define TLV320AIC23_LRP_ON … #define TLV320AIC23_IWL_16 … #define TLV320AIC23_IWL_20 … #define TLV320AIC23_IWL_24 … #define TLV320AIC23_IWL_32 … #define TLV320AIC23_FOR_I2S … #define TLV320AIC23_FOR_DSP … #define TLV320AIC23_FOR_LJUST … /* Sample rate control register */ #define TLV320AIC23_CLKOUT_HALF … #define TLV320AIC23_CLKIN_HALF … #define TLV320AIC23_BOSR_384fs … #define TLV320AIC23_USB_CLK_ON … #define TLV320AIC23_SR_MASK … #define TLV320AIC23_CLKOUT_SHIFT … #define TLV320AIC23_CLKIN_SHIFT … #define TLV320AIC23_SR_SHIFT … #define TLV320AIC23_BOSR_SHIFT … /* Digital interface register */ #define TLV320AIC23_ACT_ON … /* * AUDIO related MACROS */ #define TLV320AIC23_DEFAULT_OUT_VOL … #define TLV320AIC23_DEFAULT_IN_VOLUME … #define TLV320AIC23_OUT_VOL_MIN … #define TLV320AIC23_OUT_VOL_MAX … #define TLV320AIC23_OUT_VO_RANGE … #define TLV320AIC23_OUT_VOL_MASK … #define TLV320AIC23_IN_VOL_MIN … #define TLV320AIC23_IN_VOL_MAX … #define TLV320AIC23_IN_VOL_RANGE … #define TLV320AIC23_IN_VOL_MASK … #define TLV320AIC23_SIDETONE_MASK … #define TLV320AIC23_SIDETONE_0 … #define TLV320AIC23_SIDETONE_6 … #define TLV320AIC23_SIDETONE_9 … #define TLV320AIC23_SIDETONE_12 … #define TLV320AIC23_SIDETONE_18 … #endif /* _TLV320AIC23_H */
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