linux/sound/soc/codecs/tlv320aic32x4-clk.c

/* SPDX-License-Identifier: GPL-2.0
 *
 * Clock Tree for the Texas Instruments TLV320AIC32x4
 *
 * Copyright 2019 Annaliese McDermond
 *
 * Author: Annaliese McDermond <[email protected]>
 */

#include <linux/clk-provider.h>
#include <linux/clkdev.h>
#include <linux/regmap.h>
#include <linux/device.h>

#include "tlv320aic32x4.h"

#define to_clk_aic32x4(_hw) …
struct clk_aic32x4 { … };

/*
 * struct clk_aic32x4_pll_muldiv - Multiplier/divider settings
 * @p:		Divider
 * @r:		first multiplier
 * @j:		integer part of second multiplier
 * @d:		decimal part of second multiplier
 */
struct clk_aic32x4_pll_muldiv { … };

struct aic32x4_clkdesc { … };

static int clk_aic32x4_pll_prepare(struct clk_hw *hw)
{ … }

static void clk_aic32x4_pll_unprepare(struct clk_hw *hw)
{ … }

static int clk_aic32x4_pll_is_prepared(struct clk_hw *hw)
{ … }

static int clk_aic32x4_pll_get_muldiv(struct clk_aic32x4 *pll,
			struct clk_aic32x4_pll_muldiv *settings)
{ … }

static int clk_aic32x4_pll_set_muldiv(struct clk_aic32x4 *pll,
			struct clk_aic32x4_pll_muldiv *settings)
{ … }

static unsigned long clk_aic32x4_pll_calc_rate(
			struct clk_aic32x4_pll_muldiv *settings,
			unsigned long parent_rate)
{ … }

static int clk_aic32x4_pll_calc_muldiv(struct clk_aic32x4_pll_muldiv *settings,
			unsigned long rate, unsigned long parent_rate)
{ … }

static unsigned long clk_aic32x4_pll_recalc_rate(struct clk_hw *hw,
			unsigned long parent_rate)
{ … }

static int clk_aic32x4_pll_determine_rate(struct clk_hw *hw,
					  struct clk_rate_request *req)
{ … }

static int clk_aic32x4_pll_set_rate(struct clk_hw *hw,
			unsigned long rate,
			unsigned long parent_rate)
{ … }

static int clk_aic32x4_pll_set_parent(struct clk_hw *hw, u8 index)
{ … }

static u8 clk_aic32x4_pll_get_parent(struct clk_hw *hw)
{ … }


static const struct clk_ops aic32x4_pll_ops = …;

static int clk_aic32x4_codec_clkin_set_parent(struct clk_hw *hw, u8 index)
{ … }

static u8 clk_aic32x4_codec_clkin_get_parent(struct clk_hw *hw)
{ … }

static const struct clk_ops aic32x4_codec_clkin_ops = …;

static int clk_aic32x4_div_prepare(struct clk_hw *hw)
{ … }

static void clk_aic32x4_div_unprepare(struct clk_hw *hw)
{ … }

static int clk_aic32x4_div_set_rate(struct clk_hw *hw, unsigned long rate,
				unsigned long parent_rate)
{ … }

static int clk_aic32x4_div_determine_rate(struct clk_hw *hw,
					  struct clk_rate_request *req)
{ … }

static unsigned long clk_aic32x4_div_recalc_rate(struct clk_hw *hw,
						unsigned long parent_rate)
{ … }

static const struct clk_ops aic32x4_div_ops = …;

static int clk_aic32x4_bdiv_set_parent(struct clk_hw *hw, u8 index)
{ … }

static u8 clk_aic32x4_bdiv_get_parent(struct clk_hw *hw)
{ … }

static const struct clk_ops aic32x4_bdiv_ops = …;

static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = …;

static struct clk *aic32x4_register_clk(struct device *dev,
			struct aic32x4_clkdesc *desc)
{ … }

int aic32x4_register_clocks(struct device *dev, const char *mclk_name)
{ … }
EXPORT_SYMBOL_GPL(…);