linux/sound/soc/codecs/tlv320adcx140.h

// SPDX-License-Identifier: GPL-2.0
// TLV320ADCX140 Sound driver
// Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/

#ifndef _TLV320ADCX140_H
#define _TLV320ADCX140_H

#define ADCX140_RATES

#define ADCX140_FORMATS

#define ADCX140_PAGE_SELECT
#define ADCX140_SW_RESET
#define ADCX140_SLEEP_CFG
#define ADCX140_SHDN_CFG
#define ADCX140_ASI_CFG0
#define ADCX140_ASI_CFG1
#define ADCX140_ASI_CFG2
#define ADCX140_ASI_CH1
#define ADCX140_ASI_CH2
#define ADCX140_ASI_CH3
#define ADCX140_ASI_CH4
#define ADCX140_ASI_CH5
#define ADCX140_ASI_CH6
#define ADCX140_ASI_CH7
#define ADCX140_ASI_CH8
#define ADCX140_MST_CFG0
#define ADCX140_MST_CFG1
#define ADCX140_ASI_STS
#define ADCX140_CLK_SRC
#define ADCX140_PDMCLK_CFG
#define ADCX140_PDM_CFG
#define ADCX140_GPIO_CFG0
#define ADCX140_GPO_CFG0
#define ADCX140_GPO_CFG1
#define ADCX140_GPO_CFG2
#define ADCX140_GPO_CFG3
#define ADCX140_GPO_VAL
#define ADCX140_GPIO_MON
#define ADCX140_GPI_CFG0
#define ADCX140_GPI_CFG1
#define ADCX140_GPI_MON
#define ADCX140_INT_CFG
#define ADCX140_INT_MASK0
#define ADCX140_INT_LTCH0
#define ADCX140_BIAS_CFG
#define ADCX140_CH1_CFG0
#define ADCX140_CH1_CFG1
#define ADCX140_CH1_CFG2
#define ADCX140_CH1_CFG3
#define ADCX140_CH1_CFG4
#define ADCX140_CH2_CFG0
#define ADCX140_CH2_CFG1
#define ADCX140_CH2_CFG2
#define ADCX140_CH2_CFG3
#define ADCX140_CH2_CFG4
#define ADCX140_CH3_CFG0
#define ADCX140_CH3_CFG1
#define ADCX140_CH3_CFG2
#define ADCX140_CH3_CFG3
#define ADCX140_CH3_CFG4
#define ADCX140_CH4_CFG0
#define ADCX140_CH4_CFG1
#define ADCX140_CH4_CFG2
#define ADCX140_CH4_CFG3
#define ADCX140_CH4_CFG4
#define ADCX140_CH5_CFG2
#define ADCX140_CH5_CFG3
#define ADCX140_CH5_CFG4
#define ADCX140_CH6_CFG2
#define ADCX140_CH6_CFG3
#define ADCX140_CH6_CFG4
#define ADCX140_CH7_CFG2
#define ADCX140_CH7_CFG3
#define ADCX140_CH7_CFG4
#define ADCX140_CH8_CFG2
#define ADCX140_CH8_CFG3
#define ADCX140_CH8_CFG4
#define ADCX140_DSP_CFG0
#define ADCX140_DSP_CFG1
#define ADCX140_DRE_CFG0
#define ADCX140_AGC_CFG0
#define ADCX140_IN_CH_EN
#define ADCX140_ASI_OUT_CH_EN
#define ADCX140_PWR_CFG
#define ADCX140_DEV_STS0
#define ADCX140_DEV_STS1
#define ADCX140_PHASE_CALIB

#define ADCX140_RESET

#define ADCX140_WAKE_DEV
#define ADCX140_AREG_INTERNAL

#define ADCX140_BCLKINV_BIT
#define ADCX140_FSYNCINV_BIT
#define ADCX140_INV_MSK
#define ADCX140_BCLK_FSYNC_MASTER
#define ADCX140_I2S_MODE_BIT
#define ADCX140_LEFT_JUST_BIT
#define ADCX140_ASI_FORMAT_MSK

#define ADCX140_16_BIT_WORD
#define ADCX140_20_BIT_WORD
#define ADCX140_24_BIT_WORD
#define ADCX140_32_BIT_WORD
#define ADCX140_WORD_LEN_MSK

#define ADCX140_MAX_CHANNELS

#define ADCX140_MIC_BIAS_VAL_VREF
#define ADCX140_MIC_BIAS_VAL_VREF_1096
#define ADCX140_MIC_BIAS_VAL_AVDD
#define ADCX140_MIC_BIAS_VAL_MSK
#define ADCX140_MIC_BIAS_SHIFT

#define ADCX140_MIC_BIAS_VREF_275V
#define ADCX140_MIC_BIAS_VREF_25V
#define ADCX140_MIC_BIAS_VREF_1375V
#define ADCX140_MIC_BIAS_VREF_MSK

#define ADCX140_PWR_CTRL_MSK
#define ADCX140_PWR_CFG_BIAS_PDZ
#define ADCX140_PWR_CFG_ADC_PDZ
#define ADCX140_PWR_CFG_PLL_PDZ

#define ADCX140_TX_OFFSET_MASK

#define ADCX140_NUM_PDM_EDGES
#define ADCX140_PDM_EDGE_SHIFT

#define ADCX140_NUM_GPI_PINS
#define ADCX140_GPI_SHIFT
#define ADCX140_GPI1_INDEX
#define ADCX140_GPI2_INDEX
#define ADCX140_GPI3_INDEX
#define ADCX140_GPI4_INDEX

#define ADCX140_NUM_GPOS
#define ADCX140_NUM_GPO_CFGS
#define ADCX140_GPO_SHIFT
#define ADCX140_GPO_CFG_MAX
#define ADCX140_GPO_DRV_MAX

#define ADCX140_TX_FILL

#define ADCX140_NUM_GPIO_CFGS
#define ADCX140_GPIO_SHIFT
#define ADCX140_GPIO_CFG_MAX
#define ADCX140_GPIO_DRV_MAX

#endif /* _TLV320ADCX140_ */