// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. // Copyright (c) 2017-2018, Linaro Limited #include <linux/slab.h> #include <sound/soc.h> #include <linux/kernel.h> #include <linux/delay.h> #include "wcd9335.h" #include "wcd-clsh-v2.h" struct wcd_clsh_ctrl { … }; /* Class-H registers for codecs from and above WCD9335 */ #define WCD9XXX_A_CDC_RX0_RX_PATH_CFG0 … #define WCD9XXX_A_CDC_RX_PATH_CLSH_EN_MASK … #define WCD9XXX_A_CDC_RX_PATH_CLSH_ENABLE … #define WCD9XXX_A_CDC_RX_PATH_CLSH_DISABLE … #define WCD9XXX_A_CDC_RX1_RX_PATH_CFG0 … #define WCD9XXX_A_CDC_RX2_RX_PATH_CFG0 … #define WCD9XXX_A_CDC_CLSH_K1_MSB … #define WCD9XXX_A_CDC_CLSH_K1_MSB_COEF_MASK … #define WCD9XXX_A_CDC_CLSH_K1_LSB … #define WCD9XXX_A_CDC_CLSH_K1_LSB_COEF_MASK … #define WCD9XXX_A_ANA_RX_SUPPLIES … #define WCD9XXX_A_ANA_RX_REGULATOR_MODE_MASK … #define WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_H … #define WCD9XXX_A_ANA_RX_REGULATOR_MODE_CLS_AB … #define WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_MASK … #define WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_UHQA … #define WCD9XXX_A_ANA_RX_VNEG_PWR_LVL_DEFAULT … #define WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_MASK … #define WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_UHQA … #define WCD9XXX_A_ANA_RX_VPOS_PWR_LVL_DEFAULT … #define WCD9XXX_A_ANA_RX_VNEG_EN_MASK … #define WCD9XXX_A_ANA_RX_VNEG_EN_SHIFT … #define WCD9XXX_A_ANA_RX_VNEG_ENABLE … #define WCD9XXX_A_ANA_RX_VNEG_DISABLE … #define WCD9XXX_A_ANA_RX_VPOS_EN_MASK … #define WCD9XXX_A_ANA_RX_VPOS_EN_SHIFT … #define WCD9XXX_A_ANA_RX_VPOS_ENABLE … #define WCD9XXX_A_ANA_RX_VPOS_DISABLE … #define WCD9XXX_A_ANA_HPH … #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_MASK … #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_UHQA … #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_LP … #define WCD9XXX_A_ANA_HPH_PWR_LEVEL_NORMAL … #define WCD9XXX_A_CDC_CLSH_CRC … #define WCD9XXX_A_CDC_CLSH_CRC_CLK_EN_MASK … #define WCD9XXX_A_CDC_CLSH_CRC_CLK_ENABLE … #define WCD9XXX_A_CDC_CLSH_CRC_CLK_DISABLE … #define WCD9XXX_FLYBACK_EN … #define WCD9XXX_FLYBACK_EN_DELAY_SEL_MASK … #define WCD9XXX_FLYBACK_EN_DELAY_26P25_US … #define WCD9XXX_FLYBACK_EN_RESET_BY_EXT_MASK … #define WCD9XXX_FLYBACK_EN_PWDN_WITHOUT_DELAY … #define WCD9XXX_FLYBACK_EN_PWDN_WITH_DELAY … #define WCD9XXX_RX_BIAS_FLYB_BUFF … #define WCD9XXX_RX_BIAS_FLYB_VNEG_5_UA_MASK … #define WCD9XXX_RX_BIAS_FLYB_VPOS_5_UA_MASK … #define WCD9XXX_HPH_L_EN … #define WCD9XXX_HPH_CONST_SEL_L_MASK … #define WCD9XXX_HPH_CONST_SEL_BYPASS … #define WCD9XXX_HPH_CONST_SEL_LP_PATH … #define WCD9XXX_HPH_CONST_SEL_HQ_PATH … #define WCD9XXX_HPH_R_EN … #define WCD9XXX_HPH_REFBUFF_UHQA_CTL … #define WCD9XXX_HPH_REFBUFF_UHQA_GAIN_MASK … #define WCD9XXX_CLASSH_CTRL_VCL_2 … #define WCD9XXX_CLASSH_CTRL_VCL_2_VREF_FILT_1_MASK … #define WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_50KOHM … #define WCD9XXX_CLASSH_CTRL_VCL_VREF_FILT_R_0KOHM … #define WCD9XXX_CDC_RX1_RX_PATH_CTL … #define WCD9XXX_CDC_RX2_RX_PATH_CTL … #define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL … #define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_EN_MASK … #define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_11P3_EN_MASK … #define WCD9XXX_CLASSH_CTRL_CCL_1 … #define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_MASK … #define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_50MA … #define WCD9XXX_CLASSH_CTRL_CCL_1_DELTA_IPEAK_30MA … #define WCD9XXX_BASE_ADDRESS … #define WCD9XXX_ANA_RX_SUPPLIES … #define WCD9XXX_ANA_HPH … #define WCD9XXX_CLASSH_MODE_2 … #define WCD9XXX_CLASSH_MODE_3 … #define WCD9XXX_FLYBACK_VNEG_CTRL_1 … #define WCD9XXX_FLYBACK_VNEG_CTRL_4 … #define WCD9XXX_FLYBACK_VNEGDAC_CTRL_2 … #define WCD9XXX_RX_BIAS_HPH_LOWPOWER … #define WCD9XXX_V3_RX_BIAS_FLYB_BUFF … #define WCD9XXX_HPH_PA_CTL1 … #define WCD9XXX_HPH_NEW_INT_PA_MISC2 … #define CLSH_REQ_ENABLE … #define CLSH_REQ_DISABLE … #define WCD_USLEEP_RANGE … enum { … }; static inline void wcd_enable_clsh_block(struct wcd_clsh_ctrl *ctrl, bool enable) { … } static inline void wcd_clsh_set_buck_mode(struct snd_soc_component *comp, int mode) { … } static void wcd_clsh_v3_set_buck_mode(struct snd_soc_component *component, int mode) { … } static inline void wcd_clsh_set_flyback_mode(struct snd_soc_component *comp, int mode) { … } static void wcd_clsh_buck_ctrl(struct wcd_clsh_ctrl *ctrl, int mode, bool enable) { … } static void wcd_clsh_v3_buck_ctrl(struct snd_soc_component *component, struct wcd_clsh_ctrl *ctrl, int mode, bool enable) { … } static void wcd_clsh_flyback_ctrl(struct wcd_clsh_ctrl *ctrl, int mode, bool enable) { … } static void wcd_clsh_set_gain_path(struct wcd_clsh_ctrl *ctrl, int mode) { … } static void wcd_clsh_v2_set_hph_mode(struct snd_soc_component *comp, int mode) { … } static void wcd_clsh_v3_set_hph_mode(struct snd_soc_component *component, int mode) { … } void wcd_clsh_set_hph_mode(struct wcd_clsh_ctrl *ctrl, int mode) { … } EXPORT_SYMBOL_GPL(…); static void wcd_clsh_set_flyback_current(struct snd_soc_component *comp, int mode) { … } static void wcd_clsh_set_buck_regulator_mode(struct snd_soc_component *comp, int mode) { … } static void wcd_clsh_v3_set_buck_regulator_mode(struct snd_soc_component *component, int mode) { … } static void wcd_clsh_v3_set_flyback_mode(struct snd_soc_component *component, int mode) { … } static void wcd_clsh_v3_force_iq_ctl(struct snd_soc_component *component, int mode, bool enable) { … } static void wcd_clsh_v3_flyback_ctrl(struct snd_soc_component *component, struct wcd_clsh_ctrl *ctrl, int mode, bool enable) { … } static void wcd_clsh_v3_set_flyback_current(struct snd_soc_component *component, int mode) { … } static void wcd_clsh_v3_state_aux(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_state_lo(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_v3_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_state_hph_r(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_v3_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_state_hph_l(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_v3_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static void wcd_clsh_state_ear(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } static int _wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, int req_state, bool is_enable, int mode) { … } /* * Function: wcd_clsh_is_state_valid * Params: state * Description: * Provides information on valid states of Class H configuration */ static bool wcd_clsh_is_state_valid(int state) { … } /* * Function: wcd_clsh_fsm * Params: ctrl, req_state, req_type, clsh_event * Description: * This function handles PRE DAC and POST DAC conditions of different devices * and updates class H configuration of different combination of devices * based on validity of their states. ctrl will contain current * class h state information */ int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl, enum wcd_clsh_event clsh_event, int nstate, enum wcd_clsh_mode mode) { … } EXPORT_SYMBOL_GPL(…); int wcd_clsh_ctrl_get_state(struct wcd_clsh_ctrl *ctrl) { … } EXPORT_SYMBOL_GPL(…); struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(struct snd_soc_component *comp, int version) { … } EXPORT_SYMBOL_GPL(…); void wcd_clsh_ctrl_free(struct wcd_clsh_ctrl *ctrl) { … } EXPORT_SYMBOL_GPL(…); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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