/* SPDX-License-Identifier: GPL-2.0-only */ /* * wm5100.h -- WM5100 ALSA SoC Audio driver * * Copyright 2011 Wolfson Microelectronics plc * * Author: Mark Brown <[email protected]> */ #ifndef WM5100_ASOC_H #define WM5100_ASOC_H #include <sound/soc.h> #include <linux/regmap.h> int wm5100_detect(struct snd_soc_component *component, struct snd_soc_jack *jack); #define WM5100_CLK_AIF1 … #define WM5100_CLK_AIF2 … #define WM5100_CLK_AIF3 … #define WM5100_CLK_SYSCLK … #define WM5100_CLK_ASYNCCLK … #define WM5100_CLK_32KHZ … #define WM5100_CLK_OPCLK … #define WM5100_CLKSRC_MCLK1 … #define WM5100_CLKSRC_MCLK2 … #define WM5100_CLKSRC_SYSCLK … #define WM5100_CLKSRC_FLL1 … #define WM5100_CLKSRC_FLL2 … #define WM5100_CLKSRC_AIF1BCLK … #define WM5100_CLKSRC_AIF2BCLK … #define WM5100_CLKSRC_AIF3BCLK … #define WM5100_CLKSRC_ASYNCCLK … #define WM5100_FLL1 … #define WM5100_FLL2 … #define WM5100_FLL_SRC_MCLK1 … #define WM5100_FLL_SRC_MCLK2 … #define WM5100_FLL_SRC_FLL1 … #define WM5100_FLL_SRC_FLL2 … #define WM5100_FLL_SRC_AIF1BCLK … #define WM5100_FLL_SRC_AIF2BCLK … #define WM5100_FLL_SRC_AIF3BCLK … /* * Register values. */ #define WM5100_SOFTWARE_RESET … #define WM5100_DEVICE_REVISION … #define WM5100_CTRL_IF_1 … #define WM5100_TONE_GENERATOR_1 … #define WM5100_PWM_DRIVE_1 … #define WM5100_PWM_DRIVE_2 … #define WM5100_PWM_DRIVE_3 … #define WM5100_CLOCKING_1 … #define WM5100_CLOCKING_3 … #define WM5100_CLOCKING_4 … #define WM5100_CLOCKING_5 … #define WM5100_CLOCKING_6 … #define WM5100_CLOCKING_7 … #define WM5100_CLOCKING_8 … #define WM5100_ASRC_ENABLE … #define WM5100_ASRC_STATUS … #define WM5100_ASRC_RATE1 … #define WM5100_ISRC_1_CTRL_1 … #define WM5100_ISRC_1_CTRL_2 … #define WM5100_ISRC_2_CTRL1 … #define WM5100_ISRC_2_CTRL_2 … #define WM5100_FLL1_CONTROL_1 … #define WM5100_FLL1_CONTROL_2 … #define WM5100_FLL1_CONTROL_3 … #define WM5100_FLL1_CONTROL_5 … #define WM5100_FLL1_CONTROL_6 … #define WM5100_FLL1_EFS_1 … #define WM5100_FLL2_CONTROL_1 … #define WM5100_FLL2_CONTROL_2 … #define WM5100_FLL2_CONTROL_3 … #define WM5100_FLL2_CONTROL_5 … #define WM5100_FLL2_CONTROL_6 … #define WM5100_FLL2_EFS_1 … #define WM5100_MIC_CHARGE_PUMP_1 … #define WM5100_MIC_CHARGE_PUMP_2 … #define WM5100_HP_CHARGE_PUMP_1 … #define WM5100_LDO1_CONTROL … #define WM5100_MIC_BIAS_CTRL_1 … #define WM5100_MIC_BIAS_CTRL_2 … #define WM5100_MIC_BIAS_CTRL_3 … #define WM5100_ACCESSORY_DETECT_MODE_1 … #define WM5100_HEADPHONE_DETECT_1 … #define WM5100_HEADPHONE_DETECT_2 … #define WM5100_MIC_DETECT_1 … #define WM5100_MIC_DETECT_2 … #define WM5100_MIC_DETECT_3 … #define WM5100_MISC_CONTROL … #define WM5100_INPUT_ENABLES … #define WM5100_INPUT_ENABLES_STATUS … #define WM5100_IN1L_CONTROL … #define WM5100_IN1R_CONTROL … #define WM5100_IN2L_CONTROL … #define WM5100_IN2R_CONTROL … #define WM5100_IN3L_CONTROL … #define WM5100_IN3R_CONTROL … #define WM5100_IN4L_CONTROL … #define WM5100_IN4R_CONTROL … #define WM5100_RXANC_SRC … #define WM5100_INPUT_VOLUME_RAMP … #define WM5100_ADC_DIGITAL_VOLUME_1L … #define WM5100_ADC_DIGITAL_VOLUME_1R … #define WM5100_ADC_DIGITAL_VOLUME_2L … #define WM5100_ADC_DIGITAL_VOLUME_2R … #define WM5100_ADC_DIGITAL_VOLUME_3L … #define WM5100_ADC_DIGITAL_VOLUME_3R … #define WM5100_ADC_DIGITAL_VOLUME_4L … #define WM5100_ADC_DIGITAL_VOLUME_4R … #define WM5100_OUTPUT_ENABLES_2 … #define WM5100_OUTPUT_STATUS_1 … #define WM5100_OUTPUT_STATUS_2 … #define WM5100_CHANNEL_ENABLES_1 … #define WM5100_OUT_VOLUME_1L … #define WM5100_OUT_VOLUME_1R … #define WM5100_DAC_VOLUME_LIMIT_1L … #define WM5100_DAC_VOLUME_LIMIT_1R … #define WM5100_OUT_VOLUME_2L … #define WM5100_OUT_VOLUME_2R … #define WM5100_DAC_VOLUME_LIMIT_2L … #define WM5100_DAC_VOLUME_LIMIT_2R … #define WM5100_OUT_VOLUME_3L … #define WM5100_OUT_VOLUME_3R … #define WM5100_DAC_VOLUME_LIMIT_3L … #define WM5100_DAC_VOLUME_LIMIT_3R … #define WM5100_OUT_VOLUME_4L … #define WM5100_OUT_VOLUME_4R … #define WM5100_DAC_VOLUME_LIMIT_5L … #define WM5100_DAC_VOLUME_LIMIT_5R … #define WM5100_DAC_VOLUME_LIMIT_6L … #define WM5100_DAC_VOLUME_LIMIT_6R … #define WM5100_DAC_AEC_CONTROL_1 … #define WM5100_OUTPUT_VOLUME_RAMP … #define WM5100_DAC_DIGITAL_VOLUME_1L … #define WM5100_DAC_DIGITAL_VOLUME_1R … #define WM5100_DAC_DIGITAL_VOLUME_2L … #define WM5100_DAC_DIGITAL_VOLUME_2R … #define WM5100_DAC_DIGITAL_VOLUME_3L … #define WM5100_DAC_DIGITAL_VOLUME_3R … #define WM5100_DAC_DIGITAL_VOLUME_4L … #define WM5100_DAC_DIGITAL_VOLUME_4R … #define WM5100_DAC_DIGITAL_VOLUME_5L … #define WM5100_DAC_DIGITAL_VOLUME_5R … #define WM5100_DAC_DIGITAL_VOLUME_6L … #define WM5100_DAC_DIGITAL_VOLUME_6R … #define WM5100_PDM_SPK1_CTRL_1 … #define WM5100_PDM_SPK1_CTRL_2 … #define WM5100_PDM_SPK2_CTRL_1 … #define WM5100_PDM_SPK2_CTRL_2 … #define WM5100_AUDIO_IF_1_1 … #define WM5100_AUDIO_IF_1_2 … #define WM5100_AUDIO_IF_1_3 … #define WM5100_AUDIO_IF_1_4 … #define WM5100_AUDIO_IF_1_5 … #define WM5100_AUDIO_IF_1_6 … #define WM5100_AUDIO_IF_1_7 … #define WM5100_AUDIO_IF_1_8 … #define WM5100_AUDIO_IF_1_9 … #define WM5100_AUDIO_IF_1_10 … #define WM5100_AUDIO_IF_1_11 … #define WM5100_AUDIO_IF_1_12 … #define WM5100_AUDIO_IF_1_13 … #define WM5100_AUDIO_IF_1_14 … #define WM5100_AUDIO_IF_1_15 … #define WM5100_AUDIO_IF_1_16 … #define WM5100_AUDIO_IF_1_17 … #define WM5100_AUDIO_IF_1_18 … #define WM5100_AUDIO_IF_1_19 … #define WM5100_AUDIO_IF_1_20 … #define WM5100_AUDIO_IF_1_21 … #define WM5100_AUDIO_IF_1_22 … #define WM5100_AUDIO_IF_1_23 … #define WM5100_AUDIO_IF_1_24 … #define WM5100_AUDIO_IF_1_25 … #define WM5100_AUDIO_IF_1_26 … #define WM5100_AUDIO_IF_1_27 … #define WM5100_AUDIO_IF_2_1 … #define WM5100_AUDIO_IF_2_2 … #define WM5100_AUDIO_IF_2_3 … #define WM5100_AUDIO_IF_2_4 … #define WM5100_AUDIO_IF_2_5 … #define WM5100_AUDIO_IF_2_6 … #define WM5100_AUDIO_IF_2_7 … #define WM5100_AUDIO_IF_2_8 … #define WM5100_AUDIO_IF_2_9 … #define WM5100_AUDIO_IF_2_10 … #define WM5100_AUDIO_IF_2_11 … #define WM5100_AUDIO_IF_2_18 … #define WM5100_AUDIO_IF_2_19 … #define WM5100_AUDIO_IF_2_26 … #define WM5100_AUDIO_IF_2_27 … #define WM5100_AUDIO_IF_3_1 … #define WM5100_AUDIO_IF_3_2 … #define WM5100_AUDIO_IF_3_3 … #define WM5100_AUDIO_IF_3_4 … #define WM5100_AUDIO_IF_3_5 … #define WM5100_AUDIO_IF_3_6 … #define WM5100_AUDIO_IF_3_7 … #define WM5100_AUDIO_IF_3_8 … #define WM5100_AUDIO_IF_3_9 … #define WM5100_AUDIO_IF_3_10 … #define WM5100_AUDIO_IF_3_11 … #define WM5100_AUDIO_IF_3_18 … #define WM5100_AUDIO_IF_3_19 … #define WM5100_AUDIO_IF_3_26 … #define WM5100_AUDIO_IF_3_27 … #define WM5100_PWM1MIX_INPUT_1_SOURCE … #define WM5100_PWM1MIX_INPUT_1_VOLUME … #define WM5100_PWM1MIX_INPUT_2_SOURCE … #define WM5100_PWM1MIX_INPUT_2_VOLUME … #define WM5100_PWM1MIX_INPUT_3_SOURCE … #define WM5100_PWM1MIX_INPUT_3_VOLUME … #define WM5100_PWM1MIX_INPUT_4_SOURCE … #define WM5100_PWM1MIX_INPUT_4_VOLUME … #define WM5100_PWM2MIX_INPUT_1_SOURCE … #define WM5100_PWM2MIX_INPUT_1_VOLUME … #define WM5100_PWM2MIX_INPUT_2_SOURCE … #define WM5100_PWM2MIX_INPUT_2_VOLUME … #define WM5100_PWM2MIX_INPUT_3_SOURCE … #define WM5100_PWM2MIX_INPUT_3_VOLUME … #define WM5100_PWM2MIX_INPUT_4_SOURCE … #define WM5100_PWM2MIX_INPUT_4_VOLUME … #define WM5100_OUT1LMIX_INPUT_1_SOURCE … #define WM5100_OUT1LMIX_INPUT_1_VOLUME … #define WM5100_OUT1LMIX_INPUT_2_SOURCE … #define WM5100_OUT1LMIX_INPUT_2_VOLUME … #define WM5100_OUT1LMIX_INPUT_3_SOURCE … #define WM5100_OUT1LMIX_INPUT_3_VOLUME … #define WM5100_OUT1LMIX_INPUT_4_SOURCE … #define WM5100_OUT1LMIX_INPUT_4_VOLUME … #define WM5100_OUT1RMIX_INPUT_1_SOURCE … #define WM5100_OUT1RMIX_INPUT_1_VOLUME … #define WM5100_OUT1RMIX_INPUT_2_SOURCE … #define WM5100_OUT1RMIX_INPUT_2_VOLUME … #define WM5100_OUT1RMIX_INPUT_3_SOURCE … #define WM5100_OUT1RMIX_INPUT_3_VOLUME … #define WM5100_OUT1RMIX_INPUT_4_SOURCE … #define WM5100_OUT1RMIX_INPUT_4_VOLUME … #define WM5100_OUT2LMIX_INPUT_1_SOURCE … #define WM5100_OUT2LMIX_INPUT_1_VOLUME … #define WM5100_OUT2LMIX_INPUT_2_SOURCE … #define WM5100_OUT2LMIX_INPUT_2_VOLUME … #define WM5100_OUT2LMIX_INPUT_3_SOURCE … #define WM5100_OUT2LMIX_INPUT_3_VOLUME … #define WM5100_OUT2LMIX_INPUT_4_SOURCE … #define WM5100_OUT2LMIX_INPUT_4_VOLUME … #define WM5100_OUT2RMIX_INPUT_1_SOURCE … #define WM5100_OUT2RMIX_INPUT_1_VOLUME … #define WM5100_OUT2RMIX_INPUT_2_SOURCE … #define WM5100_OUT2RMIX_INPUT_2_VOLUME … #define WM5100_OUT2RMIX_INPUT_3_SOURCE … #define WM5100_OUT2RMIX_INPUT_3_VOLUME … #define WM5100_OUT2RMIX_INPUT_4_SOURCE … #define WM5100_OUT2RMIX_INPUT_4_VOLUME … #define WM5100_OUT3LMIX_INPUT_1_SOURCE … #define WM5100_OUT3LMIX_INPUT_1_VOLUME … #define WM5100_OUT3LMIX_INPUT_2_SOURCE … #define WM5100_OUT3LMIX_INPUT_2_VOLUME … #define WM5100_OUT3LMIX_INPUT_3_SOURCE … #define WM5100_OUT3LMIX_INPUT_3_VOLUME … #define WM5100_OUT3LMIX_INPUT_4_SOURCE … #define WM5100_OUT3LMIX_INPUT_4_VOLUME … #define WM5100_OUT3RMIX_INPUT_1_SOURCE … #define WM5100_OUT3RMIX_INPUT_1_VOLUME … #define WM5100_OUT3RMIX_INPUT_2_SOURCE … #define WM5100_OUT3RMIX_INPUT_2_VOLUME … #define WM5100_OUT3RMIX_INPUT_3_SOURCE … #define WM5100_OUT3RMIX_INPUT_3_VOLUME … #define WM5100_OUT3RMIX_INPUT_4_SOURCE … #define WM5100_OUT3RMIX_INPUT_4_VOLUME … #define WM5100_OUT4LMIX_INPUT_1_SOURCE … #define WM5100_OUT4LMIX_INPUT_1_VOLUME … #define WM5100_OUT4LMIX_INPUT_2_SOURCE … #define WM5100_OUT4LMIX_INPUT_2_VOLUME … #define WM5100_OUT4LMIX_INPUT_3_SOURCE … #define WM5100_OUT4LMIX_INPUT_3_VOLUME … #define WM5100_OUT4LMIX_INPUT_4_SOURCE … #define WM5100_OUT4LMIX_INPUT_4_VOLUME … #define WM5100_OUT4RMIX_INPUT_1_SOURCE … #define WM5100_OUT4RMIX_INPUT_1_VOLUME … #define WM5100_OUT4RMIX_INPUT_2_SOURCE … #define WM5100_OUT4RMIX_INPUT_2_VOLUME … #define WM5100_OUT4RMIX_INPUT_3_SOURCE … #define WM5100_OUT4RMIX_INPUT_3_VOLUME … #define WM5100_OUT4RMIX_INPUT_4_SOURCE … #define WM5100_OUT4RMIX_INPUT_4_VOLUME … #define WM5100_OUT5LMIX_INPUT_1_SOURCE … #define WM5100_OUT5LMIX_INPUT_1_VOLUME … #define WM5100_OUT5LMIX_INPUT_2_SOURCE … #define WM5100_OUT5LMIX_INPUT_2_VOLUME … #define WM5100_OUT5LMIX_INPUT_3_SOURCE … #define WM5100_OUT5LMIX_INPUT_3_VOLUME … #define WM5100_OUT5LMIX_INPUT_4_SOURCE … #define WM5100_OUT5LMIX_INPUT_4_VOLUME … #define WM5100_OUT5RMIX_INPUT_1_SOURCE … #define WM5100_OUT5RMIX_INPUT_1_VOLUME … #define WM5100_OUT5RMIX_INPUT_2_SOURCE … #define WM5100_OUT5RMIX_INPUT_2_VOLUME … #define WM5100_OUT5RMIX_INPUT_3_SOURCE … #define WM5100_OUT5RMIX_INPUT_3_VOLUME … #define WM5100_OUT5RMIX_INPUT_4_SOURCE … #define WM5100_OUT5RMIX_INPUT_4_VOLUME … #define WM5100_OUT6LMIX_INPUT_1_SOURCE … #define WM5100_OUT6LMIX_INPUT_1_VOLUME … #define WM5100_OUT6LMIX_INPUT_2_SOURCE … #define WM5100_OUT6LMIX_INPUT_2_VOLUME … #define WM5100_OUT6LMIX_INPUT_3_SOURCE … #define WM5100_OUT6LMIX_INPUT_3_VOLUME … #define WM5100_OUT6LMIX_INPUT_4_SOURCE … #define WM5100_OUT6LMIX_INPUT_4_VOLUME … #define WM5100_OUT6RMIX_INPUT_1_SOURCE … #define WM5100_OUT6RMIX_INPUT_1_VOLUME … #define WM5100_OUT6RMIX_INPUT_2_SOURCE … #define WM5100_OUT6RMIX_INPUT_2_VOLUME … #define WM5100_OUT6RMIX_INPUT_3_SOURCE … #define WM5100_OUT6RMIX_INPUT_3_VOLUME … #define WM5100_OUT6RMIX_INPUT_4_SOURCE … #define WM5100_OUT6RMIX_INPUT_4_VOLUME … #define WM5100_AIF1TX1MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX1MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX1MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX1MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX1MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX1MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX1MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX1MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX2MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX2MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX2MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX2MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX2MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX2MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX2MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX2MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX3MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX3MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX3MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX3MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX3MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX3MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX3MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX3MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX4MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX4MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX4MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX4MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX4MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX4MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX4MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX4MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX5MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX5MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX5MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX5MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX5MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX5MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX5MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX5MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX6MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX6MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX6MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX6MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX6MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX6MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX6MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX6MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX7MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX7MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX7MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX7MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX7MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX7MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX7MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX7MIX_INPUT_4_VOLUME … #define WM5100_AIF1TX8MIX_INPUT_1_SOURCE … #define WM5100_AIF1TX8MIX_INPUT_1_VOLUME … #define WM5100_AIF1TX8MIX_INPUT_2_SOURCE … #define WM5100_AIF1TX8MIX_INPUT_2_VOLUME … #define WM5100_AIF1TX8MIX_INPUT_3_SOURCE … #define WM5100_AIF1TX8MIX_INPUT_3_VOLUME … #define WM5100_AIF1TX8MIX_INPUT_4_SOURCE … #define WM5100_AIF1TX8MIX_INPUT_4_VOLUME … #define WM5100_AIF2TX1MIX_INPUT_1_SOURCE … #define WM5100_AIF2TX1MIX_INPUT_1_VOLUME … #define WM5100_AIF2TX1MIX_INPUT_2_SOURCE … #define WM5100_AIF2TX1MIX_INPUT_2_VOLUME … #define WM5100_AIF2TX1MIX_INPUT_3_SOURCE … #define WM5100_AIF2TX1MIX_INPUT_3_VOLUME … #define WM5100_AIF2TX1MIX_INPUT_4_SOURCE … #define WM5100_AIF2TX1MIX_INPUT_4_VOLUME … #define WM5100_AIF2TX2MIX_INPUT_1_SOURCE … #define WM5100_AIF2TX2MIX_INPUT_1_VOLUME … #define WM5100_AIF2TX2MIX_INPUT_2_SOURCE … #define WM5100_AIF2TX2MIX_INPUT_2_VOLUME … #define WM5100_AIF2TX2MIX_INPUT_3_SOURCE … #define WM5100_AIF2TX2MIX_INPUT_3_VOLUME … #define WM5100_AIF2TX2MIX_INPUT_4_SOURCE … #define WM5100_AIF2TX2MIX_INPUT_4_VOLUME … #define WM5100_AIF3TX1MIX_INPUT_1_SOURCE … #define WM5100_AIF3TX1MIX_INPUT_1_VOLUME … #define WM5100_AIF3TX1MIX_INPUT_2_SOURCE … #define WM5100_AIF3TX1MIX_INPUT_2_VOLUME … #define WM5100_AIF3TX1MIX_INPUT_3_SOURCE … #define WM5100_AIF3TX1MIX_INPUT_3_VOLUME … #define WM5100_AIF3TX1MIX_INPUT_4_SOURCE … #define WM5100_AIF3TX1MIX_INPUT_4_VOLUME … #define WM5100_AIF3TX2MIX_INPUT_1_SOURCE … #define WM5100_AIF3TX2MIX_INPUT_1_VOLUME … #define WM5100_AIF3TX2MIX_INPUT_2_SOURCE … #define WM5100_AIF3TX2MIX_INPUT_2_VOLUME … #define WM5100_AIF3TX2MIX_INPUT_3_SOURCE … #define WM5100_AIF3TX2MIX_INPUT_3_VOLUME … #define WM5100_AIF3TX2MIX_INPUT_4_SOURCE … #define WM5100_AIF3TX2MIX_INPUT_4_VOLUME … #define WM5100_EQ1MIX_INPUT_1_SOURCE … #define WM5100_EQ1MIX_INPUT_1_VOLUME … #define WM5100_EQ1MIX_INPUT_2_SOURCE … #define WM5100_EQ1MIX_INPUT_2_VOLUME … #define WM5100_EQ1MIX_INPUT_3_SOURCE … #define WM5100_EQ1MIX_INPUT_3_VOLUME … #define WM5100_EQ1MIX_INPUT_4_SOURCE … #define WM5100_EQ1MIX_INPUT_4_VOLUME … #define WM5100_EQ2MIX_INPUT_1_SOURCE … #define WM5100_EQ2MIX_INPUT_1_VOLUME … #define WM5100_EQ2MIX_INPUT_2_SOURCE … #define WM5100_EQ2MIX_INPUT_2_VOLUME … #define WM5100_EQ2MIX_INPUT_3_SOURCE … #define WM5100_EQ2MIX_INPUT_3_VOLUME … #define WM5100_EQ2MIX_INPUT_4_SOURCE … #define WM5100_EQ2MIX_INPUT_4_VOLUME … #define WM5100_EQ3MIX_INPUT_1_SOURCE … #define WM5100_EQ3MIX_INPUT_1_VOLUME … #define WM5100_EQ3MIX_INPUT_2_SOURCE … #define WM5100_EQ3MIX_INPUT_2_VOLUME … #define WM5100_EQ3MIX_INPUT_3_SOURCE … #define WM5100_EQ3MIX_INPUT_3_VOLUME … #define WM5100_EQ3MIX_INPUT_4_SOURCE … #define WM5100_EQ3MIX_INPUT_4_VOLUME … #define WM5100_EQ4MIX_INPUT_1_SOURCE … #define WM5100_EQ4MIX_INPUT_1_VOLUME … #define WM5100_EQ4MIX_INPUT_2_SOURCE … #define WM5100_EQ4MIX_INPUT_2_VOLUME … #define WM5100_EQ4MIX_INPUT_3_SOURCE … #define WM5100_EQ4MIX_INPUT_3_VOLUME … #define WM5100_EQ4MIX_INPUT_4_SOURCE … #define WM5100_EQ4MIX_INPUT_4_VOLUME … #define WM5100_DRC1LMIX_INPUT_1_SOURCE … #define WM5100_DRC1LMIX_INPUT_1_VOLUME … #define WM5100_DRC1LMIX_INPUT_2_SOURCE … #define WM5100_DRC1LMIX_INPUT_2_VOLUME … #define WM5100_DRC1LMIX_INPUT_3_SOURCE … #define WM5100_DRC1LMIX_INPUT_3_VOLUME … #define WM5100_DRC1LMIX_INPUT_4_SOURCE … #define WM5100_DRC1LMIX_INPUT_4_VOLUME … #define WM5100_DRC1RMIX_INPUT_1_SOURCE … #define WM5100_DRC1RMIX_INPUT_1_VOLUME … #define WM5100_DRC1RMIX_INPUT_2_SOURCE … #define WM5100_DRC1RMIX_INPUT_2_VOLUME … #define WM5100_DRC1RMIX_INPUT_3_SOURCE … #define WM5100_DRC1RMIX_INPUT_3_VOLUME … #define WM5100_DRC1RMIX_INPUT_4_SOURCE … #define WM5100_DRC1RMIX_INPUT_4_VOLUME … #define WM5100_HPLP1MIX_INPUT_1_SOURCE … #define WM5100_HPLP1MIX_INPUT_1_VOLUME … #define WM5100_HPLP1MIX_INPUT_2_SOURCE … #define WM5100_HPLP1MIX_INPUT_2_VOLUME … #define WM5100_HPLP1MIX_INPUT_3_SOURCE … #define WM5100_HPLP1MIX_INPUT_3_VOLUME … #define WM5100_HPLP1MIX_INPUT_4_SOURCE … #define WM5100_HPLP1MIX_INPUT_4_VOLUME … #define WM5100_HPLP2MIX_INPUT_1_SOURCE … #define WM5100_HPLP2MIX_INPUT_1_VOLUME … #define WM5100_HPLP2MIX_INPUT_2_SOURCE … #define WM5100_HPLP2MIX_INPUT_2_VOLUME … #define WM5100_HPLP2MIX_INPUT_3_SOURCE … #define WM5100_HPLP2MIX_INPUT_3_VOLUME … #define WM5100_HPLP2MIX_INPUT_4_SOURCE … #define WM5100_HPLP2MIX_INPUT_4_VOLUME … #define WM5100_HPLP3MIX_INPUT_1_SOURCE … #define WM5100_HPLP3MIX_INPUT_1_VOLUME … #define WM5100_HPLP3MIX_INPUT_2_SOURCE … #define WM5100_HPLP3MIX_INPUT_2_VOLUME … #define WM5100_HPLP3MIX_INPUT_3_SOURCE … #define WM5100_HPLP3MIX_INPUT_3_VOLUME … #define WM5100_HPLP3MIX_INPUT_4_SOURCE … #define WM5100_HPLP3MIX_INPUT_4_VOLUME … #define WM5100_HPLP4MIX_INPUT_1_SOURCE … #define WM5100_HPLP4MIX_INPUT_1_VOLUME … #define WM5100_HPLP4MIX_INPUT_2_SOURCE … #define WM5100_HPLP4MIX_INPUT_2_VOLUME … #define WM5100_HPLP4MIX_INPUT_3_SOURCE … #define WM5100_HPLP4MIX_INPUT_3_VOLUME … #define WM5100_HPLP4MIX_INPUT_4_SOURCE … #define WM5100_HPLP4MIX_INPUT_4_VOLUME … #define WM5100_DSP1LMIX_INPUT_1_SOURCE … #define WM5100_DSP1LMIX_INPUT_1_VOLUME … #define WM5100_DSP1LMIX_INPUT_2_SOURCE … #define WM5100_DSP1LMIX_INPUT_2_VOLUME … #define WM5100_DSP1LMIX_INPUT_3_SOURCE … #define WM5100_DSP1LMIX_INPUT_3_VOLUME … #define WM5100_DSP1LMIX_INPUT_4_SOURCE … #define WM5100_DSP1LMIX_INPUT_4_VOLUME … #define WM5100_DSP1RMIX_INPUT_1_SOURCE … #define WM5100_DSP1RMIX_INPUT_1_VOLUME … #define WM5100_DSP1RMIX_INPUT_2_SOURCE … #define WM5100_DSP1RMIX_INPUT_2_VOLUME … #define WM5100_DSP1RMIX_INPUT_3_SOURCE … #define WM5100_DSP1RMIX_INPUT_3_VOLUME … #define WM5100_DSP1RMIX_INPUT_4_SOURCE … #define WM5100_DSP1RMIX_INPUT_4_VOLUME … #define WM5100_DSP1AUX1MIX_INPUT_1_SOURCE … #define WM5100_DSP1AUX2MIX_INPUT_1_SOURCE … #define WM5100_DSP1AUX3MIX_INPUT_1_SOURCE … #define WM5100_DSP1AUX4MIX_INPUT_1_SOURCE … #define WM5100_DSP1AUX5MIX_INPUT_1_SOURCE … #define WM5100_DSP1AUX6MIX_INPUT_1_SOURCE … #define WM5100_DSP2LMIX_INPUT_1_SOURCE … #define WM5100_DSP2LMIX_INPUT_1_VOLUME … #define WM5100_DSP2LMIX_INPUT_2_SOURCE … #define WM5100_DSP2LMIX_INPUT_2_VOLUME … #define WM5100_DSP2LMIX_INPUT_3_SOURCE … #define WM5100_DSP2LMIX_INPUT_3_VOLUME … #define WM5100_DSP2LMIX_INPUT_4_SOURCE … #define WM5100_DSP2LMIX_INPUT_4_VOLUME … #define WM5100_DSP2RMIX_INPUT_1_SOURCE … #define WM5100_DSP2RMIX_INPUT_1_VOLUME … #define WM5100_DSP2RMIX_INPUT_2_SOURCE … #define WM5100_DSP2RMIX_INPUT_2_VOLUME … #define WM5100_DSP2RMIX_INPUT_3_SOURCE … #define WM5100_DSP2RMIX_INPUT_3_VOLUME … #define WM5100_DSP2RMIX_INPUT_4_SOURCE … #define WM5100_DSP2RMIX_INPUT_4_VOLUME … #define WM5100_DSP2AUX1MIX_INPUT_1_SOURCE … #define WM5100_DSP2AUX2MIX_INPUT_1_SOURCE … #define WM5100_DSP2AUX3MIX_INPUT_1_SOURCE … #define WM5100_DSP2AUX4MIX_INPUT_1_SOURCE … #define WM5100_DSP2AUX5MIX_INPUT_1_SOURCE … #define WM5100_DSP2AUX6MIX_INPUT_1_SOURCE … #define WM5100_DSP3LMIX_INPUT_1_SOURCE … #define WM5100_DSP3LMIX_INPUT_1_VOLUME … #define WM5100_DSP3LMIX_INPUT_2_SOURCE … #define WM5100_DSP3LMIX_INPUT_2_VOLUME … #define WM5100_DSP3LMIX_INPUT_3_SOURCE … #define WM5100_DSP3LMIX_INPUT_3_VOLUME … #define WM5100_DSP3LMIX_INPUT_4_SOURCE … #define WM5100_DSP3LMIX_INPUT_4_VOLUME … #define WM5100_DSP3RMIX_INPUT_1_SOURCE … #define WM5100_DSP3RMIX_INPUT_1_VOLUME … #define WM5100_DSP3RMIX_INPUT_2_SOURCE … #define WM5100_DSP3RMIX_INPUT_2_VOLUME … #define WM5100_DSP3RMIX_INPUT_3_SOURCE … #define WM5100_DSP3RMIX_INPUT_3_VOLUME … #define WM5100_DSP3RMIX_INPUT_4_SOURCE … #define WM5100_DSP3RMIX_INPUT_4_VOLUME … #define WM5100_DSP3AUX1MIX_INPUT_1_SOURCE … #define WM5100_DSP3AUX2MIX_INPUT_1_SOURCE … #define WM5100_DSP3AUX3MIX_INPUT_1_SOURCE … #define WM5100_DSP3AUX4MIX_INPUT_1_SOURCE … #define WM5100_DSP3AUX5MIX_INPUT_1_SOURCE … #define WM5100_DSP3AUX6MIX_INPUT_1_SOURCE … #define WM5100_ASRC1LMIX_INPUT_1_SOURCE … #define WM5100_ASRC1RMIX_INPUT_1_SOURCE … #define WM5100_ASRC2LMIX_INPUT_1_SOURCE … #define WM5100_ASRC2RMIX_INPUT_1_SOURCE … #define WM5100_ISRC1DEC1MIX_INPUT_1_SOURCE … #define WM5100_ISRC1DEC2MIX_INPUT_1_SOURCE … #define WM5100_ISRC1DEC3MIX_INPUT_1_SOURCE … #define WM5100_ISRC1DEC4MIX_INPUT_1_SOURCE … #define WM5100_ISRC1INT1MIX_INPUT_1_SOURCE … #define WM5100_ISRC1INT2MIX_INPUT_1_SOURCE … #define WM5100_ISRC1INT3MIX_INPUT_1_SOURCE … #define WM5100_ISRC1INT4MIX_INPUT_1_SOURCE … #define WM5100_ISRC2DEC1MIX_INPUT_1_SOURCE … #define WM5100_ISRC2DEC2MIX_INPUT_1_SOURCE … #define WM5100_ISRC2DEC3MIX_INPUT_1_SOURCE … #define WM5100_ISRC2DEC4MIX_INPUT_1_SOURCE … #define WM5100_ISRC2INT1MIX_INPUT_1_SOURCE … #define WM5100_ISRC2INT2MIX_INPUT_1_SOURCE … #define WM5100_ISRC2INT3MIX_INPUT_1_SOURCE … #define WM5100_ISRC2INT4MIX_INPUT_1_SOURCE … #define WM5100_GPIO_CTRL_1 … #define WM5100_GPIO_CTRL_2 … #define WM5100_GPIO_CTRL_3 … #define WM5100_GPIO_CTRL_4 … #define WM5100_GPIO_CTRL_5 … #define WM5100_GPIO_CTRL_6 … #define WM5100_MISC_PAD_CTRL_1 … #define WM5100_MISC_PAD_CTRL_2 … #define WM5100_MISC_PAD_CTRL_3 … #define WM5100_MISC_PAD_CTRL_4 … #define WM5100_MISC_PAD_CTRL_5 … #define WM5100_MISC_GPIO_1 … #define WM5100_INTERRUPT_STATUS_1 … #define WM5100_INTERRUPT_STATUS_2 … #define WM5100_INTERRUPT_STATUS_3 … #define WM5100_INTERRUPT_STATUS_4 … #define WM5100_INTERRUPT_RAW_STATUS_2 … #define WM5100_INTERRUPT_RAW_STATUS_3 … #define WM5100_INTERRUPT_RAW_STATUS_4 … #define WM5100_INTERRUPT_STATUS_1_MASK … #define WM5100_INTERRUPT_STATUS_2_MASK … #define WM5100_INTERRUPT_STATUS_3_MASK … #define WM5100_INTERRUPT_STATUS_4_MASK … #define WM5100_INTERRUPT_CONTROL … #define WM5100_IRQ_DEBOUNCE_1 … #define WM5100_IRQ_DEBOUNCE_2 … #define WM5100_FX_CTRL … #define WM5100_EQ1_1 … #define WM5100_EQ1_2 … #define WM5100_EQ1_3 … #define WM5100_EQ1_4 … #define WM5100_EQ1_5 … #define WM5100_EQ1_6 … #define WM5100_EQ1_7 … #define WM5100_EQ1_8 … #define WM5100_EQ1_9 … #define WM5100_EQ1_10 … #define WM5100_EQ1_11 … #define WM5100_EQ1_12 … #define WM5100_EQ1_13 … #define WM5100_EQ1_14 … #define WM5100_EQ1_15 … #define WM5100_EQ1_16 … #define WM5100_EQ1_17 … #define WM5100_EQ1_18 … #define WM5100_EQ1_19 … #define WM5100_EQ1_20 … #define WM5100_EQ2_1 … #define WM5100_EQ2_2 … #define WM5100_EQ2_3 … #define WM5100_EQ2_4 … #define WM5100_EQ2_5 … #define WM5100_EQ2_6 … #define WM5100_EQ2_7 … #define WM5100_EQ2_8 … #define WM5100_EQ2_9 … #define WM5100_EQ2_10 … #define WM5100_EQ2_11 … #define WM5100_EQ2_12 … #define WM5100_EQ2_13 … #define WM5100_EQ2_14 … #define WM5100_EQ2_15 … #define WM5100_EQ2_16 … #define WM5100_EQ2_17 … #define WM5100_EQ2_18 … #define WM5100_EQ2_19 … #define WM5100_EQ2_20 … #define WM5100_EQ3_1 … #define WM5100_EQ3_2 … #define WM5100_EQ3_3 … #define WM5100_EQ3_4 … #define WM5100_EQ3_5 … #define WM5100_EQ3_6 … #define WM5100_EQ3_7 … #define WM5100_EQ3_8 … #define WM5100_EQ3_9 … #define WM5100_EQ3_10 … #define WM5100_EQ3_11 … #define WM5100_EQ3_12 … #define WM5100_EQ3_13 … #define WM5100_EQ3_14 … #define WM5100_EQ3_15 … #define WM5100_EQ3_16 … #define WM5100_EQ3_17 … #define WM5100_EQ3_18 … #define WM5100_EQ3_19 … #define WM5100_EQ3_20 … #define WM5100_EQ4_1 … #define WM5100_EQ4_2 … #define WM5100_EQ4_3 … #define WM5100_EQ4_4 … #define WM5100_EQ4_5 … #define WM5100_EQ4_6 … #define WM5100_EQ4_7 … #define WM5100_EQ4_8 … #define WM5100_EQ4_9 … #define WM5100_EQ4_10 … #define WM5100_EQ4_11 … #define WM5100_EQ4_12 … #define WM5100_EQ4_13 … #define WM5100_EQ4_14 … #define WM5100_EQ4_15 … #define WM5100_EQ4_16 … #define WM5100_EQ4_17 … #define WM5100_EQ4_18 … #define WM5100_EQ4_19 … #define WM5100_EQ4_20 … #define WM5100_DRC1_CTRL1 … #define WM5100_DRC1_CTRL2 … #define WM5100_DRC1_CTRL3 … #define WM5100_DRC1_CTRL4 … #define WM5100_DRC1_CTRL5 … #define WM5100_HPLPF1_1 … #define WM5100_HPLPF1_2 … #define WM5100_HPLPF2_1 … #define WM5100_HPLPF2_2 … #define WM5100_HPLPF3_1 … #define WM5100_HPLPF3_2 … #define WM5100_HPLPF4_1 … #define WM5100_HPLPF4_2 … #define WM5100_DSP1_CONTROL_1 … #define WM5100_DSP1_CONTROL_2 … #define WM5100_DSP1_CONTROL_3 … #define WM5100_DSP1_CONTROL_4 … #define WM5100_DSP1_CONTROL_5 … #define WM5100_DSP1_CONTROL_6 … #define WM5100_DSP1_CONTROL_7 … #define WM5100_DSP1_CONTROL_8 … #define WM5100_DSP1_CONTROL_9 … #define WM5100_DSP1_CONTROL_10 … #define WM5100_DSP1_CONTROL_11 … #define WM5100_DSP1_CONTROL_12 … #define WM5100_DSP1_CONTROL_13 … #define WM5100_DSP1_CONTROL_14 … #define WM5100_DSP1_CONTROL_15 … #define WM5100_DSP1_CONTROL_16 … #define WM5100_DSP1_CONTROL_17 … #define WM5100_DSP1_CONTROL_18 … #define WM5100_DSP1_CONTROL_19 … #define WM5100_DSP1_CONTROL_20 … #define WM5100_DSP1_CONTROL_21 … #define WM5100_DSP1_CONTROL_22 … #define WM5100_DSP1_CONTROL_23 … #define WM5100_DSP1_CONTROL_24 … #define WM5100_DSP1_CONTROL_25 … #define WM5100_DSP1_CONTROL_26 … #define WM5100_DSP1_CONTROL_27 … #define WM5100_DSP1_CONTROL_28 … #define WM5100_DSP1_CONTROL_29 … #define WM5100_DSP1_CONTROL_30 … #define WM5100_DSP2_CONTROL_1 … #define WM5100_DSP2_CONTROL_2 … #define WM5100_DSP2_CONTROL_3 … #define WM5100_DSP2_CONTROL_4 … #define WM5100_DSP2_CONTROL_5 … #define WM5100_DSP2_CONTROL_6 … #define WM5100_DSP2_CONTROL_7 … #define WM5100_DSP2_CONTROL_8 … #define WM5100_DSP2_CONTROL_9 … #define WM5100_DSP2_CONTROL_10 … #define WM5100_DSP2_CONTROL_11 … #define WM5100_DSP2_CONTROL_12 … #define WM5100_DSP2_CONTROL_13 … #define WM5100_DSP2_CONTROL_14 … #define WM5100_DSP2_CONTROL_15 … #define WM5100_DSP2_CONTROL_16 … #define WM5100_DSP2_CONTROL_17 … #define WM5100_DSP2_CONTROL_18 … #define WM5100_DSP2_CONTROL_19 … #define WM5100_DSP2_CONTROL_20 … #define WM5100_DSP2_CONTROL_21 … #define WM5100_DSP2_CONTROL_22 … #define WM5100_DSP2_CONTROL_23 … #define WM5100_DSP2_CONTROL_24 … #define WM5100_DSP2_CONTROL_25 … #define WM5100_DSP2_CONTROL_26 … #define WM5100_DSP2_CONTROL_27 … #define WM5100_DSP2_CONTROL_28 … #define WM5100_DSP2_CONTROL_29 … #define WM5100_DSP2_CONTROL_30 … #define WM5100_DSP3_CONTROL_1 … #define WM5100_DSP3_CONTROL_2 … #define WM5100_DSP3_CONTROL_3 … #define WM5100_DSP3_CONTROL_4 … #define WM5100_DSP3_CONTROL_5 … #define WM5100_DSP3_CONTROL_6 … #define WM5100_DSP3_CONTROL_7 … #define WM5100_DSP3_CONTROL_8 … #define WM5100_DSP3_CONTROL_9 … #define WM5100_DSP3_CONTROL_10 … #define WM5100_DSP3_CONTROL_11 … #define WM5100_DSP3_CONTROL_12 … #define WM5100_DSP3_CONTROL_13 … #define WM5100_DSP3_CONTROL_14 … #define WM5100_DSP3_CONTROL_15 … #define WM5100_DSP3_CONTROL_16 … #define WM5100_DSP3_CONTROL_17 … #define WM5100_DSP3_CONTROL_18 … #define WM5100_DSP3_CONTROL_19 … #define WM5100_DSP3_CONTROL_20 … #define WM5100_DSP3_CONTROL_21 … #define WM5100_DSP3_CONTROL_22 … #define WM5100_DSP3_CONTROL_23 … #define WM5100_DSP3_CONTROL_24 … #define WM5100_DSP3_CONTROL_25 … #define WM5100_DSP3_CONTROL_26 … #define WM5100_DSP3_CONTROL_27 … #define WM5100_DSP3_CONTROL_28 … #define WM5100_DSP3_CONTROL_29 … #define WM5100_DSP3_CONTROL_30 … #define WM5100_DSP1_DM_0 … #define WM5100_DSP1_DM_1 … #define WM5100_DSP1_DM_2 … #define WM5100_DSP1_DM_3 … #define WM5100_DSP1_DM_508 … #define WM5100_DSP1_DM_509 … #define WM5100_DSP1_DM_510 … #define WM5100_DSP1_DM_511 … #define WM5100_DSP1_PM_0 … #define WM5100_DSP1_PM_1 … #define WM5100_DSP1_PM_2 … #define WM5100_DSP1_PM_3 … #define WM5100_DSP1_PM_4 … #define WM5100_DSP1_PM_5 … #define WM5100_DSP1_PM_1530 … #define WM5100_DSP1_PM_1531 … #define WM5100_DSP1_PM_1532 … #define WM5100_DSP1_PM_1533 … #define WM5100_DSP1_PM_1534 … #define WM5100_DSP1_PM_1535 … #define WM5100_DSP1_ZM_0 … #define WM5100_DSP1_ZM_1 … #define WM5100_DSP1_ZM_2 … #define WM5100_DSP1_ZM_3 … #define WM5100_DSP1_ZM_2044 … #define WM5100_DSP1_ZM_2045 … #define WM5100_DSP1_ZM_2046 … #define WM5100_DSP1_ZM_2047 … #define WM5100_DSP2_DM_0 … #define WM5100_DSP2_DM_1 … #define WM5100_DSP2_DM_2 … #define WM5100_DSP2_DM_3 … #define WM5100_DSP2_DM_508 … #define WM5100_DSP2_DM_509 … #define WM5100_DSP2_DM_510 … #define WM5100_DSP2_DM_511 … #define WM5100_DSP2_PM_0 … #define WM5100_DSP2_PM_1 … #define WM5100_DSP2_PM_2 … #define WM5100_DSP2_PM_3 … #define WM5100_DSP2_PM_4 … #define WM5100_DSP2_PM_5 … #define WM5100_DSP2_PM_1530 … #define WM5100_DSP2_PM_1531 … #define WM5100_DSP2_PM_1532 … #define WM5100_DSP2_PM_1533 … #define WM5100_DSP2_PM_1534 … #define WM5100_DSP2_PM_1535 … #define WM5100_DSP2_ZM_0 … #define WM5100_DSP2_ZM_1 … #define WM5100_DSP2_ZM_2 … #define WM5100_DSP2_ZM_3 … #define WM5100_DSP2_ZM_2044 … #define WM5100_DSP2_ZM_2045 … #define WM5100_DSP2_ZM_2046 … #define WM5100_DSP2_ZM_2047 … #define WM5100_DSP3_DM_0 … #define WM5100_DSP3_DM_1 … #define WM5100_DSP3_DM_2 … #define WM5100_DSP3_DM_3 … #define WM5100_DSP3_DM_508 … #define WM5100_DSP3_DM_509 … #define WM5100_DSP3_DM_510 … #define WM5100_DSP3_DM_511 … #define WM5100_DSP3_PM_0 … #define WM5100_DSP3_PM_1 … #define WM5100_DSP3_PM_2 … #define WM5100_DSP3_PM_3 … #define WM5100_DSP3_PM_4 … #define WM5100_DSP3_PM_5 … #define WM5100_DSP3_PM_1530 … #define WM5100_DSP3_PM_1531 … #define WM5100_DSP3_PM_1532 … #define WM5100_DSP3_PM_1533 … #define WM5100_DSP3_PM_1534 … #define WM5100_DSP3_PM_1535 … #define WM5100_DSP3_ZM_0 … #define WM5100_DSP3_ZM_1 … #define WM5100_DSP3_ZM_2 … #define WM5100_DSP3_ZM_3 … #define WM5100_DSP3_ZM_2044 … #define WM5100_DSP3_ZM_2045 … #define WM5100_DSP3_ZM_2046 … #define WM5100_DSP3_ZM_2047 … #define WM5100_REGISTER_COUNT … #define WM5100_MAX_REGISTER … /* * Field Definitions. */ /* * R0 (0x00) - software reset */ #define WM5100_SW_RST_DEV_ID1_MASK … #define WM5100_SW_RST_DEV_ID1_SHIFT … #define WM5100_SW_RST_DEV_ID1_WIDTH … /* * R1 (0x01) - Device Revision */ #define WM5100_DEVICE_REVISION_MASK … #define WM5100_DEVICE_REVISION_SHIFT … #define WM5100_DEVICE_REVISION_WIDTH … /* * R16 (0x10) - Ctrl IF 1 */ #define WM5100_AUTO_INC … #define WM5100_AUTO_INC_MASK … #define WM5100_AUTO_INC_SHIFT … #define WM5100_AUTO_INC_WIDTH … /* * R32 (0x20) - Tone Generator 1 */ #define WM5100_TONE_RATE_MASK … #define WM5100_TONE_RATE_SHIFT … #define WM5100_TONE_RATE_WIDTH … #define WM5100_TONE_OFFSET_MASK … #define WM5100_TONE_OFFSET_SHIFT … #define WM5100_TONE_OFFSET_WIDTH … #define WM5100_TONE2_ENA … #define WM5100_TONE2_ENA_MASK … #define WM5100_TONE2_ENA_SHIFT … #define WM5100_TONE2_ENA_WIDTH … #define WM5100_TONE1_ENA … #define WM5100_TONE1_ENA_MASK … #define WM5100_TONE1_ENA_SHIFT … #define WM5100_TONE1_ENA_WIDTH … /* * R48 (0x30) - PWM Drive 1 */ #define WM5100_PWM_RATE_MASK … #define WM5100_PWM_RATE_SHIFT … #define WM5100_PWM_RATE_WIDTH … #define WM5100_PWM_CLK_SEL_MASK … #define WM5100_PWM_CLK_SEL_SHIFT … #define WM5100_PWM_CLK_SEL_WIDTH … #define WM5100_PWM2_OVD … #define WM5100_PWM2_OVD_MASK … #define WM5100_PWM2_OVD_SHIFT … #define WM5100_PWM2_OVD_WIDTH … #define WM5100_PWM1_OVD … #define WM5100_PWM1_OVD_MASK … #define WM5100_PWM1_OVD_SHIFT … #define WM5100_PWM1_OVD_WIDTH … #define WM5100_PWM2_ENA … #define WM5100_PWM2_ENA_MASK … #define WM5100_PWM2_ENA_SHIFT … #define WM5100_PWM2_ENA_WIDTH … #define WM5100_PWM1_ENA … #define WM5100_PWM1_ENA_MASK … #define WM5100_PWM1_ENA_SHIFT … #define WM5100_PWM1_ENA_WIDTH … /* * R49 (0x31) - PWM Drive 2 */ #define WM5100_PWM1_LVL_MASK … #define WM5100_PWM1_LVL_SHIFT … #define WM5100_PWM1_LVL_WIDTH … /* * R50 (0x32) - PWM Drive 3 */ #define WM5100_PWM2_LVL_MASK … #define WM5100_PWM2_LVL_SHIFT … #define WM5100_PWM2_LVL_WIDTH … /* * R256 (0x100) - Clocking 1 */ #define WM5100_CLK_32K_SRC_MASK … #define WM5100_CLK_32K_SRC_SHIFT … #define WM5100_CLK_32K_SRC_WIDTH … /* * R257 (0x101) - Clocking 3 */ #define WM5100_SYSCLK_FREQ_MASK … #define WM5100_SYSCLK_FREQ_SHIFT … #define WM5100_SYSCLK_FREQ_WIDTH … #define WM5100_SYSCLK_ENA … #define WM5100_SYSCLK_ENA_MASK … #define WM5100_SYSCLK_ENA_SHIFT … #define WM5100_SYSCLK_ENA_WIDTH … #define WM5100_SYSCLK_SRC_MASK … #define WM5100_SYSCLK_SRC_SHIFT … #define WM5100_SYSCLK_SRC_WIDTH … /* * R258 (0x102) - Clocking 4 */ #define WM5100_SAMPLE_RATE_1_MASK … #define WM5100_SAMPLE_RATE_1_SHIFT … #define WM5100_SAMPLE_RATE_1_WIDTH … /* * R259 (0x103) - Clocking 5 */ #define WM5100_SAMPLE_RATE_2_MASK … #define WM5100_SAMPLE_RATE_2_SHIFT … #define WM5100_SAMPLE_RATE_2_WIDTH … /* * R260 (0x104) - Clocking 6 */ #define WM5100_SAMPLE_RATE_3_MASK … #define WM5100_SAMPLE_RATE_3_SHIFT … #define WM5100_SAMPLE_RATE_3_WIDTH … /* * R263 (0x107) - Clocking 7 */ #define WM5100_ASYNC_CLK_FREQ_MASK … #define WM5100_ASYNC_CLK_FREQ_SHIFT … #define WM5100_ASYNC_CLK_FREQ_WIDTH … #define WM5100_ASYNC_CLK_ENA … #define WM5100_ASYNC_CLK_ENA_MASK … #define WM5100_ASYNC_CLK_ENA_SHIFT … #define WM5100_ASYNC_CLK_ENA_WIDTH … #define WM5100_ASYNC_CLK_SRC_MASK … #define WM5100_ASYNC_CLK_SRC_SHIFT … #define WM5100_ASYNC_CLK_SRC_WIDTH … /* * R264 (0x108) - Clocking 8 */ #define WM5100_ASYNC_SAMPLE_RATE_MASK … #define WM5100_ASYNC_SAMPLE_RATE_SHIFT … #define WM5100_ASYNC_SAMPLE_RATE_WIDTH … /* * R288 (0x120) - ASRC_ENABLE */ #define WM5100_ASRC2L_ENA … #define WM5100_ASRC2L_ENA_MASK … #define WM5100_ASRC2L_ENA_SHIFT … #define WM5100_ASRC2L_ENA_WIDTH … #define WM5100_ASRC2R_ENA … #define WM5100_ASRC2R_ENA_MASK … #define WM5100_ASRC2R_ENA_SHIFT … #define WM5100_ASRC2R_ENA_WIDTH … #define WM5100_ASRC1L_ENA … #define WM5100_ASRC1L_ENA_MASK … #define WM5100_ASRC1L_ENA_SHIFT … #define WM5100_ASRC1L_ENA_WIDTH … #define WM5100_ASRC1R_ENA … #define WM5100_ASRC1R_ENA_MASK … #define WM5100_ASRC1R_ENA_SHIFT … #define WM5100_ASRC1R_ENA_WIDTH … /* * R289 (0x121) - ASRC_STATUS */ #define WM5100_ASRC2L_ENA_STS … #define WM5100_ASRC2L_ENA_STS_MASK … #define WM5100_ASRC2L_ENA_STS_SHIFT … #define WM5100_ASRC2L_ENA_STS_WIDTH … #define WM5100_ASRC2R_ENA_STS … #define WM5100_ASRC2R_ENA_STS_MASK … #define WM5100_ASRC2R_ENA_STS_SHIFT … #define WM5100_ASRC2R_ENA_STS_WIDTH … #define WM5100_ASRC1L_ENA_STS … #define WM5100_ASRC1L_ENA_STS_MASK … #define WM5100_ASRC1L_ENA_STS_SHIFT … #define WM5100_ASRC1L_ENA_STS_WIDTH … #define WM5100_ASRC1R_ENA_STS … #define WM5100_ASRC1R_ENA_STS_MASK … #define WM5100_ASRC1R_ENA_STS_SHIFT … #define WM5100_ASRC1R_ENA_STS_WIDTH … /* * R290 (0x122) - ASRC_RATE1 */ #define WM5100_ASRC_RATE1_MASK … #define WM5100_ASRC_RATE1_SHIFT … #define WM5100_ASRC_RATE1_WIDTH … /* * R321 (0x141) - ISRC 1 CTRL 1 */ #define WM5100_ISRC1_DFS_ENA … #define WM5100_ISRC1_DFS_ENA_MASK … #define WM5100_ISRC1_DFS_ENA_SHIFT … #define WM5100_ISRC1_DFS_ENA_WIDTH … #define WM5100_ISRC1_CLK_SEL_MASK … #define WM5100_ISRC1_CLK_SEL_SHIFT … #define WM5100_ISRC1_CLK_SEL_WIDTH … #define WM5100_ISRC1_FSH_MASK … #define WM5100_ISRC1_FSH_SHIFT … #define WM5100_ISRC1_FSH_WIDTH … #define WM5100_ISRC1_FSL_MASK … #define WM5100_ISRC1_FSL_SHIFT … #define WM5100_ISRC1_FSL_WIDTH … /* * R322 (0x142) - ISRC 1 CTRL 2 */ #define WM5100_ISRC1_INT1_ENA … #define WM5100_ISRC1_INT1_ENA_MASK … #define WM5100_ISRC1_INT1_ENA_SHIFT … #define WM5100_ISRC1_INT1_ENA_WIDTH … #define WM5100_ISRC1_INT2_ENA … #define WM5100_ISRC1_INT2_ENA_MASK … #define WM5100_ISRC1_INT2_ENA_SHIFT … #define WM5100_ISRC1_INT2_ENA_WIDTH … #define WM5100_ISRC1_INT3_ENA … #define WM5100_ISRC1_INT3_ENA_MASK … #define WM5100_ISRC1_INT3_ENA_SHIFT … #define WM5100_ISRC1_INT3_ENA_WIDTH … #define WM5100_ISRC1_INT4_ENA … #define WM5100_ISRC1_INT4_ENA_MASK … #define WM5100_ISRC1_INT4_ENA_SHIFT … #define WM5100_ISRC1_INT4_ENA_WIDTH … #define WM5100_ISRC1_DEC1_ENA … #define WM5100_ISRC1_DEC1_ENA_MASK … #define WM5100_ISRC1_DEC1_ENA_SHIFT … #define WM5100_ISRC1_DEC1_ENA_WIDTH … #define WM5100_ISRC1_DEC2_ENA … #define WM5100_ISRC1_DEC2_ENA_MASK … #define WM5100_ISRC1_DEC2_ENA_SHIFT … #define WM5100_ISRC1_DEC2_ENA_WIDTH … #define WM5100_ISRC1_DEC3_ENA … #define WM5100_ISRC1_DEC3_ENA_MASK … #define WM5100_ISRC1_DEC3_ENA_SHIFT … #define WM5100_ISRC1_DEC3_ENA_WIDTH … #define WM5100_ISRC1_DEC4_ENA … #define WM5100_ISRC1_DEC4_ENA_MASK … #define WM5100_ISRC1_DEC4_ENA_SHIFT … #define WM5100_ISRC1_DEC4_ENA_WIDTH … #define WM5100_ISRC1_NOTCH_ENA … #define WM5100_ISRC1_NOTCH_ENA_MASK … #define WM5100_ISRC1_NOTCH_ENA_SHIFT … #define WM5100_ISRC1_NOTCH_ENA_WIDTH … /* * R323 (0x143) - ISRC 2 CTRL1 */ #define WM5100_ISRC2_DFS_ENA … #define WM5100_ISRC2_DFS_ENA_MASK … #define WM5100_ISRC2_DFS_ENA_SHIFT … #define WM5100_ISRC2_DFS_ENA_WIDTH … #define WM5100_ISRC2_CLK_SEL_MASK … #define WM5100_ISRC2_CLK_SEL_SHIFT … #define WM5100_ISRC2_CLK_SEL_WIDTH … #define WM5100_ISRC2_FSH_MASK … #define WM5100_ISRC2_FSH_SHIFT … #define WM5100_ISRC2_FSH_WIDTH … #define WM5100_ISRC2_FSL_MASK … #define WM5100_ISRC2_FSL_SHIFT … #define WM5100_ISRC2_FSL_WIDTH … /* * R324 (0x144) - ISRC 2 CTRL 2 */ #define WM5100_ISRC2_INT1_ENA … #define WM5100_ISRC2_INT1_ENA_MASK … #define WM5100_ISRC2_INT1_ENA_SHIFT … #define WM5100_ISRC2_INT1_ENA_WIDTH … #define WM5100_ISRC2_INT2_ENA … #define WM5100_ISRC2_INT2_ENA_MASK … #define WM5100_ISRC2_INT2_ENA_SHIFT … #define WM5100_ISRC2_INT2_ENA_WIDTH … #define WM5100_ISRC2_INT3_ENA … #define WM5100_ISRC2_INT3_ENA_MASK … #define WM5100_ISRC2_INT3_ENA_SHIFT … #define WM5100_ISRC2_INT3_ENA_WIDTH … #define WM5100_ISRC2_INT4_ENA … #define WM5100_ISRC2_INT4_ENA_MASK … #define WM5100_ISRC2_INT4_ENA_SHIFT … #define WM5100_ISRC2_INT4_ENA_WIDTH … #define WM5100_ISRC2_DEC1_ENA … #define WM5100_ISRC2_DEC1_ENA_MASK … #define WM5100_ISRC2_DEC1_ENA_SHIFT … #define WM5100_ISRC2_DEC1_ENA_WIDTH … #define WM5100_ISRC2_DEC2_ENA … #define WM5100_ISRC2_DEC2_ENA_MASK … #define WM5100_ISRC2_DEC2_ENA_SHIFT … #define WM5100_ISRC2_DEC2_ENA_WIDTH … #define WM5100_ISRC2_DEC3_ENA … #define WM5100_ISRC2_DEC3_ENA_MASK … #define WM5100_ISRC2_DEC3_ENA_SHIFT … #define WM5100_ISRC2_DEC3_ENA_WIDTH … #define WM5100_ISRC2_DEC4_ENA … #define WM5100_ISRC2_DEC4_ENA_MASK … #define WM5100_ISRC2_DEC4_ENA_SHIFT … #define WM5100_ISRC2_DEC4_ENA_WIDTH … #define WM5100_ISRC2_NOTCH_ENA … #define WM5100_ISRC2_NOTCH_ENA_MASK … #define WM5100_ISRC2_NOTCH_ENA_SHIFT … #define WM5100_ISRC2_NOTCH_ENA_WIDTH … /* * R386 (0x182) - FLL1 Control 1 */ #define WM5100_FLL1_ENA … #define WM5100_FLL1_ENA_MASK … #define WM5100_FLL1_ENA_SHIFT … #define WM5100_FLL1_ENA_WIDTH … /* * R387 (0x183) - FLL1 Control 2 */ #define WM5100_FLL1_OUTDIV_MASK … #define WM5100_FLL1_OUTDIV_SHIFT … #define WM5100_FLL1_OUTDIV_WIDTH … #define WM5100_FLL1_FRATIO_MASK … #define WM5100_FLL1_FRATIO_SHIFT … #define WM5100_FLL1_FRATIO_WIDTH … /* * R388 (0x184) - FLL1 Control 3 */ #define WM5100_FLL1_THETA_MASK … #define WM5100_FLL1_THETA_SHIFT … #define WM5100_FLL1_THETA_WIDTH … /* * R390 (0x186) - FLL1 Control 5 */ #define WM5100_FLL1_N_MASK … #define WM5100_FLL1_N_SHIFT … #define WM5100_FLL1_N_WIDTH … /* * R391 (0x187) - FLL1 Control 6 */ #define WM5100_FLL1_REFCLK_DIV_MASK … #define WM5100_FLL1_REFCLK_DIV_SHIFT … #define WM5100_FLL1_REFCLK_DIV_WIDTH … #define WM5100_FLL1_REFCLK_SRC_MASK … #define WM5100_FLL1_REFCLK_SRC_SHIFT … #define WM5100_FLL1_REFCLK_SRC_WIDTH … /* * R392 (0x188) - FLL1 EFS 1 */ #define WM5100_FLL1_LAMBDA_MASK … #define WM5100_FLL1_LAMBDA_SHIFT … #define WM5100_FLL1_LAMBDA_WIDTH … /* * R418 (0x1A2) - FLL2 Control 1 */ #define WM5100_FLL2_ENA … #define WM5100_FLL2_ENA_MASK … #define WM5100_FLL2_ENA_SHIFT … #define WM5100_FLL2_ENA_WIDTH … /* * R419 (0x1A3) - FLL2 Control 2 */ #define WM5100_FLL2_OUTDIV_MASK … #define WM5100_FLL2_OUTDIV_SHIFT … #define WM5100_FLL2_OUTDIV_WIDTH … #define WM5100_FLL2_FRATIO_MASK … #define WM5100_FLL2_FRATIO_SHIFT … #define WM5100_FLL2_FRATIO_WIDTH … /* * R420 (0x1A4) - FLL2 Control 3 */ #define WM5100_FLL2_THETA_MASK … #define WM5100_FLL2_THETA_SHIFT … #define WM5100_FLL2_THETA_WIDTH … /* * R422 (0x1A6) - FLL2 Control 5 */ #define WM5100_FLL2_N_MASK … #define WM5100_FLL2_N_SHIFT … #define WM5100_FLL2_N_WIDTH … /* * R423 (0x1A7) - FLL2 Control 6 */ #define WM5100_FLL2_REFCLK_DIV_MASK … #define WM5100_FLL2_REFCLK_DIV_SHIFT … #define WM5100_FLL2_REFCLK_DIV_WIDTH … #define WM5100_FLL2_REFCLK_SRC_MASK … #define WM5100_FLL2_REFCLK_SRC_SHIFT … #define WM5100_FLL2_REFCLK_SRC_WIDTH … /* * R424 (0x1A8) - FLL2 EFS 1 */ #define WM5100_FLL2_LAMBDA_MASK … #define WM5100_FLL2_LAMBDA_SHIFT … #define WM5100_FLL2_LAMBDA_WIDTH … /* * R512 (0x200) - Mic Charge Pump 1 */ #define WM5100_CP2_BYPASS … #define WM5100_CP2_BYPASS_MASK … #define WM5100_CP2_BYPASS_SHIFT … #define WM5100_CP2_BYPASS_WIDTH … #define WM5100_CP2_ENA … #define WM5100_CP2_ENA_MASK … #define WM5100_CP2_ENA_SHIFT … #define WM5100_CP2_ENA_WIDTH … /* * R513 (0x201) - Mic Charge Pump 2 */ #define WM5100_LDO2_VSEL_MASK … #define WM5100_LDO2_VSEL_SHIFT … #define WM5100_LDO2_VSEL_WIDTH … /* * R514 (0x202) - HP Charge Pump 1 */ #define WM5100_CP1_ENA … #define WM5100_CP1_ENA_MASK … #define WM5100_CP1_ENA_SHIFT … #define WM5100_CP1_ENA_WIDTH … /* * R529 (0x211) - LDO1 Control */ #define WM5100_LDO1_BYPASS … #define WM5100_LDO1_BYPASS_MASK … #define WM5100_LDO1_BYPASS_SHIFT … #define WM5100_LDO1_BYPASS_WIDTH … /* * R533 (0x215) - Mic Bias Ctrl 1 */ #define WM5100_MICB1_DISCH … #define WM5100_MICB1_DISCH_MASK … #define WM5100_MICB1_DISCH_SHIFT … #define WM5100_MICB1_DISCH_WIDTH … #define WM5100_MICB1_RATE … #define WM5100_MICB1_RATE_MASK … #define WM5100_MICB1_RATE_SHIFT … #define WM5100_MICB1_RATE_WIDTH … #define WM5100_MICB1_LVL_MASK … #define WM5100_MICB1_LVL_SHIFT … #define WM5100_MICB1_LVL_WIDTH … #define WM5100_MICB1_BYPASS … #define WM5100_MICB1_BYPASS_MASK … #define WM5100_MICB1_BYPASS_SHIFT … #define WM5100_MICB1_BYPASS_WIDTH … #define WM5100_MICB1_ENA … #define WM5100_MICB1_ENA_MASK … #define WM5100_MICB1_ENA_SHIFT … #define WM5100_MICB1_ENA_WIDTH … /* * R534 (0x216) - Mic Bias Ctrl 2 */ #define WM5100_MICB2_DISCH … #define WM5100_MICB2_DISCH_MASK … #define WM5100_MICB2_DISCH_SHIFT … #define WM5100_MICB2_DISCH_WIDTH … #define WM5100_MICB2_RATE … #define WM5100_MICB2_RATE_MASK … #define WM5100_MICB2_RATE_SHIFT … #define WM5100_MICB2_RATE_WIDTH … #define WM5100_MICB2_LVL_MASK … #define WM5100_MICB2_LVL_SHIFT … #define WM5100_MICB2_LVL_WIDTH … #define WM5100_MICB2_BYPASS … #define WM5100_MICB2_BYPASS_MASK … #define WM5100_MICB2_BYPASS_SHIFT … #define WM5100_MICB2_BYPASS_WIDTH … #define WM5100_MICB2_ENA … #define WM5100_MICB2_ENA_MASK … #define WM5100_MICB2_ENA_SHIFT … #define WM5100_MICB2_ENA_WIDTH … /* * R535 (0x217) - Mic Bias Ctrl 3 */ #define WM5100_MICB3_DISCH … #define WM5100_MICB3_DISCH_MASK … #define WM5100_MICB3_DISCH_SHIFT … #define WM5100_MICB3_DISCH_WIDTH … #define WM5100_MICB3_RATE … #define WM5100_MICB3_RATE_MASK … #define WM5100_MICB3_RATE_SHIFT … #define WM5100_MICB3_RATE_WIDTH … #define WM5100_MICB3_LVL_MASK … #define WM5100_MICB3_LVL_SHIFT … #define WM5100_MICB3_LVL_WIDTH … #define WM5100_MICB3_BYPASS … #define WM5100_MICB3_BYPASS_MASK … #define WM5100_MICB3_BYPASS_SHIFT … #define WM5100_MICB3_BYPASS_WIDTH … #define WM5100_MICB3_ENA … #define WM5100_MICB3_ENA_MASK … #define WM5100_MICB3_ENA_SHIFT … #define WM5100_MICB3_ENA_WIDTH … /* * R640 (0x280) - Accessory Detect Mode 1 */ #define WM5100_ACCDET_BIAS_SRC_MASK … #define WM5100_ACCDET_BIAS_SRC_SHIFT … #define WM5100_ACCDET_BIAS_SRC_WIDTH … #define WM5100_ACCDET_SRC … #define WM5100_ACCDET_SRC_MASK … #define WM5100_ACCDET_SRC_SHIFT … #define WM5100_ACCDET_SRC_WIDTH … #define WM5100_ACCDET_MODE_MASK … #define WM5100_ACCDET_MODE_SHIFT … #define WM5100_ACCDET_MODE_WIDTH … /* * R648 (0x288) - Headphone Detect 1 */ #define WM5100_HP_HOLDTIME_MASK … #define WM5100_HP_HOLDTIME_SHIFT … #define WM5100_HP_HOLDTIME_WIDTH … #define WM5100_HP_CLK_DIV_MASK … #define WM5100_HP_CLK_DIV_SHIFT … #define WM5100_HP_CLK_DIV_WIDTH … #define WM5100_HP_STEP_SIZE … #define WM5100_HP_STEP_SIZE_MASK … #define WM5100_HP_STEP_SIZE_SHIFT … #define WM5100_HP_STEP_SIZE_WIDTH … #define WM5100_HP_POLL … #define WM5100_HP_POLL_MASK … #define WM5100_HP_POLL_SHIFT … #define WM5100_HP_POLL_WIDTH … /* * R649 (0x289) - Headphone Detect 2 */ #define WM5100_HP_DONE … #define WM5100_HP_DONE_MASK … #define WM5100_HP_DONE_SHIFT … #define WM5100_HP_DONE_WIDTH … #define WM5100_HP_LVL_MASK … #define WM5100_HP_LVL_SHIFT … #define WM5100_HP_LVL_WIDTH … /* * R656 (0x290) - Mic Detect 1 */ #define WM5100_ACCDET_BIAS_STARTTIME_MASK … #define WM5100_ACCDET_BIAS_STARTTIME_SHIFT … #define WM5100_ACCDET_BIAS_STARTTIME_WIDTH … #define WM5100_ACCDET_RATE_MASK … #define WM5100_ACCDET_RATE_SHIFT … #define WM5100_ACCDET_RATE_WIDTH … #define WM5100_ACCDET_DBTIME … #define WM5100_ACCDET_DBTIME_MASK … #define WM5100_ACCDET_DBTIME_SHIFT … #define WM5100_ACCDET_DBTIME_WIDTH … #define WM5100_ACCDET_ENA … #define WM5100_ACCDET_ENA_MASK … #define WM5100_ACCDET_ENA_SHIFT … #define WM5100_ACCDET_ENA_WIDTH … /* * R657 (0x291) - Mic Detect 2 */ #define WM5100_ACCDET_LVL_SEL_MASK … #define WM5100_ACCDET_LVL_SEL_SHIFT … #define WM5100_ACCDET_LVL_SEL_WIDTH … /* * R658 (0x292) - Mic Detect 3 */ #define WM5100_ACCDET_LVL_MASK … #define WM5100_ACCDET_LVL_SHIFT … #define WM5100_ACCDET_LVL_WIDTH … #define WM5100_ACCDET_VALID … #define WM5100_ACCDET_VALID_MASK … #define WM5100_ACCDET_VALID_SHIFT … #define WM5100_ACCDET_VALID_WIDTH … #define WM5100_ACCDET_STS … #define WM5100_ACCDET_STS_MASK … #define WM5100_ACCDET_STS_SHIFT … #define WM5100_ACCDET_STS_WIDTH … /* * R699 (0x2BB) - Misc Control */ #define WM5100_HPCOM_SRC … #define WM5100_HPCOM_SRC_SHIFT … /* * R769 (0x301) - Input Enables */ #define WM5100_IN4L_ENA … #define WM5100_IN4L_ENA_MASK … #define WM5100_IN4L_ENA_SHIFT … #define WM5100_IN4L_ENA_WIDTH … #define WM5100_IN4R_ENA … #define WM5100_IN4R_ENA_MASK … #define WM5100_IN4R_ENA_SHIFT … #define WM5100_IN4R_ENA_WIDTH … #define WM5100_IN3L_ENA … #define WM5100_IN3L_ENA_MASK … #define WM5100_IN3L_ENA_SHIFT … #define WM5100_IN3L_ENA_WIDTH … #define WM5100_IN3R_ENA … #define WM5100_IN3R_ENA_MASK … #define WM5100_IN3R_ENA_SHIFT … #define WM5100_IN3R_ENA_WIDTH … #define WM5100_IN2L_ENA … #define WM5100_IN2L_ENA_MASK … #define WM5100_IN2L_ENA_SHIFT … #define WM5100_IN2L_ENA_WIDTH … #define WM5100_IN2R_ENA … #define WM5100_IN2R_ENA_MASK … #define WM5100_IN2R_ENA_SHIFT … #define WM5100_IN2R_ENA_WIDTH … #define WM5100_IN1L_ENA … #define WM5100_IN1L_ENA_MASK … #define WM5100_IN1L_ENA_SHIFT … #define WM5100_IN1L_ENA_WIDTH … #define WM5100_IN1R_ENA … #define WM5100_IN1R_ENA_MASK … #define WM5100_IN1R_ENA_SHIFT … #define WM5100_IN1R_ENA_WIDTH … /* * R770 (0x302) - Input Enables Status */ #define WM5100_IN4L_ENA_STS … #define WM5100_IN4L_ENA_STS_MASK … #define WM5100_IN4L_ENA_STS_SHIFT … #define WM5100_IN4L_ENA_STS_WIDTH … #define WM5100_IN4R_ENA_STS … #define WM5100_IN4R_ENA_STS_MASK … #define WM5100_IN4R_ENA_STS_SHIFT … #define WM5100_IN4R_ENA_STS_WIDTH … #define WM5100_IN3L_ENA_STS … #define WM5100_IN3L_ENA_STS_MASK … #define WM5100_IN3L_ENA_STS_SHIFT … #define WM5100_IN3L_ENA_STS_WIDTH … #define WM5100_IN3R_ENA_STS … #define WM5100_IN3R_ENA_STS_MASK … #define WM5100_IN3R_ENA_STS_SHIFT … #define WM5100_IN3R_ENA_STS_WIDTH … #define WM5100_IN2L_ENA_STS … #define WM5100_IN2L_ENA_STS_MASK … #define WM5100_IN2L_ENA_STS_SHIFT … #define WM5100_IN2L_ENA_STS_WIDTH … #define WM5100_IN2R_ENA_STS … #define WM5100_IN2R_ENA_STS_MASK … #define WM5100_IN2R_ENA_STS_SHIFT … #define WM5100_IN2R_ENA_STS_WIDTH … #define WM5100_IN1L_ENA_STS … #define WM5100_IN1L_ENA_STS_MASK … #define WM5100_IN1L_ENA_STS_SHIFT … #define WM5100_IN1L_ENA_STS_WIDTH … #define WM5100_IN1R_ENA_STS … #define WM5100_IN1R_ENA_STS_MASK … #define WM5100_IN1R_ENA_STS_SHIFT … #define WM5100_IN1R_ENA_STS_WIDTH … /* * R784 (0x310) - IN1L Control */ #define WM5100_IN_RATE_MASK … #define WM5100_IN_RATE_SHIFT … #define WM5100_IN_RATE_WIDTH … #define WM5100_IN1_OSR … #define WM5100_IN1_OSR_MASK … #define WM5100_IN1_OSR_SHIFT … #define WM5100_IN1_OSR_WIDTH … #define WM5100_IN1_DMIC_SUP_MASK … #define WM5100_IN1_DMIC_SUP_SHIFT … #define WM5100_IN1_DMIC_SUP_WIDTH … #define WM5100_IN1_MODE_MASK … #define WM5100_IN1_MODE_SHIFT … #define WM5100_IN1_MODE_WIDTH … #define WM5100_IN1L_PGA_VOL_MASK … #define WM5100_IN1L_PGA_VOL_SHIFT … #define WM5100_IN1L_PGA_VOL_WIDTH … /* * R785 (0x311) - IN1R Control */ #define WM5100_IN1R_PGA_VOL_MASK … #define WM5100_IN1R_PGA_VOL_SHIFT … #define WM5100_IN1R_PGA_VOL_WIDTH … /* * R786 (0x312) - IN2L Control */ #define WM5100_IN2_OSR … #define WM5100_IN2_OSR_MASK … #define WM5100_IN2_OSR_SHIFT … #define WM5100_IN2_OSR_WIDTH … #define WM5100_IN2_DMIC_SUP_MASK … #define WM5100_IN2_DMIC_SUP_SHIFT … #define WM5100_IN2_DMIC_SUP_WIDTH … #define WM5100_IN2_MODE_MASK … #define WM5100_IN2_MODE_SHIFT … #define WM5100_IN2_MODE_WIDTH … #define WM5100_IN2L_PGA_VOL_MASK … #define WM5100_IN2L_PGA_VOL_SHIFT … #define WM5100_IN2L_PGA_VOL_WIDTH … /* * R787 (0x313) - IN2R Control */ #define WM5100_IN2R_PGA_VOL_MASK … #define WM5100_IN2R_PGA_VOL_SHIFT … #define WM5100_IN2R_PGA_VOL_WIDTH … /* * R788 (0x314) - IN3L Control */ #define WM5100_IN3_OSR … #define WM5100_IN3_OSR_MASK … #define WM5100_IN3_OSR_SHIFT … #define WM5100_IN3_OSR_WIDTH … #define WM5100_IN3_DMIC_SUP_MASK … #define WM5100_IN3_DMIC_SUP_SHIFT … #define WM5100_IN3_DMIC_SUP_WIDTH … #define WM5100_IN3_MODE_MASK … #define WM5100_IN3_MODE_SHIFT … #define WM5100_IN3_MODE_WIDTH … #define WM5100_IN3L_PGA_VOL_MASK … #define WM5100_IN3L_PGA_VOL_SHIFT … #define WM5100_IN3L_PGA_VOL_WIDTH … /* * R789 (0x315) - IN3R Control */ #define WM5100_IN3R_PGA_VOL_MASK … #define WM5100_IN3R_PGA_VOL_SHIFT … #define WM5100_IN3R_PGA_VOL_WIDTH … /* * R790 (0x316) - IN4L Control */ #define WM5100_IN4_OSR … #define WM5100_IN4_OSR_MASK … #define WM5100_IN4_OSR_SHIFT … #define WM5100_IN4_OSR_WIDTH … #define WM5100_IN4_DMIC_SUP_MASK … #define WM5100_IN4_DMIC_SUP_SHIFT … #define WM5100_IN4_DMIC_SUP_WIDTH … #define WM5100_IN4_MODE_MASK … #define WM5100_IN4_MODE_SHIFT … #define WM5100_IN4_MODE_WIDTH … #define WM5100_IN4L_PGA_VOL_MASK … #define WM5100_IN4L_PGA_VOL_SHIFT … #define WM5100_IN4L_PGA_VOL_WIDTH … /* * R791 (0x317) - IN4R Control */ #define WM5100_IN4R_PGA_VOL_MASK … #define WM5100_IN4R_PGA_VOL_SHIFT … #define WM5100_IN4R_PGA_VOL_WIDTH … /* * R792 (0x318) - RXANC_SRC */ #define WM5100_IN_RXANC_SEL_MASK … #define WM5100_IN_RXANC_SEL_SHIFT … #define WM5100_IN_RXANC_SEL_WIDTH … /* * R793 (0x319) - Input Volume Ramp */ #define WM5100_IN_VD_RAMP_MASK … #define WM5100_IN_VD_RAMP_SHIFT … #define WM5100_IN_VD_RAMP_WIDTH … #define WM5100_IN_VI_RAMP_MASK … #define WM5100_IN_VI_RAMP_SHIFT … #define WM5100_IN_VI_RAMP_WIDTH … /* * R800 (0x320) - ADC Digital Volume 1L */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN1L_MUTE … #define WM5100_IN1L_MUTE_MASK … #define WM5100_IN1L_MUTE_SHIFT … #define WM5100_IN1L_MUTE_WIDTH … #define WM5100_IN1L_VOL_MASK … #define WM5100_IN1L_VOL_SHIFT … #define WM5100_IN1L_VOL_WIDTH … /* * R801 (0x321) - ADC Digital Volume 1R */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN1R_MUTE … #define WM5100_IN1R_MUTE_MASK … #define WM5100_IN1R_MUTE_SHIFT … #define WM5100_IN1R_MUTE_WIDTH … #define WM5100_IN1R_VOL_MASK … #define WM5100_IN1R_VOL_SHIFT … #define WM5100_IN1R_VOL_WIDTH … /* * R802 (0x322) - ADC Digital Volume 2L */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN2L_MUTE … #define WM5100_IN2L_MUTE_MASK … #define WM5100_IN2L_MUTE_SHIFT … #define WM5100_IN2L_MUTE_WIDTH … #define WM5100_IN2L_VOL_MASK … #define WM5100_IN2L_VOL_SHIFT … #define WM5100_IN2L_VOL_WIDTH … /* * R803 (0x323) - ADC Digital Volume 2R */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN2R_MUTE … #define WM5100_IN2R_MUTE_MASK … #define WM5100_IN2R_MUTE_SHIFT … #define WM5100_IN2R_MUTE_WIDTH … #define WM5100_IN2R_VOL_MASK … #define WM5100_IN2R_VOL_SHIFT … #define WM5100_IN2R_VOL_WIDTH … /* * R804 (0x324) - ADC Digital Volume 3L */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN3L_MUTE … #define WM5100_IN3L_MUTE_MASK … #define WM5100_IN3L_MUTE_SHIFT … #define WM5100_IN3L_MUTE_WIDTH … #define WM5100_IN3L_VOL_MASK … #define WM5100_IN3L_VOL_SHIFT … #define WM5100_IN3L_VOL_WIDTH … /* * R805 (0x325) - ADC Digital Volume 3R */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN3R_MUTE … #define WM5100_IN3R_MUTE_MASK … #define WM5100_IN3R_MUTE_SHIFT … #define WM5100_IN3R_MUTE_WIDTH … #define WM5100_IN3R_VOL_MASK … #define WM5100_IN3R_VOL_SHIFT … #define WM5100_IN3R_VOL_WIDTH … /* * R806 (0x326) - ADC Digital Volume 4L */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN4L_MUTE … #define WM5100_IN4L_MUTE_MASK … #define WM5100_IN4L_MUTE_SHIFT … #define WM5100_IN4L_MUTE_WIDTH … #define WM5100_IN4L_VOL_MASK … #define WM5100_IN4L_VOL_SHIFT … #define WM5100_IN4L_VOL_WIDTH … /* * R807 (0x327) - ADC Digital Volume 4R */ #define WM5100_IN_VU … #define WM5100_IN_VU_MASK … #define WM5100_IN_VU_SHIFT … #define WM5100_IN_VU_WIDTH … #define WM5100_IN4R_MUTE … #define WM5100_IN4R_MUTE_MASK … #define WM5100_IN4R_MUTE_SHIFT … #define WM5100_IN4R_MUTE_WIDTH … #define WM5100_IN4R_VOL_MASK … #define WM5100_IN4R_VOL_SHIFT … #define WM5100_IN4R_VOL_WIDTH … /* * R1025 (0x401) - Output Enables 2 */ #define WM5100_OUT6L_ENA … #define WM5100_OUT6L_ENA_MASK … #define WM5100_OUT6L_ENA_SHIFT … #define WM5100_OUT6L_ENA_WIDTH … #define WM5100_OUT6R_ENA … #define WM5100_OUT6R_ENA_MASK … #define WM5100_OUT6R_ENA_SHIFT … #define WM5100_OUT6R_ENA_WIDTH … #define WM5100_OUT5L_ENA … #define WM5100_OUT5L_ENA_MASK … #define WM5100_OUT5L_ENA_SHIFT … #define WM5100_OUT5L_ENA_WIDTH … #define WM5100_OUT5R_ENA … #define WM5100_OUT5R_ENA_MASK … #define WM5100_OUT5R_ENA_SHIFT … #define WM5100_OUT5R_ENA_WIDTH … #define WM5100_OUT4L_ENA … #define WM5100_OUT4L_ENA_MASK … #define WM5100_OUT4L_ENA_SHIFT … #define WM5100_OUT4L_ENA_WIDTH … #define WM5100_OUT4R_ENA … #define WM5100_OUT4R_ENA_MASK … #define WM5100_OUT4R_ENA_SHIFT … #define WM5100_OUT4R_ENA_WIDTH … /* * R1026 (0x402) - Output Status 1 */ #define WM5100_OUT3L_ENA_STS … #define WM5100_OUT3L_ENA_STS_MASK … #define WM5100_OUT3L_ENA_STS_SHIFT … #define WM5100_OUT3L_ENA_STS_WIDTH … #define WM5100_OUT3R_ENA_STS … #define WM5100_OUT3R_ENA_STS_MASK … #define WM5100_OUT3R_ENA_STS_SHIFT … #define WM5100_OUT3R_ENA_STS_WIDTH … #define WM5100_OUT2L_ENA_STS … #define WM5100_OUT2L_ENA_STS_MASK … #define WM5100_OUT2L_ENA_STS_SHIFT … #define WM5100_OUT2L_ENA_STS_WIDTH … #define WM5100_OUT2R_ENA_STS … #define WM5100_OUT2R_ENA_STS_MASK … #define WM5100_OUT2R_ENA_STS_SHIFT … #define WM5100_OUT2R_ENA_STS_WIDTH … #define WM5100_OUT1L_ENA_STS … #define WM5100_OUT1L_ENA_STS_MASK … #define WM5100_OUT1L_ENA_STS_SHIFT … #define WM5100_OUT1L_ENA_STS_WIDTH … #define WM5100_OUT1R_ENA_STS … #define WM5100_OUT1R_ENA_STS_MASK … #define WM5100_OUT1R_ENA_STS_SHIFT … #define WM5100_OUT1R_ENA_STS_WIDTH … /* * R1027 (0x403) - Output Status 2 */ #define WM5100_OUT6L_ENA_STS … #define WM5100_OUT6L_ENA_STS_MASK … #define WM5100_OUT6L_ENA_STS_SHIFT … #define WM5100_OUT6L_ENA_STS_WIDTH … #define WM5100_OUT6R_ENA_STS … #define WM5100_OUT6R_ENA_STS_MASK … #define WM5100_OUT6R_ENA_STS_SHIFT … #define WM5100_OUT6R_ENA_STS_WIDTH … #define WM5100_OUT5L_ENA_STS … #define WM5100_OUT5L_ENA_STS_MASK … #define WM5100_OUT5L_ENA_STS_SHIFT … #define WM5100_OUT5L_ENA_STS_WIDTH … #define WM5100_OUT5R_ENA_STS … #define WM5100_OUT5R_ENA_STS_MASK … #define WM5100_OUT5R_ENA_STS_SHIFT … #define WM5100_OUT5R_ENA_STS_WIDTH … #define WM5100_OUT4L_ENA_STS … #define WM5100_OUT4L_ENA_STS_MASK … #define WM5100_OUT4L_ENA_STS_SHIFT … #define WM5100_OUT4L_ENA_STS_WIDTH … #define WM5100_OUT4R_ENA_STS … #define WM5100_OUT4R_ENA_STS_MASK … #define WM5100_OUT4R_ENA_STS_SHIFT … #define WM5100_OUT4R_ENA_STS_WIDTH … /* * R1032 (0x408) - Channel Enables 1 */ #define WM5100_HP3L_ENA … #define WM5100_HP3L_ENA_MASK … #define WM5100_HP3L_ENA_SHIFT … #define WM5100_HP3L_ENA_WIDTH … #define WM5100_HP3R_ENA … #define WM5100_HP3R_ENA_MASK … #define WM5100_HP3R_ENA_SHIFT … #define WM5100_HP3R_ENA_WIDTH … #define WM5100_HP2L_ENA … #define WM5100_HP2L_ENA_MASK … #define WM5100_HP2L_ENA_SHIFT … #define WM5100_HP2L_ENA_WIDTH … #define WM5100_HP2R_ENA … #define WM5100_HP2R_ENA_MASK … #define WM5100_HP2R_ENA_SHIFT … #define WM5100_HP2R_ENA_WIDTH … #define WM5100_HP1L_ENA … #define WM5100_HP1L_ENA_MASK … #define WM5100_HP1L_ENA_SHIFT … #define WM5100_HP1L_ENA_WIDTH … #define WM5100_HP1R_ENA … #define WM5100_HP1R_ENA_MASK … #define WM5100_HP1R_ENA_SHIFT … #define WM5100_HP1R_ENA_WIDTH … /* * R1040 (0x410) - Out Volume 1L */ #define WM5100_OUT_RATE_MASK … #define WM5100_OUT_RATE_SHIFT … #define WM5100_OUT_RATE_WIDTH … #define WM5100_OUT1_OSR … #define WM5100_OUT1_OSR_MASK … #define WM5100_OUT1_OSR_SHIFT … #define WM5100_OUT1_OSR_WIDTH … #define WM5100_OUT1_MONO … #define WM5100_OUT1_MONO_MASK … #define WM5100_OUT1_MONO_SHIFT … #define WM5100_OUT1_MONO_WIDTH … #define WM5100_OUT1L_ANC_SRC … #define WM5100_OUT1L_ANC_SRC_MASK … #define WM5100_OUT1L_ANC_SRC_SHIFT … #define WM5100_OUT1L_ANC_SRC_WIDTH … #define WM5100_OUT1L_PGA_VOL_MASK … #define WM5100_OUT1L_PGA_VOL_SHIFT … #define WM5100_OUT1L_PGA_VOL_WIDTH … /* * R1041 (0x411) - Out Volume 1R */ #define WM5100_OUT1R_ANC_SRC … #define WM5100_OUT1R_ANC_SRC_MASK … #define WM5100_OUT1R_ANC_SRC_SHIFT … #define WM5100_OUT1R_ANC_SRC_WIDTH … #define WM5100_OUT1R_PGA_VOL_MASK … #define WM5100_OUT1R_PGA_VOL_SHIFT … #define WM5100_OUT1R_PGA_VOL_WIDTH … /* * R1042 (0x412) - DAC Volume Limit 1L */ #define WM5100_OUT1L_VOL_LIM_MASK … #define WM5100_OUT1L_VOL_LIM_SHIFT … #define WM5100_OUT1L_VOL_LIM_WIDTH … /* * R1043 (0x413) - DAC Volume Limit 1R */ #define WM5100_OUT1R_VOL_LIM_MASK … #define WM5100_OUT1R_VOL_LIM_SHIFT … #define WM5100_OUT1R_VOL_LIM_WIDTH … /* * R1044 (0x414) - Out Volume 2L */ #define WM5100_OUT2_OSR … #define WM5100_OUT2_OSR_MASK … #define WM5100_OUT2_OSR_SHIFT … #define WM5100_OUT2_OSR_WIDTH … #define WM5100_OUT2_MONO … #define WM5100_OUT2_MONO_MASK … #define WM5100_OUT2_MONO_SHIFT … #define WM5100_OUT2_MONO_WIDTH … #define WM5100_OUT2L_ANC_SRC … #define WM5100_OUT2L_ANC_SRC_MASK … #define WM5100_OUT2L_ANC_SRC_SHIFT … #define WM5100_OUT2L_ANC_SRC_WIDTH … #define WM5100_OUT2L_PGA_VOL_MASK … #define WM5100_OUT2L_PGA_VOL_SHIFT … #define WM5100_OUT2L_PGA_VOL_WIDTH … /* * R1045 (0x415) - Out Volume 2R */ #define WM5100_OUT2R_ANC_SRC … #define WM5100_OUT2R_ANC_SRC_MASK … #define WM5100_OUT2R_ANC_SRC_SHIFT … #define WM5100_OUT2R_ANC_SRC_WIDTH … #define WM5100_OUT2R_PGA_VOL_MASK … #define WM5100_OUT2R_PGA_VOL_SHIFT … #define WM5100_OUT2R_PGA_VOL_WIDTH … /* * R1046 (0x416) - DAC Volume Limit 2L */ #define WM5100_OUT2L_VOL_LIM_MASK … #define WM5100_OUT2L_VOL_LIM_SHIFT … #define WM5100_OUT2L_VOL_LIM_WIDTH … /* * R1047 (0x417) - DAC Volume Limit 2R */ #define WM5100_OUT2R_VOL_LIM_MASK … #define WM5100_OUT2R_VOL_LIM_SHIFT … #define WM5100_OUT2R_VOL_LIM_WIDTH … /* * R1048 (0x418) - Out Volume 3L */ #define WM5100_OUT3_OSR … #define WM5100_OUT3_OSR_MASK … #define WM5100_OUT3_OSR_SHIFT … #define WM5100_OUT3_OSR_WIDTH … #define WM5100_OUT3_MONO … #define WM5100_OUT3_MONO_MASK … #define WM5100_OUT3_MONO_SHIFT … #define WM5100_OUT3_MONO_WIDTH … #define WM5100_OUT3L_ANC_SRC … #define WM5100_OUT3L_ANC_SRC_MASK … #define WM5100_OUT3L_ANC_SRC_SHIFT … #define WM5100_OUT3L_ANC_SRC_WIDTH … #define WM5100_OUT3L_PGA_VOL_MASK … #define WM5100_OUT3L_PGA_VOL_SHIFT … #define WM5100_OUT3L_PGA_VOL_WIDTH … /* * R1049 (0x419) - Out Volume 3R */ #define WM5100_OUT3R_ANC_SRC … #define WM5100_OUT3R_ANC_SRC_MASK … #define WM5100_OUT3R_ANC_SRC_SHIFT … #define WM5100_OUT3R_ANC_SRC_WIDTH … #define WM5100_OUT3R_PGA_VOL_MASK … #define WM5100_OUT3R_PGA_VOL_SHIFT … #define WM5100_OUT3R_PGA_VOL_WIDTH … /* * R1050 (0x41A) - DAC Volume Limit 3L */ #define WM5100_OUT3L_VOL_LIM_MASK … #define WM5100_OUT3L_VOL_LIM_SHIFT … #define WM5100_OUT3L_VOL_LIM_WIDTH … /* * R1051 (0x41B) - DAC Volume Limit 3R */ #define WM5100_OUT3R_VOL_LIM_MASK … #define WM5100_OUT3R_VOL_LIM_SHIFT … #define WM5100_OUT3R_VOL_LIM_WIDTH … /* * R1052 (0x41C) - Out Volume 4L */ #define WM5100_OUT4_OSR … #define WM5100_OUT4_OSR_MASK … #define WM5100_OUT4_OSR_SHIFT … #define WM5100_OUT4_OSR_WIDTH … #define WM5100_OUT4L_ANC_SRC … #define WM5100_OUT4L_ANC_SRC_MASK … #define WM5100_OUT4L_ANC_SRC_SHIFT … #define WM5100_OUT4L_ANC_SRC_WIDTH … #define WM5100_OUT4L_VOL_LIM_MASK … #define WM5100_OUT4L_VOL_LIM_SHIFT … #define WM5100_OUT4L_VOL_LIM_WIDTH … /* * R1053 (0x41D) - Out Volume 4R */ #define WM5100_OUT4R_ANC_SRC … #define WM5100_OUT4R_ANC_SRC_MASK … #define WM5100_OUT4R_ANC_SRC_SHIFT … #define WM5100_OUT4R_ANC_SRC_WIDTH … #define WM5100_OUT4R_VOL_LIM_MASK … #define WM5100_OUT4R_VOL_LIM_SHIFT … #define WM5100_OUT4R_VOL_LIM_WIDTH … /* * R1054 (0x41E) - DAC Volume Limit 5L */ #define WM5100_OUT5_OSR … #define WM5100_OUT5_OSR_MASK … #define WM5100_OUT5_OSR_SHIFT … #define WM5100_OUT5_OSR_WIDTH … #define WM5100_OUT5L_ANC_SRC … #define WM5100_OUT5L_ANC_SRC_MASK … #define WM5100_OUT5L_ANC_SRC_SHIFT … #define WM5100_OUT5L_ANC_SRC_WIDTH … #define WM5100_OUT5L_VOL_LIM_MASK … #define WM5100_OUT5L_VOL_LIM_SHIFT … #define WM5100_OUT5L_VOL_LIM_WIDTH … /* * R1055 (0x41F) - DAC Volume Limit 5R */ #define WM5100_OUT5R_ANC_SRC … #define WM5100_OUT5R_ANC_SRC_MASK … #define WM5100_OUT5R_ANC_SRC_SHIFT … #define WM5100_OUT5R_ANC_SRC_WIDTH … #define WM5100_OUT5R_VOL_LIM_MASK … #define WM5100_OUT5R_VOL_LIM_SHIFT … #define WM5100_OUT5R_VOL_LIM_WIDTH … /* * R1056 (0x420) - DAC Volume Limit 6L */ #define WM5100_OUT6_OSR … #define WM5100_OUT6_OSR_MASK … #define WM5100_OUT6_OSR_SHIFT … #define WM5100_OUT6_OSR_WIDTH … #define WM5100_OUT6L_ANC_SRC … #define WM5100_OUT6L_ANC_SRC_MASK … #define WM5100_OUT6L_ANC_SRC_SHIFT … #define WM5100_OUT6L_ANC_SRC_WIDTH … #define WM5100_OUT6L_VOL_LIM_MASK … #define WM5100_OUT6L_VOL_LIM_SHIFT … #define WM5100_OUT6L_VOL_LIM_WIDTH … /* * R1057 (0x421) - DAC Volume Limit 6R */ #define WM5100_OUT6R_ANC_SRC … #define WM5100_OUT6R_ANC_SRC_MASK … #define WM5100_OUT6R_ANC_SRC_SHIFT … #define WM5100_OUT6R_ANC_SRC_WIDTH … #define WM5100_OUT6R_VOL_LIM_MASK … #define WM5100_OUT6R_VOL_LIM_SHIFT … #define WM5100_OUT6R_VOL_LIM_WIDTH … /* * R1088 (0x440) - DAC AEC Control 1 */ #define WM5100_AEC_LOOPBACK_SRC_MASK … #define WM5100_AEC_LOOPBACK_SRC_SHIFT … #define WM5100_AEC_LOOPBACK_SRC_WIDTH … #define WM5100_AEC_ENA_STS … #define WM5100_AEC_ENA_STS_MASK … #define WM5100_AEC_ENA_STS_SHIFT … #define WM5100_AEC_ENA_STS_WIDTH … #define WM5100_AEC_LOOPBACK_ENA … #define WM5100_AEC_LOOPBACK_ENA_MASK … #define WM5100_AEC_LOOPBACK_ENA_SHIFT … #define WM5100_AEC_LOOPBACK_ENA_WIDTH … /* * R1089 (0x441) - Output Volume Ramp */ #define WM5100_OUT_VD_RAMP_MASK … #define WM5100_OUT_VD_RAMP_SHIFT … #define WM5100_OUT_VD_RAMP_WIDTH … #define WM5100_OUT_VI_RAMP_MASK … #define WM5100_OUT_VI_RAMP_SHIFT … #define WM5100_OUT_VI_RAMP_WIDTH … /* * R1152 (0x480) - DAC Digital Volume 1L */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT1L_MUTE … #define WM5100_OUT1L_MUTE_MASK … #define WM5100_OUT1L_MUTE_SHIFT … #define WM5100_OUT1L_MUTE_WIDTH … #define WM5100_OUT1L_VOL_MASK … #define WM5100_OUT1L_VOL_SHIFT … #define WM5100_OUT1L_VOL_WIDTH … /* * R1153 (0x481) - DAC Digital Volume 1R */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT1R_MUTE … #define WM5100_OUT1R_MUTE_MASK … #define WM5100_OUT1R_MUTE_SHIFT … #define WM5100_OUT1R_MUTE_WIDTH … #define WM5100_OUT1R_VOL_MASK … #define WM5100_OUT1R_VOL_SHIFT … #define WM5100_OUT1R_VOL_WIDTH … /* * R1154 (0x482) - DAC Digital Volume 2L */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT2L_MUTE … #define WM5100_OUT2L_MUTE_MASK … #define WM5100_OUT2L_MUTE_SHIFT … #define WM5100_OUT2L_MUTE_WIDTH … #define WM5100_OUT2L_VOL_MASK … #define WM5100_OUT2L_VOL_SHIFT … #define WM5100_OUT2L_VOL_WIDTH … /* * R1155 (0x483) - DAC Digital Volume 2R */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT2R_MUTE … #define WM5100_OUT2R_MUTE_MASK … #define WM5100_OUT2R_MUTE_SHIFT … #define WM5100_OUT2R_MUTE_WIDTH … #define WM5100_OUT2R_VOL_MASK … #define WM5100_OUT2R_VOL_SHIFT … #define WM5100_OUT2R_VOL_WIDTH … /* * R1156 (0x484) - DAC Digital Volume 3L */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT3L_MUTE … #define WM5100_OUT3L_MUTE_MASK … #define WM5100_OUT3L_MUTE_SHIFT … #define WM5100_OUT3L_MUTE_WIDTH … #define WM5100_OUT3L_VOL_MASK … #define WM5100_OUT3L_VOL_SHIFT … #define WM5100_OUT3L_VOL_WIDTH … /* * R1157 (0x485) - DAC Digital Volume 3R */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT3R_MUTE … #define WM5100_OUT3R_MUTE_MASK … #define WM5100_OUT3R_MUTE_SHIFT … #define WM5100_OUT3R_MUTE_WIDTH … #define WM5100_OUT3R_VOL_MASK … #define WM5100_OUT3R_VOL_SHIFT … #define WM5100_OUT3R_VOL_WIDTH … /* * R1158 (0x486) - DAC Digital Volume 4L */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT4L_MUTE … #define WM5100_OUT4L_MUTE_MASK … #define WM5100_OUT4L_MUTE_SHIFT … #define WM5100_OUT4L_MUTE_WIDTH … #define WM5100_OUT4L_VOL_MASK … #define WM5100_OUT4L_VOL_SHIFT … #define WM5100_OUT4L_VOL_WIDTH … /* * R1159 (0x487) - DAC Digital Volume 4R */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT4R_MUTE … #define WM5100_OUT4R_MUTE_MASK … #define WM5100_OUT4R_MUTE_SHIFT … #define WM5100_OUT4R_MUTE_WIDTH … #define WM5100_OUT4R_VOL_MASK … #define WM5100_OUT4R_VOL_SHIFT … #define WM5100_OUT4R_VOL_WIDTH … /* * R1160 (0x488) - DAC Digital Volume 5L */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT5L_MUTE … #define WM5100_OUT5L_MUTE_MASK … #define WM5100_OUT5L_MUTE_SHIFT … #define WM5100_OUT5L_MUTE_WIDTH … #define WM5100_OUT5L_VOL_MASK … #define WM5100_OUT5L_VOL_SHIFT … #define WM5100_OUT5L_VOL_WIDTH … /* * R1161 (0x489) - DAC Digital Volume 5R */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT5R_MUTE … #define WM5100_OUT5R_MUTE_MASK … #define WM5100_OUT5R_MUTE_SHIFT … #define WM5100_OUT5R_MUTE_WIDTH … #define WM5100_OUT5R_VOL_MASK … #define WM5100_OUT5R_VOL_SHIFT … #define WM5100_OUT5R_VOL_WIDTH … /* * R1162 (0x48A) - DAC Digital Volume 6L */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT6L_MUTE … #define WM5100_OUT6L_MUTE_MASK … #define WM5100_OUT6L_MUTE_SHIFT … #define WM5100_OUT6L_MUTE_WIDTH … #define WM5100_OUT6L_VOL_MASK … #define WM5100_OUT6L_VOL_SHIFT … #define WM5100_OUT6L_VOL_WIDTH … /* * R1163 (0x48B) - DAC Digital Volume 6R */ #define WM5100_OUT_VU … #define WM5100_OUT_VU_MASK … #define WM5100_OUT_VU_SHIFT … #define WM5100_OUT_VU_WIDTH … #define WM5100_OUT6R_MUTE … #define WM5100_OUT6R_MUTE_MASK … #define WM5100_OUT6R_MUTE_SHIFT … #define WM5100_OUT6R_MUTE_WIDTH … #define WM5100_OUT6R_VOL_MASK … #define WM5100_OUT6R_VOL_SHIFT … #define WM5100_OUT6R_VOL_WIDTH … /* * R1216 (0x4C0) - PDM SPK1 CTRL 1 */ #define WM5100_SPK1R_MUTE … #define WM5100_SPK1R_MUTE_MASK … #define WM5100_SPK1R_MUTE_SHIFT … #define WM5100_SPK1R_MUTE_WIDTH … #define WM5100_SPK1L_MUTE … #define WM5100_SPK1L_MUTE_MASK … #define WM5100_SPK1L_MUTE_SHIFT … #define WM5100_SPK1L_MUTE_WIDTH … #define WM5100_SPK1_MUTE_ENDIAN … #define WM5100_SPK1_MUTE_ENDIAN_MASK … #define WM5100_SPK1_MUTE_ENDIAN_SHIFT … #define WM5100_SPK1_MUTE_ENDIAN_WIDTH … #define WM5100_SPK1_MUTE_SEQ1_MASK … #define WM5100_SPK1_MUTE_SEQ1_SHIFT … #define WM5100_SPK1_MUTE_SEQ1_WIDTH … /* * R1217 (0x4C1) - PDM SPK1 CTRL 2 */ #define WM5100_SPK1_FMT … #define WM5100_SPK1_FMT_MASK … #define WM5100_SPK1_FMT_SHIFT … #define WM5100_SPK1_FMT_WIDTH … /* * R1218 (0x4C2) - PDM SPK2 CTRL 1 */ #define WM5100_SPK2R_MUTE … #define WM5100_SPK2R_MUTE_MASK … #define WM5100_SPK2R_MUTE_SHIFT … #define WM5100_SPK2R_MUTE_WIDTH … #define WM5100_SPK2L_MUTE … #define WM5100_SPK2L_MUTE_MASK … #define WM5100_SPK2L_MUTE_SHIFT … #define WM5100_SPK2L_MUTE_WIDTH … #define WM5100_SPK2_MUTE_ENDIAN … #define WM5100_SPK2_MUTE_ENDIAN_MASK … #define WM5100_SPK2_MUTE_ENDIAN_SHIFT … #define WM5100_SPK2_MUTE_ENDIAN_WIDTH … #define WM5100_SPK2_MUTE_SEQ1_MASK … #define WM5100_SPK2_MUTE_SEQ1_SHIFT … #define WM5100_SPK2_MUTE_SEQ1_WIDTH … /* * R1219 (0x4C3) - PDM SPK2 CTRL 2 */ #define WM5100_SPK2_FMT … #define WM5100_SPK2_FMT_MASK … #define WM5100_SPK2_FMT_SHIFT … #define WM5100_SPK2_FMT_WIDTH … /* * R1280 (0x500) - Audio IF 1_1 */ #define WM5100_AIF1_BCLK_INV … #define WM5100_AIF1_BCLK_INV_MASK … #define WM5100_AIF1_BCLK_INV_SHIFT … #define WM5100_AIF1_BCLK_INV_WIDTH … #define WM5100_AIF1_BCLK_FRC … #define WM5100_AIF1_BCLK_FRC_MASK … #define WM5100_AIF1_BCLK_FRC_SHIFT … #define WM5100_AIF1_BCLK_FRC_WIDTH … #define WM5100_AIF1_BCLK_MSTR … #define WM5100_AIF1_BCLK_MSTR_MASK … #define WM5100_AIF1_BCLK_MSTR_SHIFT … #define WM5100_AIF1_BCLK_MSTR_WIDTH … #define WM5100_AIF1_BCLK_FREQ_MASK … #define WM5100_AIF1_BCLK_FREQ_SHIFT … #define WM5100_AIF1_BCLK_FREQ_WIDTH … /* * R1281 (0x501) - Audio IF 1_2 */ #define WM5100_AIF1TX_DAT_TRI … #define WM5100_AIF1TX_DAT_TRI_MASK … #define WM5100_AIF1TX_DAT_TRI_SHIFT … #define WM5100_AIF1TX_DAT_TRI_WIDTH … #define WM5100_AIF1TX_LRCLK_SRC … #define WM5100_AIF1TX_LRCLK_SRC_MASK … #define WM5100_AIF1TX_LRCLK_SRC_SHIFT … #define WM5100_AIF1TX_LRCLK_SRC_WIDTH … #define WM5100_AIF1TX_LRCLK_INV … #define WM5100_AIF1TX_LRCLK_INV_MASK … #define WM5100_AIF1TX_LRCLK_INV_SHIFT … #define WM5100_AIF1TX_LRCLK_INV_WIDTH … #define WM5100_AIF1TX_LRCLK_FRC … #define WM5100_AIF1TX_LRCLK_FRC_MASK … #define WM5100_AIF1TX_LRCLK_FRC_SHIFT … #define WM5100_AIF1TX_LRCLK_FRC_WIDTH … #define WM5100_AIF1TX_LRCLK_MSTR … #define WM5100_AIF1TX_LRCLK_MSTR_MASK … #define WM5100_AIF1TX_LRCLK_MSTR_SHIFT … #define WM5100_AIF1TX_LRCLK_MSTR_WIDTH … /* * R1282 (0x502) - Audio IF 1_3 */ #define WM5100_AIF1RX_LRCLK_INV … #define WM5100_AIF1RX_LRCLK_INV_MASK … #define WM5100_AIF1RX_LRCLK_INV_SHIFT … #define WM5100_AIF1RX_LRCLK_INV_WIDTH … #define WM5100_AIF1RX_LRCLK_FRC … #define WM5100_AIF1RX_LRCLK_FRC_MASK … #define WM5100_AIF1RX_LRCLK_FRC_SHIFT … #define WM5100_AIF1RX_LRCLK_FRC_WIDTH … #define WM5100_AIF1RX_LRCLK_MSTR … #define WM5100_AIF1RX_LRCLK_MSTR_MASK … #define WM5100_AIF1RX_LRCLK_MSTR_SHIFT … #define WM5100_AIF1RX_LRCLK_MSTR_WIDTH … /* * R1283 (0x503) - Audio IF 1_4 */ #define WM5100_AIF1_TRI … #define WM5100_AIF1_TRI_MASK … #define WM5100_AIF1_TRI_SHIFT … #define WM5100_AIF1_TRI_WIDTH … #define WM5100_AIF1_RATE_MASK … #define WM5100_AIF1_RATE_SHIFT … #define WM5100_AIF1_RATE_WIDTH … /* * R1284 (0x504) - Audio IF 1_5 */ #define WM5100_AIF1_FMT_MASK … #define WM5100_AIF1_FMT_SHIFT … #define WM5100_AIF1_FMT_WIDTH … /* * R1285 (0x505) - Audio IF 1_6 */ #define WM5100_AIF1TX_BCPF_MASK … #define WM5100_AIF1TX_BCPF_SHIFT … #define WM5100_AIF1TX_BCPF_WIDTH … /* * R1286 (0x506) - Audio IF 1_7 */ #define WM5100_AIF1RX_BCPF_MASK … #define WM5100_AIF1RX_BCPF_SHIFT … #define WM5100_AIF1RX_BCPF_WIDTH … /* * R1287 (0x507) - Audio IF 1_8 */ #define WM5100_AIF1TX_WL_MASK … #define WM5100_AIF1TX_WL_SHIFT … #define WM5100_AIF1TX_WL_WIDTH … #define WM5100_AIF1TX_SLOT_LEN_MASK … #define WM5100_AIF1TX_SLOT_LEN_SHIFT … #define WM5100_AIF1TX_SLOT_LEN_WIDTH … /* * R1288 (0x508) - Audio IF 1_9 */ #define WM5100_AIF1RX_WL_MASK … #define WM5100_AIF1RX_WL_SHIFT … #define WM5100_AIF1RX_WL_WIDTH … #define WM5100_AIF1RX_SLOT_LEN_MASK … #define WM5100_AIF1RX_SLOT_LEN_SHIFT … #define WM5100_AIF1RX_SLOT_LEN_WIDTH … /* * R1289 (0x509) - Audio IF 1_10 */ #define WM5100_AIF1TX1_SLOT_MASK … #define WM5100_AIF1TX1_SLOT_SHIFT … #define WM5100_AIF1TX1_SLOT_WIDTH … /* * R1290 (0x50A) - Audio IF 1_11 */ #define WM5100_AIF1TX2_SLOT_MASK … #define WM5100_AIF1TX2_SLOT_SHIFT … #define WM5100_AIF1TX2_SLOT_WIDTH … /* * R1291 (0x50B) - Audio IF 1_12 */ #define WM5100_AIF1TX3_SLOT_MASK … #define WM5100_AIF1TX3_SLOT_SHIFT … #define WM5100_AIF1TX3_SLOT_WIDTH … /* * R1292 (0x50C) - Audio IF 1_13 */ #define WM5100_AIF1TX4_SLOT_MASK … #define WM5100_AIF1TX4_SLOT_SHIFT … #define WM5100_AIF1TX4_SLOT_WIDTH … /* * R1293 (0x50D) - Audio IF 1_14 */ #define WM5100_AIF1TX5_SLOT_MASK … #define WM5100_AIF1TX5_SLOT_SHIFT … #define WM5100_AIF1TX5_SLOT_WIDTH … /* * R1294 (0x50E) - Audio IF 1_15 */ #define WM5100_AIF1TX6_SLOT_MASK … #define WM5100_AIF1TX6_SLOT_SHIFT … #define WM5100_AIF1TX6_SLOT_WIDTH … /* * R1295 (0x50F) - Audio IF 1_16 */ #define WM5100_AIF1TX7_SLOT_MASK … #define WM5100_AIF1TX7_SLOT_SHIFT … #define WM5100_AIF1TX7_SLOT_WIDTH … /* * R1296 (0x510) - Audio IF 1_17 */ #define WM5100_AIF1TX8_SLOT_MASK … #define WM5100_AIF1TX8_SLOT_SHIFT … #define WM5100_AIF1TX8_SLOT_WIDTH … /* * R1297 (0x511) - Audio IF 1_18 */ #define WM5100_AIF1RX1_SLOT_MASK … #define WM5100_AIF1RX1_SLOT_SHIFT … #define WM5100_AIF1RX1_SLOT_WIDTH … /* * R1298 (0x512) - Audio IF 1_19 */ #define WM5100_AIF1RX2_SLOT_MASK … #define WM5100_AIF1RX2_SLOT_SHIFT … #define WM5100_AIF1RX2_SLOT_WIDTH … /* * R1299 (0x513) - Audio IF 1_20 */ #define WM5100_AIF1RX3_SLOT_MASK … #define WM5100_AIF1RX3_SLOT_SHIFT … #define WM5100_AIF1RX3_SLOT_WIDTH … /* * R1300 (0x514) - Audio IF 1_21 */ #define WM5100_AIF1RX4_SLOT_MASK … #define WM5100_AIF1RX4_SLOT_SHIFT … #define WM5100_AIF1RX4_SLOT_WIDTH … /* * R1301 (0x515) - Audio IF 1_22 */ #define WM5100_AIF1RX5_SLOT_MASK … #define WM5100_AIF1RX5_SLOT_SHIFT … #define WM5100_AIF1RX5_SLOT_WIDTH … /* * R1302 (0x516) - Audio IF 1_23 */ #define WM5100_AIF1RX6_SLOT_MASK … #define WM5100_AIF1RX6_SLOT_SHIFT … #define WM5100_AIF1RX6_SLOT_WIDTH … /* * R1303 (0x517) - Audio IF 1_24 */ #define WM5100_AIF1RX7_SLOT_MASK … #define WM5100_AIF1RX7_SLOT_SHIFT … #define WM5100_AIF1RX7_SLOT_WIDTH … /* * R1304 (0x518) - Audio IF 1_25 */ #define WM5100_AIF1RX8_SLOT_MASK … #define WM5100_AIF1RX8_SLOT_SHIFT … #define WM5100_AIF1RX8_SLOT_WIDTH … /* * R1305 (0x519) - Audio IF 1_26 */ #define WM5100_AIF1TX8_ENA … #define WM5100_AIF1TX8_ENA_MASK … #define WM5100_AIF1TX8_ENA_SHIFT … #define WM5100_AIF1TX8_ENA_WIDTH … #define WM5100_AIF1TX7_ENA … #define WM5100_AIF1TX7_ENA_MASK … #define WM5100_AIF1TX7_ENA_SHIFT … #define WM5100_AIF1TX7_ENA_WIDTH … #define WM5100_AIF1TX6_ENA … #define WM5100_AIF1TX6_ENA_MASK … #define WM5100_AIF1TX6_ENA_SHIFT … #define WM5100_AIF1TX6_ENA_WIDTH … #define WM5100_AIF1TX5_ENA … #define WM5100_AIF1TX5_ENA_MASK … #define WM5100_AIF1TX5_ENA_SHIFT … #define WM5100_AIF1TX5_ENA_WIDTH … #define WM5100_AIF1TX4_ENA … #define WM5100_AIF1TX4_ENA_MASK … #define WM5100_AIF1TX4_ENA_SHIFT … #define WM5100_AIF1TX4_ENA_WIDTH … #define WM5100_AIF1TX3_ENA … #define WM5100_AIF1TX3_ENA_MASK … #define WM5100_AIF1TX3_ENA_SHIFT … #define WM5100_AIF1TX3_ENA_WIDTH … #define WM5100_AIF1TX2_ENA … #define WM5100_AIF1TX2_ENA_MASK … #define WM5100_AIF1TX2_ENA_SHIFT … #define WM5100_AIF1TX2_ENA_WIDTH … #define WM5100_AIF1TX1_ENA … #define WM5100_AIF1TX1_ENA_MASK … #define WM5100_AIF1TX1_ENA_SHIFT … #define WM5100_AIF1TX1_ENA_WIDTH … /* * R1306 (0x51A) - Audio IF 1_27 */ #define WM5100_AIF1RX8_ENA … #define WM5100_AIF1RX8_ENA_MASK … #define WM5100_AIF1RX8_ENA_SHIFT … #define WM5100_AIF1RX8_ENA_WIDTH … #define WM5100_AIF1RX7_ENA … #define WM5100_AIF1RX7_ENA_MASK … #define WM5100_AIF1RX7_ENA_SHIFT … #define WM5100_AIF1RX7_ENA_WIDTH … #define WM5100_AIF1RX6_ENA … #define WM5100_AIF1RX6_ENA_MASK … #define WM5100_AIF1RX6_ENA_SHIFT … #define WM5100_AIF1RX6_ENA_WIDTH … #define WM5100_AIF1RX5_ENA … #define WM5100_AIF1RX5_ENA_MASK … #define WM5100_AIF1RX5_ENA_SHIFT … #define WM5100_AIF1RX5_ENA_WIDTH … #define WM5100_AIF1RX4_ENA … #define WM5100_AIF1RX4_ENA_MASK … #define WM5100_AIF1RX4_ENA_SHIFT … #define WM5100_AIF1RX4_ENA_WIDTH … #define WM5100_AIF1RX3_ENA … #define WM5100_AIF1RX3_ENA_MASK … #define WM5100_AIF1RX3_ENA_SHIFT … #define WM5100_AIF1RX3_ENA_WIDTH … #define WM5100_AIF1RX2_ENA … #define WM5100_AIF1RX2_ENA_MASK … #define WM5100_AIF1RX2_ENA_SHIFT … #define WM5100_AIF1RX2_ENA_WIDTH … #define WM5100_AIF1RX1_ENA … #define WM5100_AIF1RX1_ENA_MASK … #define WM5100_AIF1RX1_ENA_SHIFT … #define WM5100_AIF1RX1_ENA_WIDTH … /* * R1344 (0x540) - Audio IF 2_1 */ #define WM5100_AIF2_BCLK_INV … #define WM5100_AIF2_BCLK_INV_MASK … #define WM5100_AIF2_BCLK_INV_SHIFT … #define WM5100_AIF2_BCLK_INV_WIDTH … #define WM5100_AIF2_BCLK_FRC … #define WM5100_AIF2_BCLK_FRC_MASK … #define WM5100_AIF2_BCLK_FRC_SHIFT … #define WM5100_AIF2_BCLK_FRC_WIDTH … #define WM5100_AIF2_BCLK_MSTR … #define WM5100_AIF2_BCLK_MSTR_MASK … #define WM5100_AIF2_BCLK_MSTR_SHIFT … #define WM5100_AIF2_BCLK_MSTR_WIDTH … #define WM5100_AIF2_BCLK_FREQ_MASK … #define WM5100_AIF2_BCLK_FREQ_SHIFT … #define WM5100_AIF2_BCLK_FREQ_WIDTH … /* * R1345 (0x541) - Audio IF 2_2 */ #define WM5100_AIF2TX_DAT_TRI … #define WM5100_AIF2TX_DAT_TRI_MASK … #define WM5100_AIF2TX_DAT_TRI_SHIFT … #define WM5100_AIF2TX_DAT_TRI_WIDTH … #define WM5100_AIF2TX_LRCLK_SRC … #define WM5100_AIF2TX_LRCLK_SRC_MASK … #define WM5100_AIF2TX_LRCLK_SRC_SHIFT … #define WM5100_AIF2TX_LRCLK_SRC_WIDTH … #define WM5100_AIF2TX_LRCLK_INV … #define WM5100_AIF2TX_LRCLK_INV_MASK … #define WM5100_AIF2TX_LRCLK_INV_SHIFT … #define WM5100_AIF2TX_LRCLK_INV_WIDTH … #define WM5100_AIF2TX_LRCLK_FRC … #define WM5100_AIF2TX_LRCLK_FRC_MASK … #define WM5100_AIF2TX_LRCLK_FRC_SHIFT … #define WM5100_AIF2TX_LRCLK_FRC_WIDTH … #define WM5100_AIF2TX_LRCLK_MSTR … #define WM5100_AIF2TX_LRCLK_MSTR_MASK … #define WM5100_AIF2TX_LRCLK_MSTR_SHIFT … #define WM5100_AIF2TX_LRCLK_MSTR_WIDTH … /* * R1346 (0x542) - Audio IF 2_3 */ #define WM5100_AIF2RX_LRCLK_INV … #define WM5100_AIF2RX_LRCLK_INV_MASK … #define WM5100_AIF2RX_LRCLK_INV_SHIFT … #define WM5100_AIF2RX_LRCLK_INV_WIDTH … #define WM5100_AIF2RX_LRCLK_FRC … #define WM5100_AIF2RX_LRCLK_FRC_MASK … #define WM5100_AIF2RX_LRCLK_FRC_SHIFT … #define WM5100_AIF2RX_LRCLK_FRC_WIDTH … #define WM5100_AIF2RX_LRCLK_MSTR … #define WM5100_AIF2RX_LRCLK_MSTR_MASK … #define WM5100_AIF2RX_LRCLK_MSTR_SHIFT … #define WM5100_AIF2RX_LRCLK_MSTR_WIDTH … /* * R1347 (0x543) - Audio IF 2_4 */ #define WM5100_AIF2_TRI … #define WM5100_AIF2_TRI_MASK … #define WM5100_AIF2_TRI_SHIFT … #define WM5100_AIF2_TRI_WIDTH … #define WM5100_AIF2_RATE_MASK … #define WM5100_AIF2_RATE_SHIFT … #define WM5100_AIF2_RATE_WIDTH … /* * R1348 (0x544) - Audio IF 2_5 */ #define WM5100_AIF2_FMT_MASK … #define WM5100_AIF2_FMT_SHIFT … #define WM5100_AIF2_FMT_WIDTH … /* * R1349 (0x545) - Audio IF 2_6 */ #define WM5100_AIF2TX_BCPF_MASK … #define WM5100_AIF2TX_BCPF_SHIFT … #define WM5100_AIF2TX_BCPF_WIDTH … /* * R1350 (0x546) - Audio IF 2_7 */ #define WM5100_AIF2RX_BCPF_MASK … #define WM5100_AIF2RX_BCPF_SHIFT … #define WM5100_AIF2RX_BCPF_WIDTH … /* * R1351 (0x547) - Audio IF 2_8 */ #define WM5100_AIF2TX_WL_MASK … #define WM5100_AIF2TX_WL_SHIFT … #define WM5100_AIF2TX_WL_WIDTH … #define WM5100_AIF2TX_SLOT_LEN_MASK … #define WM5100_AIF2TX_SLOT_LEN_SHIFT … #define WM5100_AIF2TX_SLOT_LEN_WIDTH … /* * R1352 (0x548) - Audio IF 2_9 */ #define WM5100_AIF2RX_WL_MASK … #define WM5100_AIF2RX_WL_SHIFT … #define WM5100_AIF2RX_WL_WIDTH … #define WM5100_AIF2RX_SLOT_LEN_MASK … #define WM5100_AIF2RX_SLOT_LEN_SHIFT … #define WM5100_AIF2RX_SLOT_LEN_WIDTH … /* * R1353 (0x549) - Audio IF 2_10 */ #define WM5100_AIF2TX1_SLOT_MASK … #define WM5100_AIF2TX1_SLOT_SHIFT … #define WM5100_AIF2TX1_SLOT_WIDTH … /* * R1354 (0x54A) - Audio IF 2_11 */ #define WM5100_AIF2TX2_SLOT_MASK … #define WM5100_AIF2TX2_SLOT_SHIFT … #define WM5100_AIF2TX2_SLOT_WIDTH … /* * R1361 (0x551) - Audio IF 2_18 */ #define WM5100_AIF2RX1_SLOT_MASK … #define WM5100_AIF2RX1_SLOT_SHIFT … #define WM5100_AIF2RX1_SLOT_WIDTH … /* * R1362 (0x552) - Audio IF 2_19 */ #define WM5100_AIF2RX2_SLOT_MASK … #define WM5100_AIF2RX2_SLOT_SHIFT … #define WM5100_AIF2RX2_SLOT_WIDTH … /* * R1369 (0x559) - Audio IF 2_26 */ #define WM5100_AIF2TX2_ENA … #define WM5100_AIF2TX2_ENA_MASK … #define WM5100_AIF2TX2_ENA_SHIFT … #define WM5100_AIF2TX2_ENA_WIDTH … #define WM5100_AIF2TX1_ENA … #define WM5100_AIF2TX1_ENA_MASK … #define WM5100_AIF2TX1_ENA_SHIFT … #define WM5100_AIF2TX1_ENA_WIDTH … /* * R1370 (0x55A) - Audio IF 2_27 */ #define WM5100_AIF2RX2_ENA … #define WM5100_AIF2RX2_ENA_MASK … #define WM5100_AIF2RX2_ENA_SHIFT … #define WM5100_AIF2RX2_ENA_WIDTH … #define WM5100_AIF2RX1_ENA … #define WM5100_AIF2RX1_ENA_MASK … #define WM5100_AIF2RX1_ENA_SHIFT … #define WM5100_AIF2RX1_ENA_WIDTH … /* * R1408 (0x580) - Audio IF 3_1 */ #define WM5100_AIF3_BCLK_INV … #define WM5100_AIF3_BCLK_INV_MASK … #define WM5100_AIF3_BCLK_INV_SHIFT … #define WM5100_AIF3_BCLK_INV_WIDTH … #define WM5100_AIF3_BCLK_FRC … #define WM5100_AIF3_BCLK_FRC_MASK … #define WM5100_AIF3_BCLK_FRC_SHIFT … #define WM5100_AIF3_BCLK_FRC_WIDTH … #define WM5100_AIF3_BCLK_MSTR … #define WM5100_AIF3_BCLK_MSTR_MASK … #define WM5100_AIF3_BCLK_MSTR_SHIFT … #define WM5100_AIF3_BCLK_MSTR_WIDTH … #define WM5100_AIF3_BCLK_FREQ_MASK … #define WM5100_AIF3_BCLK_FREQ_SHIFT … #define WM5100_AIF3_BCLK_FREQ_WIDTH … /* * R1409 (0x581) - Audio IF 3_2 */ #define WM5100_AIF3TX_DAT_TRI … #define WM5100_AIF3TX_DAT_TRI_MASK … #define WM5100_AIF3TX_DAT_TRI_SHIFT … #define WM5100_AIF3TX_DAT_TRI_WIDTH … #define WM5100_AIF3TX_LRCLK_SRC … #define WM5100_AIF3TX_LRCLK_SRC_MASK … #define WM5100_AIF3TX_LRCLK_SRC_SHIFT … #define WM5100_AIF3TX_LRCLK_SRC_WIDTH … #define WM5100_AIF3TX_LRCLK_INV … #define WM5100_AIF3TX_LRCLK_INV_MASK … #define WM5100_AIF3TX_LRCLK_INV_SHIFT … #define WM5100_AIF3TX_LRCLK_INV_WIDTH … #define WM5100_AIF3TX_LRCLK_FRC … #define WM5100_AIF3TX_LRCLK_FRC_MASK … #define WM5100_AIF3TX_LRCLK_FRC_SHIFT … #define WM5100_AIF3TX_LRCLK_FRC_WIDTH … #define WM5100_AIF3TX_LRCLK_MSTR … #define WM5100_AIF3TX_LRCLK_MSTR_MASK … #define WM5100_AIF3TX_LRCLK_MSTR_SHIFT … #define WM5100_AIF3TX_LRCLK_MSTR_WIDTH … /* * R1410 (0x582) - Audio IF 3_3 */ #define WM5100_AIF3RX_LRCLK_INV … #define WM5100_AIF3RX_LRCLK_INV_MASK … #define WM5100_AIF3RX_LRCLK_INV_SHIFT … #define WM5100_AIF3RX_LRCLK_INV_WIDTH … #define WM5100_AIF3RX_LRCLK_FRC … #define WM5100_AIF3RX_LRCLK_FRC_MASK … #define WM5100_AIF3RX_LRCLK_FRC_SHIFT … #define WM5100_AIF3RX_LRCLK_FRC_WIDTH … #define WM5100_AIF3RX_LRCLK_MSTR … #define WM5100_AIF3RX_LRCLK_MSTR_MASK … #define WM5100_AIF3RX_LRCLK_MSTR_SHIFT … #define WM5100_AIF3RX_LRCLK_MSTR_WIDTH … /* * R1411 (0x583) - Audio IF 3_4 */ #define WM5100_AIF3_TRI … #define WM5100_AIF3_TRI_MASK … #define WM5100_AIF3_TRI_SHIFT … #define WM5100_AIF3_TRI_WIDTH … #define WM5100_AIF3_RATE_MASK … #define WM5100_AIF3_RATE_SHIFT … #define WM5100_AIF3_RATE_WIDTH … /* * R1412 (0x584) - Audio IF 3_5 */ #define WM5100_AIF3_FMT_MASK … #define WM5100_AIF3_FMT_SHIFT … #define WM5100_AIF3_FMT_WIDTH … /* * R1413 (0x585) - Audio IF 3_6 */ #define WM5100_AIF3TX_BCPF_MASK … #define WM5100_AIF3TX_BCPF_SHIFT … #define WM5100_AIF3TX_BCPF_WIDTH … /* * R1414 (0x586) - Audio IF 3_7 */ #define WM5100_AIF3RX_BCPF_MASK … #define WM5100_AIF3RX_BCPF_SHIFT … #define WM5100_AIF3RX_BCPF_WIDTH … /* * R1415 (0x587) - Audio IF 3_8 */ #define WM5100_AIF3TX_WL_MASK … #define WM5100_AIF3TX_WL_SHIFT … #define WM5100_AIF3TX_WL_WIDTH … #define WM5100_AIF3TX_SLOT_LEN_MASK … #define WM5100_AIF3TX_SLOT_LEN_SHIFT … #define WM5100_AIF3TX_SLOT_LEN_WIDTH … /* * R1416 (0x588) - Audio IF 3_9 */ #define WM5100_AIF3RX_WL_MASK … #define WM5100_AIF3RX_WL_SHIFT … #define WM5100_AIF3RX_WL_WIDTH … #define WM5100_AIF3RX_SLOT_LEN_MASK … #define WM5100_AIF3RX_SLOT_LEN_SHIFT … #define WM5100_AIF3RX_SLOT_LEN_WIDTH … /* * R1417 (0x589) - Audio IF 3_10 */ #define WM5100_AIF3TX1_SLOT_MASK … #define WM5100_AIF3TX1_SLOT_SHIFT … #define WM5100_AIF3TX1_SLOT_WIDTH … /* * R1418 (0x58A) - Audio IF 3_11 */ #define WM5100_AIF3TX2_SLOT_MASK … #define WM5100_AIF3TX2_SLOT_SHIFT … #define WM5100_AIF3TX2_SLOT_WIDTH … /* * R1425 (0x591) - Audio IF 3_18 */ #define WM5100_AIF3RX1_SLOT_MASK … #define WM5100_AIF3RX1_SLOT_SHIFT … #define WM5100_AIF3RX1_SLOT_WIDTH … /* * R1426 (0x592) - Audio IF 3_19 */ #define WM5100_AIF3RX2_SLOT_MASK … #define WM5100_AIF3RX2_SLOT_SHIFT … #define WM5100_AIF3RX2_SLOT_WIDTH … /* * R1433 (0x599) - Audio IF 3_26 */ #define WM5100_AIF3TX2_ENA … #define WM5100_AIF3TX2_ENA_MASK … #define WM5100_AIF3TX2_ENA_SHIFT … #define WM5100_AIF3TX2_ENA_WIDTH … #define WM5100_AIF3TX1_ENA … #define WM5100_AIF3TX1_ENA_MASK … #define WM5100_AIF3TX1_ENA_SHIFT … #define WM5100_AIF3TX1_ENA_WIDTH … /* * R1434 (0x59A) - Audio IF 3_27 */ #define WM5100_AIF3RX2_ENA … #define WM5100_AIF3RX2_ENA_MASK … #define WM5100_AIF3RX2_ENA_SHIFT … #define WM5100_AIF3RX2_ENA_WIDTH … #define WM5100_AIF3RX1_ENA … #define WM5100_AIF3RX1_ENA_MASK … #define WM5100_AIF3RX1_ENA_SHIFT … #define WM5100_AIF3RX1_ENA_WIDTH … #define WM5100_MIXER_VOL_MASK … #define WM5100_MIXER_VOL_SHIFT … #define WM5100_MIXER_VOL_WIDTH … /* * R3072 (0xC00) - GPIO CTRL 1 */ #define WM5100_GP1_DIR … #define WM5100_GP1_DIR_MASK … #define WM5100_GP1_DIR_SHIFT … #define WM5100_GP1_DIR_WIDTH … #define WM5100_GP1_PU … #define WM5100_GP1_PU_MASK … #define WM5100_GP1_PU_SHIFT … #define WM5100_GP1_PU_WIDTH … #define WM5100_GP1_PD … #define WM5100_GP1_PD_MASK … #define WM5100_GP1_PD_SHIFT … #define WM5100_GP1_PD_WIDTH … #define WM5100_GP1_POL … #define WM5100_GP1_POL_MASK … #define WM5100_GP1_POL_SHIFT … #define WM5100_GP1_POL_WIDTH … #define WM5100_GP1_OP_CFG … #define WM5100_GP1_OP_CFG_MASK … #define WM5100_GP1_OP_CFG_SHIFT … #define WM5100_GP1_OP_CFG_WIDTH … #define WM5100_GP1_DB … #define WM5100_GP1_DB_MASK … #define WM5100_GP1_DB_SHIFT … #define WM5100_GP1_DB_WIDTH … #define WM5100_GP1_LVL … #define WM5100_GP1_LVL_MASK … #define WM5100_GP1_LVL_SHIFT … #define WM5100_GP1_LVL_WIDTH … #define WM5100_GP1_FN_MASK … #define WM5100_GP1_FN_SHIFT … #define WM5100_GP1_FN_WIDTH … /* * R3073 (0xC01) - GPIO CTRL 2 */ #define WM5100_GP2_DIR … #define WM5100_GP2_DIR_MASK … #define WM5100_GP2_DIR_SHIFT … #define WM5100_GP2_DIR_WIDTH … #define WM5100_GP2_PU … #define WM5100_GP2_PU_MASK … #define WM5100_GP2_PU_SHIFT … #define WM5100_GP2_PU_WIDTH … #define WM5100_GP2_PD … #define WM5100_GP2_PD_MASK … #define WM5100_GP2_PD_SHIFT … #define WM5100_GP2_PD_WIDTH … #define WM5100_GP2_POL … #define WM5100_GP2_POL_MASK … #define WM5100_GP2_POL_SHIFT … #define WM5100_GP2_POL_WIDTH … #define WM5100_GP2_OP_CFG … #define WM5100_GP2_OP_CFG_MASK … #define WM5100_GP2_OP_CFG_SHIFT … #define WM5100_GP2_OP_CFG_WIDTH … #define WM5100_GP2_DB … #define WM5100_GP2_DB_MASK … #define WM5100_GP2_DB_SHIFT … #define WM5100_GP2_DB_WIDTH … #define WM5100_GP2_LVL … #define WM5100_GP2_LVL_MASK … #define WM5100_GP2_LVL_SHIFT … #define WM5100_GP2_LVL_WIDTH … #define WM5100_GP2_FN_MASK … #define WM5100_GP2_FN_SHIFT … #define WM5100_GP2_FN_WIDTH … /* * R3074 (0xC02) - GPIO CTRL 3 */ #define WM5100_GP3_DIR … #define WM5100_GP3_DIR_MASK … #define WM5100_GP3_DIR_SHIFT … #define WM5100_GP3_DIR_WIDTH … #define WM5100_GP3_PU … #define WM5100_GP3_PU_MASK … #define WM5100_GP3_PU_SHIFT … #define WM5100_GP3_PU_WIDTH … #define WM5100_GP3_PD … #define WM5100_GP3_PD_MASK … #define WM5100_GP3_PD_SHIFT … #define WM5100_GP3_PD_WIDTH … #define WM5100_GP3_POL … #define WM5100_GP3_POL_MASK … #define WM5100_GP3_POL_SHIFT … #define WM5100_GP3_POL_WIDTH … #define WM5100_GP3_OP_CFG … #define WM5100_GP3_OP_CFG_MASK … #define WM5100_GP3_OP_CFG_SHIFT … #define WM5100_GP3_OP_CFG_WIDTH … #define WM5100_GP3_DB … #define WM5100_GP3_DB_MASK … #define WM5100_GP3_DB_SHIFT … #define WM5100_GP3_DB_WIDTH … #define WM5100_GP3_LVL … #define WM5100_GP3_LVL_MASK … #define WM5100_GP3_LVL_SHIFT … #define WM5100_GP3_LVL_WIDTH … #define WM5100_GP3_FN_MASK … #define WM5100_GP3_FN_SHIFT … #define WM5100_GP3_FN_WIDTH … /* * R3075 (0xC03) - GPIO CTRL 4 */ #define WM5100_GP4_DIR … #define WM5100_GP4_DIR_MASK … #define WM5100_GP4_DIR_SHIFT … #define WM5100_GP4_DIR_WIDTH … #define WM5100_GP4_PU … #define WM5100_GP4_PU_MASK … #define WM5100_GP4_PU_SHIFT … #define WM5100_GP4_PU_WIDTH … #define WM5100_GP4_PD … #define WM5100_GP4_PD_MASK … #define WM5100_GP4_PD_SHIFT … #define WM5100_GP4_PD_WIDTH … #define WM5100_GP4_POL … #define WM5100_GP4_POL_MASK … #define WM5100_GP4_POL_SHIFT … #define WM5100_GP4_POL_WIDTH … #define WM5100_GP4_OP_CFG … #define WM5100_GP4_OP_CFG_MASK … #define WM5100_GP4_OP_CFG_SHIFT … #define WM5100_GP4_OP_CFG_WIDTH … #define WM5100_GP4_DB … #define WM5100_GP4_DB_MASK … #define WM5100_GP4_DB_SHIFT … #define WM5100_GP4_DB_WIDTH … #define WM5100_GP4_LVL … #define WM5100_GP4_LVL_MASK … #define WM5100_GP4_LVL_SHIFT … #define WM5100_GP4_LVL_WIDTH … #define WM5100_GP4_FN_MASK … #define WM5100_GP4_FN_SHIFT … #define WM5100_GP4_FN_WIDTH … /* * R3076 (0xC04) - GPIO CTRL 5 */ #define WM5100_GP5_DIR … #define WM5100_GP5_DIR_MASK … #define WM5100_GP5_DIR_SHIFT … #define WM5100_GP5_DIR_WIDTH … #define WM5100_GP5_PU … #define WM5100_GP5_PU_MASK … #define WM5100_GP5_PU_SHIFT … #define WM5100_GP5_PU_WIDTH … #define WM5100_GP5_PD … #define WM5100_GP5_PD_MASK … #define WM5100_GP5_PD_SHIFT … #define WM5100_GP5_PD_WIDTH … #define WM5100_GP5_POL … #define WM5100_GP5_POL_MASK … #define WM5100_GP5_POL_SHIFT … #define WM5100_GP5_POL_WIDTH … #define WM5100_GP5_OP_CFG … #define WM5100_GP5_OP_CFG_MASK … #define WM5100_GP5_OP_CFG_SHIFT … #define WM5100_GP5_OP_CFG_WIDTH … #define WM5100_GP5_DB … #define WM5100_GP5_DB_MASK … #define WM5100_GP5_DB_SHIFT … #define WM5100_GP5_DB_WIDTH … #define WM5100_GP5_LVL … #define WM5100_GP5_LVL_MASK … #define WM5100_GP5_LVL_SHIFT … #define WM5100_GP5_LVL_WIDTH … #define WM5100_GP5_FN_MASK … #define WM5100_GP5_FN_SHIFT … #define WM5100_GP5_FN_WIDTH … /* * R3077 (0xC05) - GPIO CTRL 6 */ #define WM5100_GP6_DIR … #define WM5100_GP6_DIR_MASK … #define WM5100_GP6_DIR_SHIFT … #define WM5100_GP6_DIR_WIDTH … #define WM5100_GP6_PU … #define WM5100_GP6_PU_MASK … #define WM5100_GP6_PU_SHIFT … #define WM5100_GP6_PU_WIDTH … #define WM5100_GP6_PD … #define WM5100_GP6_PD_MASK … #define WM5100_GP6_PD_SHIFT … #define WM5100_GP6_PD_WIDTH … #define WM5100_GP6_POL … #define WM5100_GP6_POL_MASK … #define WM5100_GP6_POL_SHIFT … #define WM5100_GP6_POL_WIDTH … #define WM5100_GP6_OP_CFG … #define WM5100_GP6_OP_CFG_MASK … #define WM5100_GP6_OP_CFG_SHIFT … #define WM5100_GP6_OP_CFG_WIDTH … #define WM5100_GP6_DB … #define WM5100_GP6_DB_MASK … #define WM5100_GP6_DB_SHIFT … #define WM5100_GP6_DB_WIDTH … #define WM5100_GP6_LVL … #define WM5100_GP6_LVL_MASK … #define WM5100_GP6_LVL_SHIFT … #define WM5100_GP6_LVL_WIDTH … #define WM5100_GP6_FN_MASK … #define WM5100_GP6_FN_SHIFT … #define WM5100_GP6_FN_WIDTH … /* * R3107 (0xC23) - Misc Pad Ctrl 1 */ #define WM5100_LDO1ENA_PD … #define WM5100_LDO1ENA_PD_MASK … #define WM5100_LDO1ENA_PD_SHIFT … #define WM5100_LDO1ENA_PD_WIDTH … #define WM5100_MCLK2_PD … #define WM5100_MCLK2_PD_MASK … #define WM5100_MCLK2_PD_SHIFT … #define WM5100_MCLK2_PD_WIDTH … #define WM5100_MCLK1_PD … #define WM5100_MCLK1_PD_MASK … #define WM5100_MCLK1_PD_SHIFT … #define WM5100_MCLK1_PD_WIDTH … #define WM5100_RESET_PU … #define WM5100_RESET_PU_MASK … #define WM5100_RESET_PU_SHIFT … #define WM5100_RESET_PU_WIDTH … #define WM5100_ADDR_PD … #define WM5100_ADDR_PD_MASK … #define WM5100_ADDR_PD_SHIFT … #define WM5100_ADDR_PD_WIDTH … /* * R3108 (0xC24) - Misc Pad Ctrl 2 */ #define WM5100_DMICDAT4_PD … #define WM5100_DMICDAT4_PD_MASK … #define WM5100_DMICDAT4_PD_SHIFT … #define WM5100_DMICDAT4_PD_WIDTH … #define WM5100_DMICDAT3_PD … #define WM5100_DMICDAT3_PD_MASK … #define WM5100_DMICDAT3_PD_SHIFT … #define WM5100_DMICDAT3_PD_WIDTH … #define WM5100_DMICDAT2_PD … #define WM5100_DMICDAT2_PD_MASK … #define WM5100_DMICDAT2_PD_SHIFT … #define WM5100_DMICDAT2_PD_WIDTH … #define WM5100_DMICDAT1_PD … #define WM5100_DMICDAT1_PD_MASK … #define WM5100_DMICDAT1_PD_SHIFT … #define WM5100_DMICDAT1_PD_WIDTH … /* * R3109 (0xC25) - Misc Pad Ctrl 3 */ #define WM5100_AIF1RXLRCLK_PU … #define WM5100_AIF1RXLRCLK_PU_MASK … #define WM5100_AIF1RXLRCLK_PU_SHIFT … #define WM5100_AIF1RXLRCLK_PU_WIDTH … #define WM5100_AIF1RXLRCLK_PD … #define WM5100_AIF1RXLRCLK_PD_MASK … #define WM5100_AIF1RXLRCLK_PD_SHIFT … #define WM5100_AIF1RXLRCLK_PD_WIDTH … #define WM5100_AIF1BCLK_PU … #define WM5100_AIF1BCLK_PU_MASK … #define WM5100_AIF1BCLK_PU_SHIFT … #define WM5100_AIF1BCLK_PU_WIDTH … #define WM5100_AIF1BCLK_PD … #define WM5100_AIF1BCLK_PD_MASK … #define WM5100_AIF1BCLK_PD_SHIFT … #define WM5100_AIF1BCLK_PD_WIDTH … #define WM5100_AIF1RXDAT_PU … #define WM5100_AIF1RXDAT_PU_MASK … #define WM5100_AIF1RXDAT_PU_SHIFT … #define WM5100_AIF1RXDAT_PU_WIDTH … #define WM5100_AIF1RXDAT_PD … #define WM5100_AIF1RXDAT_PD_MASK … #define WM5100_AIF1RXDAT_PD_SHIFT … #define WM5100_AIF1RXDAT_PD_WIDTH … /* * R3110 (0xC26) - Misc Pad Ctrl 4 */ #define WM5100_AIF2RXLRCLK_PU … #define WM5100_AIF2RXLRCLK_PU_MASK … #define WM5100_AIF2RXLRCLK_PU_SHIFT … #define WM5100_AIF2RXLRCLK_PU_WIDTH … #define WM5100_AIF2RXLRCLK_PD … #define WM5100_AIF2RXLRCLK_PD_MASK … #define WM5100_AIF2RXLRCLK_PD_SHIFT … #define WM5100_AIF2RXLRCLK_PD_WIDTH … #define WM5100_AIF2BCLK_PU … #define WM5100_AIF2BCLK_PU_MASK … #define WM5100_AIF2BCLK_PU_SHIFT … #define WM5100_AIF2BCLK_PU_WIDTH … #define WM5100_AIF2BCLK_PD … #define WM5100_AIF2BCLK_PD_MASK … #define WM5100_AIF2BCLK_PD_SHIFT … #define WM5100_AIF2BCLK_PD_WIDTH … #define WM5100_AIF2RXDAT_PU … #define WM5100_AIF2RXDAT_PU_MASK … #define WM5100_AIF2RXDAT_PU_SHIFT … #define WM5100_AIF2RXDAT_PU_WIDTH … #define WM5100_AIF2RXDAT_PD … #define WM5100_AIF2RXDAT_PD_MASK … #define WM5100_AIF2RXDAT_PD_SHIFT … #define WM5100_AIF2RXDAT_PD_WIDTH … /* * R3111 (0xC27) - Misc Pad Ctrl 5 */ #define WM5100_AIF3RXLRCLK_PU … #define WM5100_AIF3RXLRCLK_PU_MASK … #define WM5100_AIF3RXLRCLK_PU_SHIFT … #define WM5100_AIF3RXLRCLK_PU_WIDTH … #define WM5100_AIF3RXLRCLK_PD … #define WM5100_AIF3RXLRCLK_PD_MASK … #define WM5100_AIF3RXLRCLK_PD_SHIFT … #define WM5100_AIF3RXLRCLK_PD_WIDTH … #define WM5100_AIF3BCLK_PU … #define WM5100_AIF3BCLK_PU_MASK … #define WM5100_AIF3BCLK_PU_SHIFT … #define WM5100_AIF3BCLK_PU_WIDTH … #define WM5100_AIF3BCLK_PD … #define WM5100_AIF3BCLK_PD_MASK … #define WM5100_AIF3BCLK_PD_SHIFT … #define WM5100_AIF3BCLK_PD_WIDTH … #define WM5100_AIF3RXDAT_PU … #define WM5100_AIF3RXDAT_PU_MASK … #define WM5100_AIF3RXDAT_PU_SHIFT … #define WM5100_AIF3RXDAT_PU_WIDTH … #define WM5100_AIF3RXDAT_PD … #define WM5100_AIF3RXDAT_PD_MASK … #define WM5100_AIF3RXDAT_PD_SHIFT … #define WM5100_AIF3RXDAT_PD_WIDTH … /* * R3112 (0xC28) - Misc GPIO 1 */ #define WM5100_OPCLK_SEL_MASK … #define WM5100_OPCLK_SEL_SHIFT … #define WM5100_OPCLK_SEL_WIDTH … /* * R3328 (0xD00) - Interrupt Status 1 */ #define WM5100_GP6_EINT … #define WM5100_GP6_EINT_MASK … #define WM5100_GP6_EINT_SHIFT … #define WM5100_GP6_EINT_WIDTH … #define WM5100_GP5_EINT … #define WM5100_GP5_EINT_MASK … #define WM5100_GP5_EINT_SHIFT … #define WM5100_GP5_EINT_WIDTH … #define WM5100_GP4_EINT … #define WM5100_GP4_EINT_MASK … #define WM5100_GP4_EINT_SHIFT … #define WM5100_GP4_EINT_WIDTH … #define WM5100_GP3_EINT … #define WM5100_GP3_EINT_MASK … #define WM5100_GP3_EINT_SHIFT … #define WM5100_GP3_EINT_WIDTH … #define WM5100_GP2_EINT … #define WM5100_GP2_EINT_MASK … #define WM5100_GP2_EINT_SHIFT … #define WM5100_GP2_EINT_WIDTH … #define WM5100_GP1_EINT … #define WM5100_GP1_EINT_MASK … #define WM5100_GP1_EINT_SHIFT … #define WM5100_GP1_EINT_WIDTH … /* * R3329 (0xD01) - Interrupt Status 2 */ #define WM5100_DSP_IRQ6_EINT … #define WM5100_DSP_IRQ6_EINT_MASK … #define WM5100_DSP_IRQ6_EINT_SHIFT … #define WM5100_DSP_IRQ6_EINT_WIDTH … #define WM5100_DSP_IRQ5_EINT … #define WM5100_DSP_IRQ5_EINT_MASK … #define WM5100_DSP_IRQ5_EINT_SHIFT … #define WM5100_DSP_IRQ5_EINT_WIDTH … #define WM5100_DSP_IRQ4_EINT … #define WM5100_DSP_IRQ4_EINT_MASK … #define WM5100_DSP_IRQ4_EINT_SHIFT … #define WM5100_DSP_IRQ4_EINT_WIDTH … #define WM5100_DSP_IRQ3_EINT … #define WM5100_DSP_IRQ3_EINT_MASK … #define WM5100_DSP_IRQ3_EINT_SHIFT … #define WM5100_DSP_IRQ3_EINT_WIDTH … #define WM5100_DSP_IRQ2_EINT … #define WM5100_DSP_IRQ2_EINT_MASK … #define WM5100_DSP_IRQ2_EINT_SHIFT … #define WM5100_DSP_IRQ2_EINT_WIDTH … #define WM5100_DSP_IRQ1_EINT … #define WM5100_DSP_IRQ1_EINT_MASK … #define WM5100_DSP_IRQ1_EINT_SHIFT … #define WM5100_DSP_IRQ1_EINT_WIDTH … /* * R3330 (0xD02) - Interrupt Status 3 */ #define WM5100_SPK_SHUTDOWN_WARN_EINT … #define WM5100_SPK_SHUTDOWN_WARN_EINT_MASK … #define WM5100_SPK_SHUTDOWN_WARN_EINT_SHIFT … #define WM5100_SPK_SHUTDOWN_WARN_EINT_WIDTH … #define WM5100_SPK_SHUTDOWN_EINT … #define WM5100_SPK_SHUTDOWN_EINT_MASK … #define WM5100_SPK_SHUTDOWN_EINT_SHIFT … #define WM5100_SPK_SHUTDOWN_EINT_WIDTH … #define WM5100_HPDET_EINT … #define WM5100_HPDET_EINT_MASK … #define WM5100_HPDET_EINT_SHIFT … #define WM5100_HPDET_EINT_WIDTH … #define WM5100_ACCDET_EINT … #define WM5100_ACCDET_EINT_MASK … #define WM5100_ACCDET_EINT_SHIFT … #define WM5100_ACCDET_EINT_WIDTH … #define WM5100_DRC_SIG_DET_EINT … #define WM5100_DRC_SIG_DET_EINT_MASK … #define WM5100_DRC_SIG_DET_EINT_SHIFT … #define WM5100_DRC_SIG_DET_EINT_WIDTH … #define WM5100_ASRC2_LOCK_EINT … #define WM5100_ASRC2_LOCK_EINT_MASK … #define WM5100_ASRC2_LOCK_EINT_SHIFT … #define WM5100_ASRC2_LOCK_EINT_WIDTH … #define WM5100_ASRC1_LOCK_EINT … #define WM5100_ASRC1_LOCK_EINT_MASK … #define WM5100_ASRC1_LOCK_EINT_SHIFT … #define WM5100_ASRC1_LOCK_EINT_WIDTH … #define WM5100_FLL2_LOCK_EINT … #define WM5100_FLL2_LOCK_EINT_MASK … #define WM5100_FLL2_LOCK_EINT_SHIFT … #define WM5100_FLL2_LOCK_EINT_WIDTH … #define WM5100_FLL1_LOCK_EINT … #define WM5100_FLL1_LOCK_EINT_MASK … #define WM5100_FLL1_LOCK_EINT_SHIFT … #define WM5100_FLL1_LOCK_EINT_WIDTH … #define WM5100_CLKGEN_ERR_EINT … #define WM5100_CLKGEN_ERR_EINT_MASK … #define WM5100_CLKGEN_ERR_EINT_SHIFT … #define WM5100_CLKGEN_ERR_EINT_WIDTH … #define WM5100_CLKGEN_ERR_ASYNC_EINT … #define WM5100_CLKGEN_ERR_ASYNC_EINT_MASK … #define WM5100_CLKGEN_ERR_ASYNC_EINT_SHIFT … #define WM5100_CLKGEN_ERR_ASYNC_EINT_WIDTH … /* * R3331 (0xD03) - Interrupt Status 4 */ #define WM5100_AIF3_ERR_EINT … #define WM5100_AIF3_ERR_EINT_MASK … #define WM5100_AIF3_ERR_EINT_SHIFT … #define WM5100_AIF3_ERR_EINT_WIDTH … #define WM5100_AIF2_ERR_EINT … #define WM5100_AIF2_ERR_EINT_MASK … #define WM5100_AIF2_ERR_EINT_SHIFT … #define WM5100_AIF2_ERR_EINT_WIDTH … #define WM5100_AIF1_ERR_EINT … #define WM5100_AIF1_ERR_EINT_MASK … #define WM5100_AIF1_ERR_EINT_SHIFT … #define WM5100_AIF1_ERR_EINT_WIDTH … #define WM5100_CTRLIF_ERR_EINT … #define WM5100_CTRLIF_ERR_EINT_MASK … #define WM5100_CTRLIF_ERR_EINT_SHIFT … #define WM5100_CTRLIF_ERR_EINT_WIDTH … #define WM5100_ISRC2_UNDERCLOCKED_EINT … #define WM5100_ISRC2_UNDERCLOCKED_EINT_MASK … #define WM5100_ISRC2_UNDERCLOCKED_EINT_SHIFT … #define WM5100_ISRC2_UNDERCLOCKED_EINT_WIDTH … #define WM5100_ISRC1_UNDERCLOCKED_EINT … #define WM5100_ISRC1_UNDERCLOCKED_EINT_MASK … #define WM5100_ISRC1_UNDERCLOCKED_EINT_SHIFT … #define WM5100_ISRC1_UNDERCLOCKED_EINT_WIDTH … #define WM5100_FX_UNDERCLOCKED_EINT … #define WM5100_FX_UNDERCLOCKED_EINT_MASK … #define WM5100_FX_UNDERCLOCKED_EINT_SHIFT … #define WM5100_FX_UNDERCLOCKED_EINT_WIDTH … #define WM5100_AIF3_UNDERCLOCKED_EINT … #define WM5100_AIF3_UNDERCLOCKED_EINT_MASK … #define WM5100_AIF3_UNDERCLOCKED_EINT_SHIFT … #define WM5100_AIF3_UNDERCLOCKED_EINT_WIDTH … #define WM5100_AIF2_UNDERCLOCKED_EINT … #define WM5100_AIF2_UNDERCLOCKED_EINT_MASK … #define WM5100_AIF2_UNDERCLOCKED_EINT_SHIFT … #define WM5100_AIF2_UNDERCLOCKED_EINT_WIDTH … #define WM5100_AIF1_UNDERCLOCKED_EINT … #define WM5100_AIF1_UNDERCLOCKED_EINT_MASK … #define WM5100_AIF1_UNDERCLOCKED_EINT_SHIFT … #define WM5100_AIF1_UNDERCLOCKED_EINT_WIDTH … #define WM5100_ASRC_UNDERCLOCKED_EINT … #define WM5100_ASRC_UNDERCLOCKED_EINT_MASK … #define WM5100_ASRC_UNDERCLOCKED_EINT_SHIFT … #define WM5100_ASRC_UNDERCLOCKED_EINT_WIDTH … #define WM5100_DAC_UNDERCLOCKED_EINT … #define WM5100_DAC_UNDERCLOCKED_EINT_MASK … #define WM5100_DAC_UNDERCLOCKED_EINT_SHIFT … #define WM5100_DAC_UNDERCLOCKED_EINT_WIDTH … #define WM5100_ADC_UNDERCLOCKED_EINT … #define WM5100_ADC_UNDERCLOCKED_EINT_MASK … #define WM5100_ADC_UNDERCLOCKED_EINT_SHIFT … #define WM5100_ADC_UNDERCLOCKED_EINT_WIDTH … #define WM5100_MIXER_UNDERCLOCKED_EINT … #define WM5100_MIXER_UNDERCLOCKED_EINT_MASK … #define WM5100_MIXER_UNDERCLOCKED_EINT_SHIFT … #define WM5100_MIXER_UNDERCLOCKED_EINT_WIDTH … /* * R3332 (0xD04) - Interrupt Raw Status 2 */ #define WM5100_DSP_IRQ6_STS … #define WM5100_DSP_IRQ6_STS_MASK … #define WM5100_DSP_IRQ6_STS_SHIFT … #define WM5100_DSP_IRQ6_STS_WIDTH … #define WM5100_DSP_IRQ5_STS … #define WM5100_DSP_IRQ5_STS_MASK … #define WM5100_DSP_IRQ5_STS_SHIFT … #define WM5100_DSP_IRQ5_STS_WIDTH … #define WM5100_DSP_IRQ4_STS … #define WM5100_DSP_IRQ4_STS_MASK … #define WM5100_DSP_IRQ4_STS_SHIFT … #define WM5100_DSP_IRQ4_STS_WIDTH … #define WM5100_DSP_IRQ3_STS … #define WM5100_DSP_IRQ3_STS_MASK … #define WM5100_DSP_IRQ3_STS_SHIFT … #define WM5100_DSP_IRQ3_STS_WIDTH … #define WM5100_DSP_IRQ2_STS … #define WM5100_DSP_IRQ2_STS_MASK … #define WM5100_DSP_IRQ2_STS_SHIFT … #define WM5100_DSP_IRQ2_STS_WIDTH … #define WM5100_DSP_IRQ1_STS … #define WM5100_DSP_IRQ1_STS_MASK … #define WM5100_DSP_IRQ1_STS_SHIFT … #define WM5100_DSP_IRQ1_STS_WIDTH … /* * R3333 (0xD05) - Interrupt Raw Status 3 */ #define WM5100_SPK_SHUTDOWN_WARN_STS … #define WM5100_SPK_SHUTDOWN_WARN_STS_MASK … #define WM5100_SPK_SHUTDOWN_WARN_STS_SHIFT … #define WM5100_SPK_SHUTDOWN_WARN_STS_WIDTH … #define WM5100_SPK_SHUTDOWN_STS … #define WM5100_SPK_SHUTDOWN_STS_MASK … #define WM5100_SPK_SHUTDOWN_STS_SHIFT … #define WM5100_SPK_SHUTDOWN_STS_WIDTH … #define WM5100_HPDET_STS … #define WM5100_HPDET_STS_MASK … #define WM5100_HPDET_STS_SHIFT … #define WM5100_HPDET_STS_WIDTH … #define WM5100_DRC_SID_DET_STS … #define WM5100_DRC_SID_DET_STS_MASK … #define WM5100_DRC_SID_DET_STS_SHIFT … #define WM5100_DRC_SID_DET_STS_WIDTH … #define WM5100_ASRC2_LOCK_STS … #define WM5100_ASRC2_LOCK_STS_MASK … #define WM5100_ASRC2_LOCK_STS_SHIFT … #define WM5100_ASRC2_LOCK_STS_WIDTH … #define WM5100_ASRC1_LOCK_STS … #define WM5100_ASRC1_LOCK_STS_MASK … #define WM5100_ASRC1_LOCK_STS_SHIFT … #define WM5100_ASRC1_LOCK_STS_WIDTH … #define WM5100_FLL2_LOCK_STS … #define WM5100_FLL2_LOCK_STS_MASK … #define WM5100_FLL2_LOCK_STS_SHIFT … #define WM5100_FLL2_LOCK_STS_WIDTH … #define WM5100_FLL1_LOCK_STS … #define WM5100_FLL1_LOCK_STS_MASK … #define WM5100_FLL1_LOCK_STS_SHIFT … #define WM5100_FLL1_LOCK_STS_WIDTH … #define WM5100_CLKGEN_ERR_STS … #define WM5100_CLKGEN_ERR_STS_MASK … #define WM5100_CLKGEN_ERR_STS_SHIFT … #define WM5100_CLKGEN_ERR_STS_WIDTH … #define WM5100_CLKGEN_ERR_ASYNC_STS … #define WM5100_CLKGEN_ERR_ASYNC_STS_MASK … #define WM5100_CLKGEN_ERR_ASYNC_STS_SHIFT … #define WM5100_CLKGEN_ERR_ASYNC_STS_WIDTH … /* * R3334 (0xD06) - Interrupt Raw Status 4 */ #define WM5100_AIF3_ERR_STS … #define WM5100_AIF3_ERR_STS_MASK … #define WM5100_AIF3_ERR_STS_SHIFT … #define WM5100_AIF3_ERR_STS_WIDTH … #define WM5100_AIF2_ERR_STS … #define WM5100_AIF2_ERR_STS_MASK … #define WM5100_AIF2_ERR_STS_SHIFT … #define WM5100_AIF2_ERR_STS_WIDTH … #define WM5100_AIF1_ERR_STS … #define WM5100_AIF1_ERR_STS_MASK … #define WM5100_AIF1_ERR_STS_SHIFT … #define WM5100_AIF1_ERR_STS_WIDTH … #define WM5100_CTRLIF_ERR_STS … #define WM5100_CTRLIF_ERR_STS_MASK … #define WM5100_CTRLIF_ERR_STS_SHIFT … #define WM5100_CTRLIF_ERR_STS_WIDTH … #define WM5100_ISRC2_UNDERCLOCKED_STS … #define WM5100_ISRC2_UNDERCLOCKED_STS_MASK … #define WM5100_ISRC2_UNDERCLOCKED_STS_SHIFT … #define WM5100_ISRC2_UNDERCLOCKED_STS_WIDTH … #define WM5100_ISRC1_UNDERCLOCKED_STS … #define WM5100_ISRC1_UNDERCLOCKED_STS_MASK … #define WM5100_ISRC1_UNDERCLOCKED_STS_SHIFT … #define WM5100_ISRC1_UNDERCLOCKED_STS_WIDTH … #define WM5100_FX_UNDERCLOCKED_STS … #define WM5100_FX_UNDERCLOCKED_STS_MASK … #define WM5100_FX_UNDERCLOCKED_STS_SHIFT … #define WM5100_FX_UNDERCLOCKED_STS_WIDTH … #define WM5100_AIF3_UNDERCLOCKED_STS … #define WM5100_AIF3_UNDERCLOCKED_STS_MASK … #define WM5100_AIF3_UNDERCLOCKED_STS_SHIFT … #define WM5100_AIF3_UNDERCLOCKED_STS_WIDTH … #define WM5100_AIF2_UNDERCLOCKED_STS … #define WM5100_AIF2_UNDERCLOCKED_STS_MASK … #define WM5100_AIF2_UNDERCLOCKED_STS_SHIFT … #define WM5100_AIF2_UNDERCLOCKED_STS_WIDTH … #define WM5100_AIF1_UNDERCLOCKED_STS … #define WM5100_AIF1_UNDERCLOCKED_STS_MASK … #define WM5100_AIF1_UNDERCLOCKED_STS_SHIFT … #define WM5100_AIF1_UNDERCLOCKED_STS_WIDTH … #define WM5100_ASRC_UNDERCLOCKED_STS … #define WM5100_ASRC_UNDERCLOCKED_STS_MASK … #define WM5100_ASRC_UNDERCLOCKED_STS_SHIFT … #define WM5100_ASRC_UNDERCLOCKED_STS_WIDTH … #define WM5100_DAC_UNDERCLOCKED_STS … #define WM5100_DAC_UNDERCLOCKED_STS_MASK … #define WM5100_DAC_UNDERCLOCKED_STS_SHIFT … #define WM5100_DAC_UNDERCLOCKED_STS_WIDTH … #define WM5100_ADC_UNDERCLOCKED_STS … #define WM5100_ADC_UNDERCLOCKED_STS_MASK … #define WM5100_ADC_UNDERCLOCKED_STS_SHIFT … #define WM5100_ADC_UNDERCLOCKED_STS_WIDTH … #define WM5100_MIXER_UNDERCLOCKED_STS … #define WM5100_MIXER_UNDERCLOCKED_STS_MASK … #define WM5100_MIXER_UNDERCLOCKED_STS_SHIFT … #define WM5100_MIXER_UNDERCLOCKED_STS_WIDTH … /* * R3335 (0xD07) - Interrupt Status 1 Mask */ #define WM5100_IM_GP6_EINT … #define WM5100_IM_GP6_EINT_MASK … #define WM5100_IM_GP6_EINT_SHIFT … #define WM5100_IM_GP6_EINT_WIDTH … #define WM5100_IM_GP5_EINT … #define WM5100_IM_GP5_EINT_MASK … #define WM5100_IM_GP5_EINT_SHIFT … #define WM5100_IM_GP5_EINT_WIDTH … #define WM5100_IM_GP4_EINT … #define WM5100_IM_GP4_EINT_MASK … #define WM5100_IM_GP4_EINT_SHIFT … #define WM5100_IM_GP4_EINT_WIDTH … #define WM5100_IM_GP3_EINT … #define WM5100_IM_GP3_EINT_MASK … #define WM5100_IM_GP3_EINT_SHIFT … #define WM5100_IM_GP3_EINT_WIDTH … #define WM5100_IM_GP2_EINT … #define WM5100_IM_GP2_EINT_MASK … #define WM5100_IM_GP2_EINT_SHIFT … #define WM5100_IM_GP2_EINT_WIDTH … #define WM5100_IM_GP1_EINT … #define WM5100_IM_GP1_EINT_MASK … #define WM5100_IM_GP1_EINT_SHIFT … #define WM5100_IM_GP1_EINT_WIDTH … /* * R3336 (0xD08) - Interrupt Status 2 Mask */ #define WM5100_IM_DSP_IRQ6_EINT … #define WM5100_IM_DSP_IRQ6_EINT_MASK … #define WM5100_IM_DSP_IRQ6_EINT_SHIFT … #define WM5100_IM_DSP_IRQ6_EINT_WIDTH … #define WM5100_IM_DSP_IRQ5_EINT … #define WM5100_IM_DSP_IRQ5_EINT_MASK … #define WM5100_IM_DSP_IRQ5_EINT_SHIFT … #define WM5100_IM_DSP_IRQ5_EINT_WIDTH … #define WM5100_IM_DSP_IRQ4_EINT … #define WM5100_IM_DSP_IRQ4_EINT_MASK … #define WM5100_IM_DSP_IRQ4_EINT_SHIFT … #define WM5100_IM_DSP_IRQ4_EINT_WIDTH … #define WM5100_IM_DSP_IRQ3_EINT … #define WM5100_IM_DSP_IRQ3_EINT_MASK … #define WM5100_IM_DSP_IRQ3_EINT_SHIFT … #define WM5100_IM_DSP_IRQ3_EINT_WIDTH … #define WM5100_IM_DSP_IRQ2_EINT … #define WM5100_IM_DSP_IRQ2_EINT_MASK … #define WM5100_IM_DSP_IRQ2_EINT_SHIFT … #define WM5100_IM_DSP_IRQ2_EINT_WIDTH … #define WM5100_IM_DSP_IRQ1_EINT … #define WM5100_IM_DSP_IRQ1_EINT_MASK … #define WM5100_IM_DSP_IRQ1_EINT_SHIFT … #define WM5100_IM_DSP_IRQ1_EINT_WIDTH … /* * R3337 (0xD09) - Interrupt Status 3 Mask */ #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT … #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT_MASK … #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT_SHIFT … #define WM5100_IM_SPK_SHUTDOWN_WARN_EINT_WIDTH … #define WM5100_IM_SPK_SHUTDOWN_EINT … #define WM5100_IM_SPK_SHUTDOWN_EINT_MASK … #define WM5100_IM_SPK_SHUTDOWN_EINT_SHIFT … #define WM5100_IM_SPK_SHUTDOWN_EINT_WIDTH … #define WM5100_IM_HPDET_EINT … #define WM5100_IM_HPDET_EINT_MASK … #define WM5100_IM_HPDET_EINT_SHIFT … #define WM5100_IM_HPDET_EINT_WIDTH … #define WM5100_IM_ACCDET_EINT … #define WM5100_IM_ACCDET_EINT_MASK … #define WM5100_IM_ACCDET_EINT_SHIFT … #define WM5100_IM_ACCDET_EINT_WIDTH … #define WM5100_IM_DRC_SIG_DET_EINT … #define WM5100_IM_DRC_SIG_DET_EINT_MASK … #define WM5100_IM_DRC_SIG_DET_EINT_SHIFT … #define WM5100_IM_DRC_SIG_DET_EINT_WIDTH … #define WM5100_IM_ASRC2_LOCK_EINT … #define WM5100_IM_ASRC2_LOCK_EINT_MASK … #define WM5100_IM_ASRC2_LOCK_EINT_SHIFT … #define WM5100_IM_ASRC2_LOCK_EINT_WIDTH … #define WM5100_IM_ASRC1_LOCK_EINT … #define WM5100_IM_ASRC1_LOCK_EINT_MASK … #define WM5100_IM_ASRC1_LOCK_EINT_SHIFT … #define WM5100_IM_ASRC1_LOCK_EINT_WIDTH … #define WM5100_IM_FLL2_LOCK_EINT … #define WM5100_IM_FLL2_LOCK_EINT_MASK … #define WM5100_IM_FLL2_LOCK_EINT_SHIFT … #define WM5100_IM_FLL2_LOCK_EINT_WIDTH … #define WM5100_IM_FLL1_LOCK_EINT … #define WM5100_IM_FLL1_LOCK_EINT_MASK … #define WM5100_IM_FLL1_LOCK_EINT_SHIFT … #define WM5100_IM_FLL1_LOCK_EINT_WIDTH … #define WM5100_IM_CLKGEN_ERR_EINT … #define WM5100_IM_CLKGEN_ERR_EINT_MASK … #define WM5100_IM_CLKGEN_ERR_EINT_SHIFT … #define WM5100_IM_CLKGEN_ERR_EINT_WIDTH … #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT … #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT_MASK … #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT_SHIFT … #define WM5100_IM_CLKGEN_ERR_ASYNC_EINT_WIDTH … /* * R3338 (0xD0A) - Interrupt Status 4 Mask */ #define WM5100_IM_AIF3_ERR_EINT … #define WM5100_IM_AIF3_ERR_EINT_MASK … #define WM5100_IM_AIF3_ERR_EINT_SHIFT … #define WM5100_IM_AIF3_ERR_EINT_WIDTH … #define WM5100_IM_AIF2_ERR_EINT … #define WM5100_IM_AIF2_ERR_EINT_MASK … #define WM5100_IM_AIF2_ERR_EINT_SHIFT … #define WM5100_IM_AIF2_ERR_EINT_WIDTH … #define WM5100_IM_AIF1_ERR_EINT … #define WM5100_IM_AIF1_ERR_EINT_MASK … #define WM5100_IM_AIF1_ERR_EINT_SHIFT … #define WM5100_IM_AIF1_ERR_EINT_WIDTH … #define WM5100_IM_CTRLIF_ERR_EINT … #define WM5100_IM_CTRLIF_ERR_EINT_MASK … #define WM5100_IM_CTRLIF_ERR_EINT_SHIFT … #define WM5100_IM_CTRLIF_ERR_EINT_WIDTH … #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT … #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_ISRC2_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT … #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_ISRC1_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_FX_UNDERCLOCKED_EINT … #define WM5100_IM_FX_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_FX_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_FX_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_AIF3_UNDERCLOCKED_EINT … #define WM5100_IM_AIF3_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_AIF3_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_AIF3_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_AIF2_UNDERCLOCKED_EINT … #define WM5100_IM_AIF2_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_AIF2_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_AIF2_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_AIF1_UNDERCLOCKED_EINT … #define WM5100_IM_AIF1_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_AIF1_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_AIF1_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_ASRC_UNDERCLOCKED_EINT … #define WM5100_IM_ASRC_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_ASRC_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_ASRC_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_DAC_UNDERCLOCKED_EINT … #define WM5100_IM_DAC_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_DAC_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_DAC_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_ADC_UNDERCLOCKED_EINT … #define WM5100_IM_ADC_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_ADC_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_ADC_UNDERCLOCKED_EINT_WIDTH … #define WM5100_IM_MIXER_UNDERCLOCKED_EINT … #define WM5100_IM_MIXER_UNDERCLOCKED_EINT_MASK … #define WM5100_IM_MIXER_UNDERCLOCKED_EINT_SHIFT … #define WM5100_IM_MIXER_UNDERCLOCKED_EINT_WIDTH … /* * R3359 (0xD1F) - Interrupt Control */ #define WM5100_IM_IRQ … #define WM5100_IM_IRQ_MASK … #define WM5100_IM_IRQ_SHIFT … #define WM5100_IM_IRQ_WIDTH … /* * R3360 (0xD20) - IRQ Debounce 1 */ #define WM5100_SPK_SHUTDOWN_WARN_DB … #define WM5100_SPK_SHUTDOWN_WARN_DB_MASK … #define WM5100_SPK_SHUTDOWN_WARN_DB_SHIFT … #define WM5100_SPK_SHUTDOWN_WARN_DB_WIDTH … #define WM5100_SPK_SHUTDOWN_DB … #define WM5100_SPK_SHUTDOWN_DB_MASK … #define WM5100_SPK_SHUTDOWN_DB_SHIFT … #define WM5100_SPK_SHUTDOWN_DB_WIDTH … #define WM5100_FLL1_LOCK_IRQ_DB … #define WM5100_FLL1_LOCK_IRQ_DB_MASK … #define WM5100_FLL1_LOCK_IRQ_DB_SHIFT … #define WM5100_FLL1_LOCK_IRQ_DB_WIDTH … #define WM5100_FLL2_LOCK_IRQ_DB … #define WM5100_FLL2_LOCK_IRQ_DB_MASK … #define WM5100_FLL2_LOCK_IRQ_DB_SHIFT … #define WM5100_FLL2_LOCK_IRQ_DB_WIDTH … #define WM5100_CLKGEN_ERR_IRQ_DB … #define WM5100_CLKGEN_ERR_IRQ_DB_MASK … #define WM5100_CLKGEN_ERR_IRQ_DB_SHIFT … #define WM5100_CLKGEN_ERR_IRQ_DB_WIDTH … #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB … #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB_MASK … #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB_SHIFT … #define WM5100_CLKGEN_ERR_ASYNC_IRQ_DB_WIDTH … /* * R3361 (0xD21) - IRQ Debounce 2 */ #define WM5100_AIF_ERR_DB … #define WM5100_AIF_ERR_DB_MASK … #define WM5100_AIF_ERR_DB_SHIFT … #define WM5100_AIF_ERR_DB_WIDTH … /* * R3584 (0xE00) - FX_Ctrl */ #define WM5100_FX_STS_MASK … #define WM5100_FX_STS_SHIFT … #define WM5100_FX_STS_WIDTH … #define WM5100_FX_RATE_MASK … #define WM5100_FX_RATE_SHIFT … #define WM5100_FX_RATE_WIDTH … /* * R3600 (0xE10) - EQ1_1 */ #define WM5100_EQ1_B1_GAIN_MASK … #define WM5100_EQ1_B1_GAIN_SHIFT … #define WM5100_EQ1_B1_GAIN_WIDTH … #define WM5100_EQ1_B2_GAIN_MASK … #define WM5100_EQ1_B2_GAIN_SHIFT … #define WM5100_EQ1_B2_GAIN_WIDTH … #define WM5100_EQ1_B3_GAIN_MASK … #define WM5100_EQ1_B3_GAIN_SHIFT … #define WM5100_EQ1_B3_GAIN_WIDTH … #define WM5100_EQ1_ENA … #define WM5100_EQ1_ENA_MASK … #define WM5100_EQ1_ENA_SHIFT … #define WM5100_EQ1_ENA_WIDTH … /* * R3601 (0xE11) - EQ1_2 */ #define WM5100_EQ1_B4_GAIN_MASK … #define WM5100_EQ1_B4_GAIN_SHIFT … #define WM5100_EQ1_B4_GAIN_WIDTH … #define WM5100_EQ1_B5_GAIN_MASK … #define WM5100_EQ1_B5_GAIN_SHIFT … #define WM5100_EQ1_B5_GAIN_WIDTH … /* * R3602 (0xE12) - EQ1_3 */ #define WM5100_EQ1_B1_A_MASK … #define WM5100_EQ1_B1_A_SHIFT … #define WM5100_EQ1_B1_A_WIDTH … /* * R3603 (0xE13) - EQ1_4 */ #define WM5100_EQ1_B1_B_MASK … #define WM5100_EQ1_B1_B_SHIFT … #define WM5100_EQ1_B1_B_WIDTH … /* * R3604 (0xE14) - EQ1_5 */ #define WM5100_EQ1_B1_PG_MASK … #define WM5100_EQ1_B1_PG_SHIFT … #define WM5100_EQ1_B1_PG_WIDTH … /* * R3605 (0xE15) - EQ1_6 */ #define WM5100_EQ1_B2_A_MASK … #define WM5100_EQ1_B2_A_SHIFT … #define WM5100_EQ1_B2_A_WIDTH … /* * R3606 (0xE16) - EQ1_7 */ #define WM5100_EQ1_B2_B_MASK … #define WM5100_EQ1_B2_B_SHIFT … #define WM5100_EQ1_B2_B_WIDTH … /* * R3607 (0xE17) - EQ1_8 */ #define WM5100_EQ1_B2_C_MASK … #define WM5100_EQ1_B2_C_SHIFT … #define WM5100_EQ1_B2_C_WIDTH … /* * R3608 (0xE18) - EQ1_9 */ #define WM5100_EQ1_B2_PG_MASK … #define WM5100_EQ1_B2_PG_SHIFT … #define WM5100_EQ1_B2_PG_WIDTH … /* * R3609 (0xE19) - EQ1_10 */ #define WM5100_EQ1_B3_A_MASK … #define WM5100_EQ1_B3_A_SHIFT … #define WM5100_EQ1_B3_A_WIDTH … /* * R3610 (0xE1A) - EQ1_11 */ #define WM5100_EQ1_B3_B_MASK … #define WM5100_EQ1_B3_B_SHIFT … #define WM5100_EQ1_B3_B_WIDTH … /* * R3611 (0xE1B) - EQ1_12 */ #define WM5100_EQ1_B3_C_MASK … #define WM5100_EQ1_B3_C_SHIFT … #define WM5100_EQ1_B3_C_WIDTH … /* * R3612 (0xE1C) - EQ1_13 */ #define WM5100_EQ1_B3_PG_MASK … #define WM5100_EQ1_B3_PG_SHIFT … #define WM5100_EQ1_B3_PG_WIDTH … /* * R3613 (0xE1D) - EQ1_14 */ #define WM5100_EQ1_B4_A_MASK … #define WM5100_EQ1_B4_A_SHIFT … #define WM5100_EQ1_B4_A_WIDTH … /* * R3614 (0xE1E) - EQ1_15 */ #define WM5100_EQ1_B4_B_MASK … #define WM5100_EQ1_B4_B_SHIFT … #define WM5100_EQ1_B4_B_WIDTH … /* * R3615 (0xE1F) - EQ1_16 */ #define WM5100_EQ1_B4_C_MASK … #define WM5100_EQ1_B4_C_SHIFT … #define WM5100_EQ1_B4_C_WIDTH … /* * R3616 (0xE20) - EQ1_17 */ #define WM5100_EQ1_B4_PG_MASK … #define WM5100_EQ1_B4_PG_SHIFT … #define WM5100_EQ1_B4_PG_WIDTH … /* * R3617 (0xE21) - EQ1_18 */ #define WM5100_EQ1_B5_A_MASK … #define WM5100_EQ1_B5_A_SHIFT … #define WM5100_EQ1_B5_A_WIDTH … /* * R3618 (0xE22) - EQ1_19 */ #define WM5100_EQ1_B5_B_MASK … #define WM5100_EQ1_B5_B_SHIFT … #define WM5100_EQ1_B5_B_WIDTH … /* * R3619 (0xE23) - EQ1_20 */ #define WM5100_EQ1_B5_PG_MASK … #define WM5100_EQ1_B5_PG_SHIFT … #define WM5100_EQ1_B5_PG_WIDTH … /* * R3622 (0xE26) - EQ2_1 */ #define WM5100_EQ2_B1_GAIN_MASK … #define WM5100_EQ2_B1_GAIN_SHIFT … #define WM5100_EQ2_B1_GAIN_WIDTH … #define WM5100_EQ2_B2_GAIN_MASK … #define WM5100_EQ2_B2_GAIN_SHIFT … #define WM5100_EQ2_B2_GAIN_WIDTH … #define WM5100_EQ2_B3_GAIN_MASK … #define WM5100_EQ2_B3_GAIN_SHIFT … #define WM5100_EQ2_B3_GAIN_WIDTH … #define WM5100_EQ2_ENA … #define WM5100_EQ2_ENA_MASK … #define WM5100_EQ2_ENA_SHIFT … #define WM5100_EQ2_ENA_WIDTH … /* * R3623 (0xE27) - EQ2_2 */ #define WM5100_EQ2_B4_GAIN_MASK … #define WM5100_EQ2_B4_GAIN_SHIFT … #define WM5100_EQ2_B4_GAIN_WIDTH … #define WM5100_EQ2_B5_GAIN_MASK … #define WM5100_EQ2_B5_GAIN_SHIFT … #define WM5100_EQ2_B5_GAIN_WIDTH … /* * R3624 (0xE28) - EQ2_3 */ #define WM5100_EQ2_B1_A_MASK … #define WM5100_EQ2_B1_A_SHIFT … #define WM5100_EQ2_B1_A_WIDTH … /* * R3625 (0xE29) - EQ2_4 */ #define WM5100_EQ2_B1_B_MASK … #define WM5100_EQ2_B1_B_SHIFT … #define WM5100_EQ2_B1_B_WIDTH … /* * R3626 (0xE2A) - EQ2_5 */ #define WM5100_EQ2_B1_PG_MASK … #define WM5100_EQ2_B1_PG_SHIFT … #define WM5100_EQ2_B1_PG_WIDTH … /* * R3627 (0xE2B) - EQ2_6 */ #define WM5100_EQ2_B2_A_MASK … #define WM5100_EQ2_B2_A_SHIFT … #define WM5100_EQ2_B2_A_WIDTH … /* * R3628 (0xE2C) - EQ2_7 */ #define WM5100_EQ2_B2_B_MASK … #define WM5100_EQ2_B2_B_SHIFT … #define WM5100_EQ2_B2_B_WIDTH … /* * R3629 (0xE2D) - EQ2_8 */ #define WM5100_EQ2_B2_C_MASK … #define WM5100_EQ2_B2_C_SHIFT … #define WM5100_EQ2_B2_C_WIDTH … /* * R3630 (0xE2E) - EQ2_9 */ #define WM5100_EQ2_B2_PG_MASK … #define WM5100_EQ2_B2_PG_SHIFT … #define WM5100_EQ2_B2_PG_WIDTH … /* * R3631 (0xE2F) - EQ2_10 */ #define WM5100_EQ2_B3_A_MASK … #define WM5100_EQ2_B3_A_SHIFT … #define WM5100_EQ2_B3_A_WIDTH … /* * R3632 (0xE30) - EQ2_11 */ #define WM5100_EQ2_B3_B_MASK … #define WM5100_EQ2_B3_B_SHIFT … #define WM5100_EQ2_B3_B_WIDTH … /* * R3633 (0xE31) - EQ2_12 */ #define WM5100_EQ2_B3_C_MASK … #define WM5100_EQ2_B3_C_SHIFT … #define WM5100_EQ2_B3_C_WIDTH … /* * R3634 (0xE32) - EQ2_13 */ #define WM5100_EQ2_B3_PG_MASK … #define WM5100_EQ2_B3_PG_SHIFT … #define WM5100_EQ2_B3_PG_WIDTH … /* * R3635 (0xE33) - EQ2_14 */ #define WM5100_EQ2_B4_A_MASK … #define WM5100_EQ2_B4_A_SHIFT … #define WM5100_EQ2_B4_A_WIDTH … /* * R3636 (0xE34) - EQ2_15 */ #define WM5100_EQ2_B4_B_MASK … #define WM5100_EQ2_B4_B_SHIFT … #define WM5100_EQ2_B4_B_WIDTH … /* * R3637 (0xE35) - EQ2_16 */ #define WM5100_EQ2_B4_C_MASK … #define WM5100_EQ2_B4_C_SHIFT … #define WM5100_EQ2_B4_C_WIDTH … /* * R3638 (0xE36) - EQ2_17 */ #define WM5100_EQ2_B4_PG_MASK … #define WM5100_EQ2_B4_PG_SHIFT … #define WM5100_EQ2_B4_PG_WIDTH … /* * R3639 (0xE37) - EQ2_18 */ #define WM5100_EQ2_B5_A_MASK … #define WM5100_EQ2_B5_A_SHIFT … #define WM5100_EQ2_B5_A_WIDTH … /* * R3640 (0xE38) - EQ2_19 */ #define WM5100_EQ2_B5_B_MASK … #define WM5100_EQ2_B5_B_SHIFT … #define WM5100_EQ2_B5_B_WIDTH … /* * R3641 (0xE39) - EQ2_20 */ #define WM5100_EQ2_B5_PG_MASK … #define WM5100_EQ2_B5_PG_SHIFT … #define WM5100_EQ2_B5_PG_WIDTH … /* * R3644 (0xE3C) - EQ3_1 */ #define WM5100_EQ3_B1_GAIN_MASK … #define WM5100_EQ3_B1_GAIN_SHIFT … #define WM5100_EQ3_B1_GAIN_WIDTH … #define WM5100_EQ3_B2_GAIN_MASK … #define WM5100_EQ3_B2_GAIN_SHIFT … #define WM5100_EQ3_B2_GAIN_WIDTH … #define WM5100_EQ3_B3_GAIN_MASK … #define WM5100_EQ3_B3_GAIN_SHIFT … #define WM5100_EQ3_B3_GAIN_WIDTH … #define WM5100_EQ3_ENA … #define WM5100_EQ3_ENA_MASK … #define WM5100_EQ3_ENA_SHIFT … #define WM5100_EQ3_ENA_WIDTH … /* * R3645 (0xE3D) - EQ3_2 */ #define WM5100_EQ3_B4_GAIN_MASK … #define WM5100_EQ3_B4_GAIN_SHIFT … #define WM5100_EQ3_B4_GAIN_WIDTH … #define WM5100_EQ3_B5_GAIN_MASK … #define WM5100_EQ3_B5_GAIN_SHIFT … #define WM5100_EQ3_B5_GAIN_WIDTH … /* * R3646 (0xE3E) - EQ3_3 */ #define WM5100_EQ3_B1_A_MASK … #define WM5100_EQ3_B1_A_SHIFT … #define WM5100_EQ3_B1_A_WIDTH … /* * R3647 (0xE3F) - EQ3_4 */ #define WM5100_EQ3_B1_B_MASK … #define WM5100_EQ3_B1_B_SHIFT … #define WM5100_EQ3_B1_B_WIDTH … /* * R3648 (0xE40) - EQ3_5 */ #define WM5100_EQ3_B1_PG_MASK … #define WM5100_EQ3_B1_PG_SHIFT … #define WM5100_EQ3_B1_PG_WIDTH … /* * R3649 (0xE41) - EQ3_6 */ #define WM5100_EQ3_B2_A_MASK … #define WM5100_EQ3_B2_A_SHIFT … #define WM5100_EQ3_B2_A_WIDTH … /* * R3650 (0xE42) - EQ3_7 */ #define WM5100_EQ3_B2_B_MASK … #define WM5100_EQ3_B2_B_SHIFT … #define WM5100_EQ3_B2_B_WIDTH … /* * R3651 (0xE43) - EQ3_8 */ #define WM5100_EQ3_B2_C_MASK … #define WM5100_EQ3_B2_C_SHIFT … #define WM5100_EQ3_B2_C_WIDTH … /* * R3652 (0xE44) - EQ3_9 */ #define WM5100_EQ3_B2_PG_MASK … #define WM5100_EQ3_B2_PG_SHIFT … #define WM5100_EQ3_B2_PG_WIDTH … /* * R3653 (0xE45) - EQ3_10 */ #define WM5100_EQ3_B3_A_MASK … #define WM5100_EQ3_B3_A_SHIFT … #define WM5100_EQ3_B3_A_WIDTH … /* * R3654 (0xE46) - EQ3_11 */ #define WM5100_EQ3_B3_B_MASK … #define WM5100_EQ3_B3_B_SHIFT … #define WM5100_EQ3_B3_B_WIDTH … /* * R3655 (0xE47) - EQ3_12 */ #define WM5100_EQ3_B3_C_MASK … #define WM5100_EQ3_B3_C_SHIFT … #define WM5100_EQ3_B3_C_WIDTH … /* * R3656 (0xE48) - EQ3_13 */ #define WM5100_EQ3_B3_PG_MASK … #define WM5100_EQ3_B3_PG_SHIFT … #define WM5100_EQ3_B3_PG_WIDTH … /* * R3657 (0xE49) - EQ3_14 */ #define WM5100_EQ3_B4_A_MASK … #define WM5100_EQ3_B4_A_SHIFT … #define WM5100_EQ3_B4_A_WIDTH … /* * R3658 (0xE4A) - EQ3_15 */ #define WM5100_EQ3_B4_B_MASK … #define WM5100_EQ3_B4_B_SHIFT … #define WM5100_EQ3_B4_B_WIDTH … /* * R3659 (0xE4B) - EQ3_16 */ #define WM5100_EQ3_B4_C_MASK … #define WM5100_EQ3_B4_C_SHIFT … #define WM5100_EQ3_B4_C_WIDTH … /* * R3660 (0xE4C) - EQ3_17 */ #define WM5100_EQ3_B4_PG_MASK … #define WM5100_EQ3_B4_PG_SHIFT … #define WM5100_EQ3_B4_PG_WIDTH … /* * R3661 (0xE4D) - EQ3_18 */ #define WM5100_EQ3_B5_A_MASK … #define WM5100_EQ3_B5_A_SHIFT … #define WM5100_EQ3_B5_A_WIDTH … /* * R3662 (0xE4E) - EQ3_19 */ #define WM5100_EQ3_B5_B_MASK … #define WM5100_EQ3_B5_B_SHIFT … #define WM5100_EQ3_B5_B_WIDTH … /* * R3663 (0xE4F) - EQ3_20 */ #define WM5100_EQ3_B5_PG_MASK … #define WM5100_EQ3_B5_PG_SHIFT … #define WM5100_EQ3_B5_PG_WIDTH … /* * R3666 (0xE52) - EQ4_1 */ #define WM5100_EQ4_B1_GAIN_MASK … #define WM5100_EQ4_B1_GAIN_SHIFT … #define WM5100_EQ4_B1_GAIN_WIDTH … #define WM5100_EQ4_B2_GAIN_MASK … #define WM5100_EQ4_B2_GAIN_SHIFT … #define WM5100_EQ4_B2_GAIN_WIDTH … #define WM5100_EQ4_B3_GAIN_MASK … #define WM5100_EQ4_B3_GAIN_SHIFT … #define WM5100_EQ4_B3_GAIN_WIDTH … #define WM5100_EQ4_ENA … #define WM5100_EQ4_ENA_MASK … #define WM5100_EQ4_ENA_SHIFT … #define WM5100_EQ4_ENA_WIDTH … /* * R3667 (0xE53) - EQ4_2 */ #define WM5100_EQ4_B4_GAIN_MASK … #define WM5100_EQ4_B4_GAIN_SHIFT … #define WM5100_EQ4_B4_GAIN_WIDTH … #define WM5100_EQ4_B5_GAIN_MASK … #define WM5100_EQ4_B5_GAIN_SHIFT … #define WM5100_EQ4_B5_GAIN_WIDTH … /* * R3668 (0xE54) - EQ4_3 */ #define WM5100_EQ4_B1_A_MASK … #define WM5100_EQ4_B1_A_SHIFT … #define WM5100_EQ4_B1_A_WIDTH … /* * R3669 (0xE55) - EQ4_4 */ #define WM5100_EQ4_B1_B_MASK … #define WM5100_EQ4_B1_B_SHIFT … #define WM5100_EQ4_B1_B_WIDTH … /* * R3670 (0xE56) - EQ4_5 */ #define WM5100_EQ4_B1_PG_MASK … #define WM5100_EQ4_B1_PG_SHIFT … #define WM5100_EQ4_B1_PG_WIDTH … /* * R3671 (0xE57) - EQ4_6 */ #define WM5100_EQ4_B2_A_MASK … #define WM5100_EQ4_B2_A_SHIFT … #define WM5100_EQ4_B2_A_WIDTH … /* * R3672 (0xE58) - EQ4_7 */ #define WM5100_EQ4_B2_B_MASK … #define WM5100_EQ4_B2_B_SHIFT … #define WM5100_EQ4_B2_B_WIDTH … /* * R3673 (0xE59) - EQ4_8 */ #define WM5100_EQ4_B2_C_MASK … #define WM5100_EQ4_B2_C_SHIFT … #define WM5100_EQ4_B2_C_WIDTH … /* * R3674 (0xE5A) - EQ4_9 */ #define WM5100_EQ4_B2_PG_MASK … #define WM5100_EQ4_B2_PG_SHIFT … #define WM5100_EQ4_B2_PG_WIDTH … /* * R3675 (0xE5B) - EQ4_10 */ #define WM5100_EQ4_B3_A_MASK … #define WM5100_EQ4_B3_A_SHIFT … #define WM5100_EQ4_B3_A_WIDTH … /* * R3676 (0xE5C) - EQ4_11 */ #define WM5100_EQ4_B3_B_MASK … #define WM5100_EQ4_B3_B_SHIFT … #define WM5100_EQ4_B3_B_WIDTH … /* * R3677 (0xE5D) - EQ4_12 */ #define WM5100_EQ4_B3_C_MASK … #define WM5100_EQ4_B3_C_SHIFT … #define WM5100_EQ4_B3_C_WIDTH … /* * R3678 (0xE5E) - EQ4_13 */ #define WM5100_EQ4_B3_PG_MASK … #define WM5100_EQ4_B3_PG_SHIFT … #define WM5100_EQ4_B3_PG_WIDTH … /* * R3679 (0xE5F) - EQ4_14 */ #define WM5100_EQ4_B4_A_MASK … #define WM5100_EQ4_B4_A_SHIFT … #define WM5100_EQ4_B4_A_WIDTH … /* * R3680 (0xE60) - EQ4_15 */ #define WM5100_EQ4_B4_B_MASK … #define WM5100_EQ4_B4_B_SHIFT … #define WM5100_EQ4_B4_B_WIDTH … /* * R3681 (0xE61) - EQ4_16 */ #define WM5100_EQ4_B4_C_MASK … #define WM5100_EQ4_B4_C_SHIFT … #define WM5100_EQ4_B4_C_WIDTH … /* * R3682 (0xE62) - EQ4_17 */ #define WM5100_EQ4_B4_PG_MASK … #define WM5100_EQ4_B4_PG_SHIFT … #define WM5100_EQ4_B4_PG_WIDTH … /* * R3683 (0xE63) - EQ4_18 */ #define WM5100_EQ4_B5_A_MASK … #define WM5100_EQ4_B5_A_SHIFT … #define WM5100_EQ4_B5_A_WIDTH … /* * R3684 (0xE64) - EQ4_19 */ #define WM5100_EQ4_B5_B_MASK … #define WM5100_EQ4_B5_B_SHIFT … #define WM5100_EQ4_B5_B_WIDTH … /* * R3685 (0xE65) - EQ4_20 */ #define WM5100_EQ4_B5_PG_MASK … #define WM5100_EQ4_B5_PG_SHIFT … #define WM5100_EQ4_B5_PG_WIDTH … /* * R3712 (0xE80) - DRC1 ctrl1 */ #define WM5100_DRC_SIG_DET_RMS_MASK … #define WM5100_DRC_SIG_DET_RMS_SHIFT … #define WM5100_DRC_SIG_DET_RMS_WIDTH … #define WM5100_DRC_SIG_DET_PK_MASK … #define WM5100_DRC_SIG_DET_PK_SHIFT … #define WM5100_DRC_SIG_DET_PK_WIDTH … #define WM5100_DRC_NG_ENA … #define WM5100_DRC_NG_ENA_MASK … #define WM5100_DRC_NG_ENA_SHIFT … #define WM5100_DRC_NG_ENA_WIDTH … #define WM5100_DRC_SIG_DET_MODE … #define WM5100_DRC_SIG_DET_MODE_MASK … #define WM5100_DRC_SIG_DET_MODE_SHIFT … #define WM5100_DRC_SIG_DET_MODE_WIDTH … #define WM5100_DRC_SIG_DET … #define WM5100_DRC_SIG_DET_MASK … #define WM5100_DRC_SIG_DET_SHIFT … #define WM5100_DRC_SIG_DET_WIDTH … #define WM5100_DRC_KNEE2_OP_ENA … #define WM5100_DRC_KNEE2_OP_ENA_MASK … #define WM5100_DRC_KNEE2_OP_ENA_SHIFT … #define WM5100_DRC_KNEE2_OP_ENA_WIDTH … #define WM5100_DRC_QR … #define WM5100_DRC_QR_MASK … #define WM5100_DRC_QR_SHIFT … #define WM5100_DRC_QR_WIDTH … #define WM5100_DRC_ANTICLIP … #define WM5100_DRC_ANTICLIP_MASK … #define WM5100_DRC_ANTICLIP_SHIFT … #define WM5100_DRC_ANTICLIP_WIDTH … #define WM5100_DRCL_ENA … #define WM5100_DRCL_ENA_MASK … #define WM5100_DRCL_ENA_SHIFT … #define WM5100_DRCL_ENA_WIDTH … #define WM5100_DRCR_ENA … #define WM5100_DRCR_ENA_MASK … #define WM5100_DRCR_ENA_SHIFT … #define WM5100_DRCR_ENA_WIDTH … /* * R3713 (0xE81) - DRC1 ctrl2 */ #define WM5100_DRC_ATK_MASK … #define WM5100_DRC_ATK_SHIFT … #define WM5100_DRC_ATK_WIDTH … #define WM5100_DRC_DCY_MASK … #define WM5100_DRC_DCY_SHIFT … #define WM5100_DRC_DCY_WIDTH … #define WM5100_DRC_MINGAIN_MASK … #define WM5100_DRC_MINGAIN_SHIFT … #define WM5100_DRC_MINGAIN_WIDTH … #define WM5100_DRC_MAXGAIN_MASK … #define WM5100_DRC_MAXGAIN_SHIFT … #define WM5100_DRC_MAXGAIN_WIDTH … /* * R3714 (0xE82) - DRC1 ctrl3 */ #define WM5100_DRC_NG_MINGAIN_MASK … #define WM5100_DRC_NG_MINGAIN_SHIFT … #define WM5100_DRC_NG_MINGAIN_WIDTH … #define WM5100_DRC_NG_EXP_MASK … #define WM5100_DRC_NG_EXP_SHIFT … #define WM5100_DRC_NG_EXP_WIDTH … #define WM5100_DRC_QR_THR_MASK … #define WM5100_DRC_QR_THR_SHIFT … #define WM5100_DRC_QR_THR_WIDTH … #define WM5100_DRC_QR_DCY_MASK … #define WM5100_DRC_QR_DCY_SHIFT … #define WM5100_DRC_QR_DCY_WIDTH … #define WM5100_DRC_HI_COMP_MASK … #define WM5100_DRC_HI_COMP_SHIFT … #define WM5100_DRC_HI_COMP_WIDTH … #define WM5100_DRC_LO_COMP_MASK … #define WM5100_DRC_LO_COMP_SHIFT … #define WM5100_DRC_LO_COMP_WIDTH … /* * R3715 (0xE83) - DRC1 ctrl4 */ #define WM5100_DRC_KNEE_IP_MASK … #define WM5100_DRC_KNEE_IP_SHIFT … #define WM5100_DRC_KNEE_IP_WIDTH … #define WM5100_DRC_KNEE_OP_MASK … #define WM5100_DRC_KNEE_OP_SHIFT … #define WM5100_DRC_KNEE_OP_WIDTH … /* * R3716 (0xE84) - DRC1 ctrl5 */ #define WM5100_DRC_KNEE2_IP_MASK … #define WM5100_DRC_KNEE2_IP_SHIFT … #define WM5100_DRC_KNEE2_IP_WIDTH … #define WM5100_DRC_KNEE2_OP_MASK … #define WM5100_DRC_KNEE2_OP_SHIFT … #define WM5100_DRC_KNEE2_OP_WIDTH … /* * R3776 (0xEC0) - HPLPF1_1 */ #define WM5100_LHPF1_MODE … #define WM5100_LHPF1_MODE_MASK … #define WM5100_LHPF1_MODE_SHIFT … #define WM5100_LHPF1_MODE_WIDTH … #define WM5100_LHPF1_ENA … #define WM5100_LHPF1_ENA_MASK … #define WM5100_LHPF1_ENA_SHIFT … #define WM5100_LHPF1_ENA_WIDTH … /* * R3777 (0xEC1) - HPLPF1_2 */ #define WM5100_LHPF1_COEFF_MASK … #define WM5100_LHPF1_COEFF_SHIFT … #define WM5100_LHPF1_COEFF_WIDTH … /* * R3780 (0xEC4) - HPLPF2_1 */ #define WM5100_LHPF2_MODE … #define WM5100_LHPF2_MODE_MASK … #define WM5100_LHPF2_MODE_SHIFT … #define WM5100_LHPF2_MODE_WIDTH … #define WM5100_LHPF2_ENA … #define WM5100_LHPF2_ENA_MASK … #define WM5100_LHPF2_ENA_SHIFT … #define WM5100_LHPF2_ENA_WIDTH … /* * R3781 (0xEC5) - HPLPF2_2 */ #define WM5100_LHPF2_COEFF_MASK … #define WM5100_LHPF2_COEFF_SHIFT … #define WM5100_LHPF2_COEFF_WIDTH … /* * R3784 (0xEC8) - HPLPF3_1 */ #define WM5100_LHPF3_MODE … #define WM5100_LHPF3_MODE_MASK … #define WM5100_LHPF3_MODE_SHIFT … #define WM5100_LHPF3_MODE_WIDTH … #define WM5100_LHPF3_ENA … #define WM5100_LHPF3_ENA_MASK … #define WM5100_LHPF3_ENA_SHIFT … #define WM5100_LHPF3_ENA_WIDTH … /* * R3785 (0xEC9) - HPLPF3_2 */ #define WM5100_LHPF3_COEFF_MASK … #define WM5100_LHPF3_COEFF_SHIFT … #define WM5100_LHPF3_COEFF_WIDTH … /* * R3788 (0xECC) - HPLPF4_1 */ #define WM5100_LHPF4_MODE … #define WM5100_LHPF4_MODE_MASK … #define WM5100_LHPF4_MODE_SHIFT … #define WM5100_LHPF4_MODE_WIDTH … #define WM5100_LHPF4_ENA … #define WM5100_LHPF4_ENA_MASK … #define WM5100_LHPF4_ENA_SHIFT … #define WM5100_LHPF4_ENA_WIDTH … /* * R3789 (0xECD) - HPLPF4_2 */ #define WM5100_LHPF4_COEFF_MASK … #define WM5100_LHPF4_COEFF_SHIFT … #define WM5100_LHPF4_COEFF_WIDTH … /* * R4132 (0x1024) - DSP2 Control 30 */ #define WM5100_DSP2_RATE_MASK … #define WM5100_DSP2_RATE_SHIFT … #define WM5100_DSP2_RATE_WIDTH … #define WM5100_DSP2_DBG_CLK_ENA … #define WM5100_DSP2_DBG_CLK_ENA_MASK … #define WM5100_DSP2_DBG_CLK_ENA_SHIFT … #define WM5100_DSP2_DBG_CLK_ENA_WIDTH … #define WM5100_DSP2_SYS_ENA … #define WM5100_DSP2_SYS_ENA_MASK … #define WM5100_DSP2_SYS_ENA_SHIFT … #define WM5100_DSP2_SYS_ENA_WIDTH … #define WM5100_DSP2_CORE_ENA … #define WM5100_DSP2_CORE_ENA_MASK … #define WM5100_DSP2_CORE_ENA_SHIFT … #define WM5100_DSP2_CORE_ENA_WIDTH … #define WM5100_DSP2_START … #define WM5100_DSP2_START_MASK … #define WM5100_DSP2_START_SHIFT … #define WM5100_DSP2_START_WIDTH … /* * R3876 (0xF24) - DSP1 Control 30 */ #define WM5100_DSP1_RATE_MASK … #define WM5100_DSP1_RATE_SHIFT … #define WM5100_DSP1_RATE_WIDTH … #define WM5100_DSP1_DBG_CLK_ENA … #define WM5100_DSP1_DBG_CLK_ENA_MASK … #define WM5100_DSP1_DBG_CLK_ENA_SHIFT … #define WM5100_DSP1_DBG_CLK_ENA_WIDTH … #define WM5100_DSP1_SYS_ENA … #define WM5100_DSP1_SYS_ENA_MASK … #define WM5100_DSP1_SYS_ENA_SHIFT … #define WM5100_DSP1_SYS_ENA_WIDTH … #define WM5100_DSP1_CORE_ENA … #define WM5100_DSP1_CORE_ENA_MASK … #define WM5100_DSP1_CORE_ENA_SHIFT … #define WM5100_DSP1_CORE_ENA_WIDTH … #define WM5100_DSP1_START … #define WM5100_DSP1_START_MASK … #define WM5100_DSP1_START_SHIFT … #define WM5100_DSP1_START_WIDTH … /* * R4388 (0x1124) - DSP3 Control 30 */ #define WM5100_DSP3_RATE_MASK … #define WM5100_DSP3_RATE_SHIFT … #define WM5100_DSP3_RATE_WIDTH … #define WM5100_DSP3_DBG_CLK_ENA … #define WM5100_DSP3_DBG_CLK_ENA_MASK … #define WM5100_DSP3_DBG_CLK_ENA_SHIFT … #define WM5100_DSP3_DBG_CLK_ENA_WIDTH … #define WM5100_DSP3_SYS_ENA … #define WM5100_DSP3_SYS_ENA_MASK … #define WM5100_DSP3_SYS_ENA_SHIFT … #define WM5100_DSP3_SYS_ENA_WIDTH … #define WM5100_DSP3_CORE_ENA … #define WM5100_DSP3_CORE_ENA_MASK … #define WM5100_DSP3_CORE_ENA_SHIFT … #define WM5100_DSP3_CORE_ENA_WIDTH … #define WM5100_DSP3_START … #define WM5100_DSP3_START_MASK … #define WM5100_DSP3_START_SHIFT … #define WM5100_DSP3_START_WIDTH … /* * R16384 (0x4000) - DSP1 DM 0 */ #define WM5100_DSP1_DM_START_1_MASK … #define WM5100_DSP1_DM_START_1_SHIFT … #define WM5100_DSP1_DM_START_1_WIDTH … /* * R16385 (0x4001) - DSP1 DM 1 */ #define WM5100_DSP1_DM_START_MASK … #define WM5100_DSP1_DM_START_SHIFT … #define WM5100_DSP1_DM_START_WIDTH … /* * R16386 (0x4002) - DSP1 DM 2 */ #define WM5100_DSP1_DM_1_1_MASK … #define WM5100_DSP1_DM_1_1_SHIFT … #define WM5100_DSP1_DM_1_1_WIDTH … /* * R16387 (0x4003) - DSP1 DM 3 */ #define WM5100_DSP1_DM_1_MASK … #define WM5100_DSP1_DM_1_SHIFT … #define WM5100_DSP1_DM_1_WIDTH … /* * R16892 (0x41FC) - DSP1 DM 508 */ #define WM5100_DSP1_DM_254_1_MASK … #define WM5100_DSP1_DM_254_1_SHIFT … #define WM5100_DSP1_DM_254_1_WIDTH … /* * R16893 (0x41FD) - DSP1 DM 509 */ #define WM5100_DSP1_DM_254_MASK … #define WM5100_DSP1_DM_254_SHIFT … #define WM5100_DSP1_DM_254_WIDTH … /* * R16894 (0x41FE) - DSP1 DM 510 */ #define WM5100_DSP1_DM_END_1_MASK … #define WM5100_DSP1_DM_END_1_SHIFT … #define WM5100_DSP1_DM_END_1_WIDTH … /* * R16895 (0x41FF) - DSP1 DM 511 */ #define WM5100_DSP1_DM_END_MASK … #define WM5100_DSP1_DM_END_SHIFT … #define WM5100_DSP1_DM_END_WIDTH … /* * R18432 (0x4800) - DSP1 PM 0 */ #define WM5100_DSP1_PM_START_2_MASK … #define WM5100_DSP1_PM_START_2_SHIFT … #define WM5100_DSP1_PM_START_2_WIDTH … /* * R18433 (0x4801) - DSP1 PM 1 */ #define WM5100_DSP1_PM_START_1_MASK … #define WM5100_DSP1_PM_START_1_SHIFT … #define WM5100_DSP1_PM_START_1_WIDTH … /* * R18434 (0x4802) - DSP1 PM 2 */ #define WM5100_DSP1_PM_START_MASK … #define WM5100_DSP1_PM_START_SHIFT … #define WM5100_DSP1_PM_START_WIDTH … /* * R18435 (0x4803) - DSP1 PM 3 */ #define WM5100_DSP1_PM_1_2_MASK … #define WM5100_DSP1_PM_1_2_SHIFT … #define WM5100_DSP1_PM_1_2_WIDTH … /* * R18436 (0x4804) - DSP1 PM 4 */ #define WM5100_DSP1_PM_1_1_MASK … #define WM5100_DSP1_PM_1_1_SHIFT … #define WM5100_DSP1_PM_1_1_WIDTH … /* * R18437 (0x4805) - DSP1 PM 5 */ #define WM5100_DSP1_PM_1_MASK … #define WM5100_DSP1_PM_1_SHIFT … #define WM5100_DSP1_PM_1_WIDTH … /* * R19962 (0x4DFA) - DSP1 PM 1530 */ #define WM5100_DSP1_PM_510_2_MASK … #define WM5100_DSP1_PM_510_2_SHIFT … #define WM5100_DSP1_PM_510_2_WIDTH … /* * R19963 (0x4DFB) - DSP1 PM 1531 */ #define WM5100_DSP1_PM_510_1_MASK … #define WM5100_DSP1_PM_510_1_SHIFT … #define WM5100_DSP1_PM_510_1_WIDTH … /* * R19964 (0x4DFC) - DSP1 PM 1532 */ #define WM5100_DSP1_PM_510_MASK … #define WM5100_DSP1_PM_510_SHIFT … #define WM5100_DSP1_PM_510_WIDTH … /* * R19965 (0x4DFD) - DSP1 PM 1533 */ #define WM5100_DSP1_PM_END_2_MASK … #define WM5100_DSP1_PM_END_2_SHIFT … #define WM5100_DSP1_PM_END_2_WIDTH … /* * R19966 (0x4DFE) - DSP1 PM 1534 */ #define WM5100_DSP1_PM_END_1_MASK … #define WM5100_DSP1_PM_END_1_SHIFT … #define WM5100_DSP1_PM_END_1_WIDTH … /* * R19967 (0x4DFF) - DSP1 PM 1535 */ #define WM5100_DSP1_PM_END_MASK … #define WM5100_DSP1_PM_END_SHIFT … #define WM5100_DSP1_PM_END_WIDTH … /* * R20480 (0x5000) - DSP1 ZM 0 */ #define WM5100_DSP1_ZM_START_1_MASK … #define WM5100_DSP1_ZM_START_1_SHIFT … #define WM5100_DSP1_ZM_START_1_WIDTH … /* * R20481 (0x5001) - DSP1 ZM 1 */ #define WM5100_DSP1_ZM_START_MASK … #define WM5100_DSP1_ZM_START_SHIFT … #define WM5100_DSP1_ZM_START_WIDTH … /* * R20482 (0x5002) - DSP1 ZM 2 */ #define WM5100_DSP1_ZM_1_1_MASK … #define WM5100_DSP1_ZM_1_1_SHIFT … #define WM5100_DSP1_ZM_1_1_WIDTH … /* * R20483 (0x5003) - DSP1 ZM 3 */ #define WM5100_DSP1_ZM_1_MASK … #define WM5100_DSP1_ZM_1_SHIFT … #define WM5100_DSP1_ZM_1_WIDTH … /* * R22524 (0x57FC) - DSP1 ZM 2044 */ #define WM5100_DSP1_ZM_1022_1_MASK … #define WM5100_DSP1_ZM_1022_1_SHIFT … #define WM5100_DSP1_ZM_1022_1_WIDTH … /* * R22525 (0x57FD) - DSP1 ZM 2045 */ #define WM5100_DSP1_ZM_1022_MASK … #define WM5100_DSP1_ZM_1022_SHIFT … #define WM5100_DSP1_ZM_1022_WIDTH … /* * R22526 (0x57FE) - DSP1 ZM 2046 */ #define WM5100_DSP1_ZM_END_1_MASK … #define WM5100_DSP1_ZM_END_1_SHIFT … #define WM5100_DSP1_ZM_END_1_WIDTH … /* * R22527 (0x57FF) - DSP1 ZM 2047 */ #define WM5100_DSP1_ZM_END_MASK … #define WM5100_DSP1_ZM_END_SHIFT … #define WM5100_DSP1_ZM_END_WIDTH … /* * R24576 (0x6000) - DSP2 DM 0 */ #define WM5100_DSP2_DM_START_1_MASK … #define WM5100_DSP2_DM_START_1_SHIFT … #define WM5100_DSP2_DM_START_1_WIDTH … /* * R24577 (0x6001) - DSP2 DM 1 */ #define WM5100_DSP2_DM_START_MASK … #define WM5100_DSP2_DM_START_SHIFT … #define WM5100_DSP2_DM_START_WIDTH … /* * R24578 (0x6002) - DSP2 DM 2 */ #define WM5100_DSP2_DM_1_1_MASK … #define WM5100_DSP2_DM_1_1_SHIFT … #define WM5100_DSP2_DM_1_1_WIDTH … /* * R24579 (0x6003) - DSP2 DM 3 */ #define WM5100_DSP2_DM_1_MASK … #define WM5100_DSP2_DM_1_SHIFT … #define WM5100_DSP2_DM_1_WIDTH … /* * R25084 (0x61FC) - DSP2 DM 508 */ #define WM5100_DSP2_DM_254_1_MASK … #define WM5100_DSP2_DM_254_1_SHIFT … #define WM5100_DSP2_DM_254_1_WIDTH … /* * R25085 (0x61FD) - DSP2 DM 509 */ #define WM5100_DSP2_DM_254_MASK … #define WM5100_DSP2_DM_254_SHIFT … #define WM5100_DSP2_DM_254_WIDTH … /* * R25086 (0x61FE) - DSP2 DM 510 */ #define WM5100_DSP2_DM_END_1_MASK … #define WM5100_DSP2_DM_END_1_SHIFT … #define WM5100_DSP2_DM_END_1_WIDTH … /* * R25087 (0x61FF) - DSP2 DM 511 */ #define WM5100_DSP2_DM_END_MASK … #define WM5100_DSP2_DM_END_SHIFT … #define WM5100_DSP2_DM_END_WIDTH … /* * R26624 (0x6800) - DSP2 PM 0 */ #define WM5100_DSP2_PM_START_2_MASK … #define WM5100_DSP2_PM_START_2_SHIFT … #define WM5100_DSP2_PM_START_2_WIDTH … /* * R26625 (0x6801) - DSP2 PM 1 */ #define WM5100_DSP2_PM_START_1_MASK … #define WM5100_DSP2_PM_START_1_SHIFT … #define WM5100_DSP2_PM_START_1_WIDTH … /* * R26626 (0x6802) - DSP2 PM 2 */ #define WM5100_DSP2_PM_START_MASK … #define WM5100_DSP2_PM_START_SHIFT … #define WM5100_DSP2_PM_START_WIDTH … /* * R26627 (0x6803) - DSP2 PM 3 */ #define WM5100_DSP2_PM_1_2_MASK … #define WM5100_DSP2_PM_1_2_SHIFT … #define WM5100_DSP2_PM_1_2_WIDTH … /* * R26628 (0x6804) - DSP2 PM 4 */ #define WM5100_DSP2_PM_1_1_MASK … #define WM5100_DSP2_PM_1_1_SHIFT … #define WM5100_DSP2_PM_1_1_WIDTH … /* * R26629 (0x6805) - DSP2 PM 5 */ #define WM5100_DSP2_PM_1_MASK … #define WM5100_DSP2_PM_1_SHIFT … #define WM5100_DSP2_PM_1_WIDTH … /* * R28154 (0x6DFA) - DSP2 PM 1530 */ #define WM5100_DSP2_PM_510_2_MASK … #define WM5100_DSP2_PM_510_2_SHIFT … #define WM5100_DSP2_PM_510_2_WIDTH … /* * R28155 (0x6DFB) - DSP2 PM 1531 */ #define WM5100_DSP2_PM_510_1_MASK … #define WM5100_DSP2_PM_510_1_SHIFT … #define WM5100_DSP2_PM_510_1_WIDTH … /* * R28156 (0x6DFC) - DSP2 PM 1532 */ #define WM5100_DSP2_PM_510_MASK … #define WM5100_DSP2_PM_510_SHIFT … #define WM5100_DSP2_PM_510_WIDTH … /* * R28157 (0x6DFD) - DSP2 PM 1533 */ #define WM5100_DSP2_PM_END_2_MASK … #define WM5100_DSP2_PM_END_2_SHIFT … #define WM5100_DSP2_PM_END_2_WIDTH … /* * R28158 (0x6DFE) - DSP2 PM 1534 */ #define WM5100_DSP2_PM_END_1_MASK … #define WM5100_DSP2_PM_END_1_SHIFT … #define WM5100_DSP2_PM_END_1_WIDTH … /* * R28159 (0x6DFF) - DSP2 PM 1535 */ #define WM5100_DSP2_PM_END_MASK … #define WM5100_DSP2_PM_END_SHIFT … #define WM5100_DSP2_PM_END_WIDTH … /* * R28672 (0x7000) - DSP2 ZM 0 */ #define WM5100_DSP2_ZM_START_1_MASK … #define WM5100_DSP2_ZM_START_1_SHIFT … #define WM5100_DSP2_ZM_START_1_WIDTH … /* * R28673 (0x7001) - DSP2 ZM 1 */ #define WM5100_DSP2_ZM_START_MASK … #define WM5100_DSP2_ZM_START_SHIFT … #define WM5100_DSP2_ZM_START_WIDTH … /* * R28674 (0x7002) - DSP2 ZM 2 */ #define WM5100_DSP2_ZM_1_1_MASK … #define WM5100_DSP2_ZM_1_1_SHIFT … #define WM5100_DSP2_ZM_1_1_WIDTH … /* * R28675 (0x7003) - DSP2 ZM 3 */ #define WM5100_DSP2_ZM_1_MASK … #define WM5100_DSP2_ZM_1_SHIFT … #define WM5100_DSP2_ZM_1_WIDTH … /* * R30716 (0x77FC) - DSP2 ZM 2044 */ #define WM5100_DSP2_ZM_1022_1_MASK … #define WM5100_DSP2_ZM_1022_1_SHIFT … #define WM5100_DSP2_ZM_1022_1_WIDTH … /* * R30717 (0x77FD) - DSP2 ZM 2045 */ #define WM5100_DSP2_ZM_1022_MASK … #define WM5100_DSP2_ZM_1022_SHIFT … #define WM5100_DSP2_ZM_1022_WIDTH … /* * R30718 (0x77FE) - DSP2 ZM 2046 */ #define WM5100_DSP2_ZM_END_1_MASK … #define WM5100_DSP2_ZM_END_1_SHIFT … #define WM5100_DSP2_ZM_END_1_WIDTH … /* * R30719 (0x77FF) - DSP2 ZM 2047 */ #define WM5100_DSP2_ZM_END_MASK … #define WM5100_DSP2_ZM_END_SHIFT … #define WM5100_DSP2_ZM_END_WIDTH … /* * R32768 (0x8000) - DSP3 DM 0 */ #define WM5100_DSP3_DM_START_1_MASK … #define WM5100_DSP3_DM_START_1_SHIFT … #define WM5100_DSP3_DM_START_1_WIDTH … /* * R32769 (0x8001) - DSP3 DM 1 */ #define WM5100_DSP3_DM_START_MASK … #define WM5100_DSP3_DM_START_SHIFT … #define WM5100_DSP3_DM_START_WIDTH … /* * R32770 (0x8002) - DSP3 DM 2 */ #define WM5100_DSP3_DM_1_1_MASK … #define WM5100_DSP3_DM_1_1_SHIFT … #define WM5100_DSP3_DM_1_1_WIDTH … /* * R32771 (0x8003) - DSP3 DM 3 */ #define WM5100_DSP3_DM_1_MASK … #define WM5100_DSP3_DM_1_SHIFT … #define WM5100_DSP3_DM_1_WIDTH … /* * R33276 (0x81FC) - DSP3 DM 508 */ #define WM5100_DSP3_DM_254_1_MASK … #define WM5100_DSP3_DM_254_1_SHIFT … #define WM5100_DSP3_DM_254_1_WIDTH … /* * R33277 (0x81FD) - DSP3 DM 509 */ #define WM5100_DSP3_DM_254_MASK … #define WM5100_DSP3_DM_254_SHIFT … #define WM5100_DSP3_DM_254_WIDTH … /* * R33278 (0x81FE) - DSP3 DM 510 */ #define WM5100_DSP3_DM_END_1_MASK … #define WM5100_DSP3_DM_END_1_SHIFT … #define WM5100_DSP3_DM_END_1_WIDTH … /* * R33279 (0x81FF) - DSP3 DM 511 */ #define WM5100_DSP3_DM_END_MASK … #define WM5100_DSP3_DM_END_SHIFT … #define WM5100_DSP3_DM_END_WIDTH … /* * R34816 (0x8800) - DSP3 PM 0 */ #define WM5100_DSP3_PM_START_2_MASK … #define WM5100_DSP3_PM_START_2_SHIFT … #define WM5100_DSP3_PM_START_2_WIDTH … /* * R34817 (0x8801) - DSP3 PM 1 */ #define WM5100_DSP3_PM_START_1_MASK … #define WM5100_DSP3_PM_START_1_SHIFT … #define WM5100_DSP3_PM_START_1_WIDTH … /* * R34818 (0x8802) - DSP3 PM 2 */ #define WM5100_DSP3_PM_START_MASK … #define WM5100_DSP3_PM_START_SHIFT … #define WM5100_DSP3_PM_START_WIDTH … /* * R34819 (0x8803) - DSP3 PM 3 */ #define WM5100_DSP3_PM_1_2_MASK … #define WM5100_DSP3_PM_1_2_SHIFT … #define WM5100_DSP3_PM_1_2_WIDTH … /* * R34820 (0x8804) - DSP3 PM 4 */ #define WM5100_DSP3_PM_1_1_MASK … #define WM5100_DSP3_PM_1_1_SHIFT … #define WM5100_DSP3_PM_1_1_WIDTH … /* * R34821 (0x8805) - DSP3 PM 5 */ #define WM5100_DSP3_PM_1_MASK … #define WM5100_DSP3_PM_1_SHIFT … #define WM5100_DSP3_PM_1_WIDTH … /* * R36346 (0x8DFA) - DSP3 PM 1530 */ #define WM5100_DSP3_PM_510_2_MASK … #define WM5100_DSP3_PM_510_2_SHIFT … #define WM5100_DSP3_PM_510_2_WIDTH … /* * R36347 (0x8DFB) - DSP3 PM 1531 */ #define WM5100_DSP3_PM_510_1_MASK … #define WM5100_DSP3_PM_510_1_SHIFT … #define WM5100_DSP3_PM_510_1_WIDTH … /* * R36348 (0x8DFC) - DSP3 PM 1532 */ #define WM5100_DSP3_PM_510_MASK … #define WM5100_DSP3_PM_510_SHIFT … #define WM5100_DSP3_PM_510_WIDTH … /* * R36349 (0x8DFD) - DSP3 PM 1533 */ #define WM5100_DSP3_PM_END_2_MASK … #define WM5100_DSP3_PM_END_2_SHIFT … #define WM5100_DSP3_PM_END_2_WIDTH … /* * R36350 (0x8DFE) - DSP3 PM 1534 */ #define WM5100_DSP3_PM_END_1_MASK … #define WM5100_DSP3_PM_END_1_SHIFT … #define WM5100_DSP3_PM_END_1_WIDTH … /* * R36351 (0x8DFF) - DSP3 PM 1535 */ #define WM5100_DSP3_PM_END_MASK … #define WM5100_DSP3_PM_END_SHIFT … #define WM5100_DSP3_PM_END_WIDTH … /* * R36864 (0x9000) - DSP3 ZM 0 */ #define WM5100_DSP3_ZM_START_1_MASK … #define WM5100_DSP3_ZM_START_1_SHIFT … #define WM5100_DSP3_ZM_START_1_WIDTH … /* * R36865 (0x9001) - DSP3 ZM 1 */ #define WM5100_DSP3_ZM_START_MASK … #define WM5100_DSP3_ZM_START_SHIFT … #define WM5100_DSP3_ZM_START_WIDTH … /* * R36866 (0x9002) - DSP3 ZM 2 */ #define WM5100_DSP3_ZM_1_1_MASK … #define WM5100_DSP3_ZM_1_1_SHIFT … #define WM5100_DSP3_ZM_1_1_WIDTH … /* * R36867 (0x9003) - DSP3 ZM 3 */ #define WM5100_DSP3_ZM_1_MASK … #define WM5100_DSP3_ZM_1_SHIFT … #define WM5100_DSP3_ZM_1_WIDTH … /* * R38908 (0x97FC) - DSP3 ZM 2044 */ #define WM5100_DSP3_ZM_1022_1_MASK … #define WM5100_DSP3_ZM_1022_1_SHIFT … #define WM5100_DSP3_ZM_1022_1_WIDTH … /* * R38909 (0x97FD) - DSP3 ZM 2045 */ #define WM5100_DSP3_ZM_1022_MASK … #define WM5100_DSP3_ZM_1022_SHIFT … #define WM5100_DSP3_ZM_1022_WIDTH … /* * R38910 (0x97FE) - DSP3 ZM 2046 */ #define WM5100_DSP3_ZM_END_1_MASK … #define WM5100_DSP3_ZM_END_1_SHIFT … #define WM5100_DSP3_ZM_END_1_WIDTH … /* * R38911 (0x97FF) - DSP3 ZM 2047 */ #define WM5100_DSP3_ZM_END_MASK … #define WM5100_DSP3_ZM_END_SHIFT … #define WM5100_DSP3_ZM_END_WIDTH … bool wm5100_readable_register(struct device *dev, unsigned int reg); bool wm5100_volatile_register(struct device *dev, unsigned int reg); extern struct reg_default wm5100_reg_defaults[WM5100_REGISTER_COUNT]; #endif
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