/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * wm8996.h - WM8996 audio codec interface * * Copyright 2011 Wolfson Microelectronics PLC. * Author: Mark Brown <[email protected]> */ #ifndef _WM8996_H #define _WM8996_H #define WM8996_SYSCLK_MCLK1 … #define WM8996_SYSCLK_MCLK2 … #define WM8996_SYSCLK_FLL … #define WM8996_FLL_MCLK1 … #define WM8996_FLL_MCLK2 … #define WM8996_FLL_DACLRCLK1 … #define WM8996_FLL_BCLK1 … wm8996_polarity_fn; int wm8996_detect(struct snd_soc_component *component, struct snd_soc_jack *jack, wm8996_polarity_fn polarity_cb); /* * Register values. */ #define WM8996_SOFTWARE_RESET … #define WM8996_POWER_MANAGEMENT_1 … #define WM8996_POWER_MANAGEMENT_2 … #define WM8996_POWER_MANAGEMENT_3 … #define WM8996_POWER_MANAGEMENT_4 … #define WM8996_POWER_MANAGEMENT_5 … #define WM8996_POWER_MANAGEMENT_6 … #define WM8996_POWER_MANAGEMENT_7 … #define WM8996_POWER_MANAGEMENT_8 … #define WM8996_LEFT_LINE_INPUT_VOLUME … #define WM8996_RIGHT_LINE_INPUT_VOLUME … #define WM8996_LINE_INPUT_CONTROL … #define WM8996_DAC1_HPOUT1_VOLUME … #define WM8996_DAC2_HPOUT2_VOLUME … #define WM8996_DAC1_LEFT_VOLUME … #define WM8996_DAC1_RIGHT_VOLUME … #define WM8996_DAC2_LEFT_VOLUME … #define WM8996_DAC2_RIGHT_VOLUME … #define WM8996_OUTPUT1_LEFT_VOLUME … #define WM8996_OUTPUT1_RIGHT_VOLUME … #define WM8996_OUTPUT2_LEFT_VOLUME … #define WM8996_OUTPUT2_RIGHT_VOLUME … #define WM8996_MICBIAS_1 … #define WM8996_MICBIAS_2 … #define WM8996_LDO_1 … #define WM8996_LDO_2 … #define WM8996_ACCESSORY_DETECT_MODE_1 … #define WM8996_ACCESSORY_DETECT_MODE_2 … #define WM8996_HEADPHONE_DETECT_1 … #define WM8996_HEADPHONE_DETECT_2 … #define WM8996_MIC_DETECT_1 … #define WM8996_MIC_DETECT_2 … #define WM8996_MIC_DETECT_3 … #define WM8996_CHARGE_PUMP_1 … #define WM8996_CHARGE_PUMP_2 … #define WM8996_DC_SERVO_1 … #define WM8996_DC_SERVO_2 … #define WM8996_DC_SERVO_3 … #define WM8996_DC_SERVO_5 … #define WM8996_DC_SERVO_6 … #define WM8996_DC_SERVO_7 … #define WM8996_DC_SERVO_READBACK_0 … #define WM8996_ANALOGUE_HP_1 … #define WM8996_ANALOGUE_HP_2 … #define WM8996_CHIP_REVISION … #define WM8996_CONTROL_INTERFACE_1 … #define WM8996_WRITE_SEQUENCER_CTRL_1 … #define WM8996_WRITE_SEQUENCER_CTRL_2 … #define WM8996_AIF_CLOCKING_1 … #define WM8996_AIF_CLOCKING_2 … #define WM8996_CLOCKING_1 … #define WM8996_CLOCKING_2 … #define WM8996_AIF_RATE … #define WM8996_FLL_CONTROL_1 … #define WM8996_FLL_CONTROL_2 … #define WM8996_FLL_CONTROL_3 … #define WM8996_FLL_CONTROL_4 … #define WM8996_FLL_CONTROL_5 … #define WM8996_FLL_CONTROL_6 … #define WM8996_FLL_EFS_1 … #define WM8996_FLL_EFS_2 … #define WM8996_AIF1_CONTROL … #define WM8996_AIF1_BCLK … #define WM8996_AIF1_TX_LRCLK_1 … #define WM8996_AIF1_TX_LRCLK_2 … #define WM8996_AIF1_RX_LRCLK_1 … #define WM8996_AIF1_RX_LRCLK_2 … #define WM8996_AIF1TX_DATA_CONFIGURATION_1 … #define WM8996_AIF1TX_DATA_CONFIGURATION_2 … #define WM8996_AIF1RX_DATA_CONFIGURATION … #define WM8996_AIF1TX_CHANNEL_0_CONFIGURATION … #define WM8996_AIF1TX_CHANNEL_1_CONFIGURATION … #define WM8996_AIF1TX_CHANNEL_2_CONFIGURATION … #define WM8996_AIF1TX_CHANNEL_3_CONFIGURATION … #define WM8996_AIF1TX_CHANNEL_4_CONFIGURATION … #define WM8996_AIF1TX_CHANNEL_5_CONFIGURATION … #define WM8996_AIF1RX_CHANNEL_0_CONFIGURATION … #define WM8996_AIF1RX_CHANNEL_1_CONFIGURATION … #define WM8996_AIF1RX_CHANNEL_2_CONFIGURATION … #define WM8996_AIF1RX_CHANNEL_3_CONFIGURATION … #define WM8996_AIF1RX_CHANNEL_4_CONFIGURATION … #define WM8996_AIF1RX_CHANNEL_5_CONFIGURATION … #define WM8996_AIF1RX_MONO_CONFIGURATION … #define WM8996_AIF1TX_TEST … #define WM8996_AIF2_CONTROL … #define WM8996_AIF2_BCLK … #define WM8996_AIF2_TX_LRCLK_1 … #define WM8996_AIF2_TX_LRCLK_2 … #define WM8996_AIF2_RX_LRCLK_1 … #define WM8996_AIF2_RX_LRCLK_2 … #define WM8996_AIF2TX_DATA_CONFIGURATION_1 … #define WM8996_AIF2TX_DATA_CONFIGURATION_2 … #define WM8996_AIF2RX_DATA_CONFIGURATION … #define WM8996_AIF2TX_CHANNEL_0_CONFIGURATION … #define WM8996_AIF2TX_CHANNEL_1_CONFIGURATION … #define WM8996_AIF2RX_CHANNEL_0_CONFIGURATION … #define WM8996_AIF2RX_CHANNEL_1_CONFIGURATION … #define WM8996_AIF2RX_MONO_CONFIGURATION … #define WM8996_AIF2TX_TEST … #define WM8996_DSP1_TX_LEFT_VOLUME … #define WM8996_DSP1_TX_RIGHT_VOLUME … #define WM8996_DSP1_RX_LEFT_VOLUME … #define WM8996_DSP1_RX_RIGHT_VOLUME … #define WM8996_DSP1_TX_FILTERS … #define WM8996_DSP1_RX_FILTERS_1 … #define WM8996_DSP1_RX_FILTERS_2 … #define WM8996_DSP1_DRC_1 … #define WM8996_DSP1_DRC_2 … #define WM8996_DSP1_DRC_3 … #define WM8996_DSP1_DRC_4 … #define WM8996_DSP1_DRC_5 … #define WM8996_DSP1_RX_EQ_GAINS_1 … #define WM8996_DSP1_RX_EQ_GAINS_2 … #define WM8996_DSP1_RX_EQ_BAND_1_A … #define WM8996_DSP1_RX_EQ_BAND_1_B … #define WM8996_DSP1_RX_EQ_BAND_1_PG … #define WM8996_DSP1_RX_EQ_BAND_2_A … #define WM8996_DSP1_RX_EQ_BAND_2_B … #define WM8996_DSP1_RX_EQ_BAND_2_C … #define WM8996_DSP1_RX_EQ_BAND_2_PG … #define WM8996_DSP1_RX_EQ_BAND_3_A … #define WM8996_DSP1_RX_EQ_BAND_3_B … #define WM8996_DSP1_RX_EQ_BAND_3_C … #define WM8996_DSP1_RX_EQ_BAND_3_PG … #define WM8996_DSP1_RX_EQ_BAND_4_A … #define WM8996_DSP1_RX_EQ_BAND_4_B … #define WM8996_DSP1_RX_EQ_BAND_4_C … #define WM8996_DSP1_RX_EQ_BAND_4_PG … #define WM8996_DSP1_RX_EQ_BAND_5_A … #define WM8996_DSP1_RX_EQ_BAND_5_B … #define WM8996_DSP1_RX_EQ_BAND_5_PG … #define WM8996_DSP2_TX_LEFT_VOLUME … #define WM8996_DSP2_TX_RIGHT_VOLUME … #define WM8996_DSP2_RX_LEFT_VOLUME … #define WM8996_DSP2_RX_RIGHT_VOLUME … #define WM8996_DSP2_TX_FILTERS … #define WM8996_DSP2_RX_FILTERS_1 … #define WM8996_DSP2_RX_FILTERS_2 … #define WM8996_DSP2_DRC_1 … #define WM8996_DSP2_DRC_2 … #define WM8996_DSP2_DRC_3 … #define WM8996_DSP2_DRC_4 … #define WM8996_DSP2_DRC_5 … #define WM8996_DSP2_RX_EQ_GAINS_1 … #define WM8996_DSP2_RX_EQ_GAINS_2 … #define WM8996_DSP2_RX_EQ_BAND_1_A … #define WM8996_DSP2_RX_EQ_BAND_1_B … #define WM8996_DSP2_RX_EQ_BAND_1_PG … #define WM8996_DSP2_RX_EQ_BAND_2_A … #define WM8996_DSP2_RX_EQ_BAND_2_B … #define WM8996_DSP2_RX_EQ_BAND_2_C … #define WM8996_DSP2_RX_EQ_BAND_2_PG … #define WM8996_DSP2_RX_EQ_BAND_3_A … #define WM8996_DSP2_RX_EQ_BAND_3_B … #define WM8996_DSP2_RX_EQ_BAND_3_C … #define WM8996_DSP2_RX_EQ_BAND_3_PG … #define WM8996_DSP2_RX_EQ_BAND_4_A … #define WM8996_DSP2_RX_EQ_BAND_4_B … #define WM8996_DSP2_RX_EQ_BAND_4_C … #define WM8996_DSP2_RX_EQ_BAND_4_PG … #define WM8996_DSP2_RX_EQ_BAND_5_A … #define WM8996_DSP2_RX_EQ_BAND_5_B … #define WM8996_DSP2_RX_EQ_BAND_5_PG … #define WM8996_DAC1_MIXER_VOLUMES … #define WM8996_DAC1_LEFT_MIXER_ROUTING … #define WM8996_DAC1_RIGHT_MIXER_ROUTING … #define WM8996_DAC2_MIXER_VOLUMES … #define WM8996_DAC2_LEFT_MIXER_ROUTING … #define WM8996_DAC2_RIGHT_MIXER_ROUTING … #define WM8996_DSP1_TX_LEFT_MIXER_ROUTING … #define WM8996_DSP1_TX_RIGHT_MIXER_ROUTING … #define WM8996_DSP2_TX_LEFT_MIXER_ROUTING … #define WM8996_DSP2_TX_RIGHT_MIXER_ROUTING … #define WM8996_DSP_TX_MIXER_SELECT … #define WM8996_DAC_SOFTMUTE … #define WM8996_OVERSAMPLING … #define WM8996_SIDETONE … #define WM8996_GPIO_1 … #define WM8996_GPIO_2 … #define WM8996_GPIO_3 … #define WM8996_GPIO_4 … #define WM8996_GPIO_5 … #define WM8996_PULL_CONTROL_1 … #define WM8996_PULL_CONTROL_2 … #define WM8996_INTERRUPT_STATUS_1 … #define WM8996_INTERRUPT_STATUS_2 … #define WM8996_INTERRUPT_RAW_STATUS_2 … #define WM8996_INTERRUPT_STATUS_1_MASK … #define WM8996_INTERRUPT_STATUS_2_MASK … #define WM8996_INTERRUPT_CONTROL … #define WM8996_LEFT_PDM_SPEAKER … #define WM8996_RIGHT_PDM_SPEAKER … #define WM8996_PDM_SPEAKER_MUTE_SEQUENCE … #define WM8996_PDM_SPEAKER_VOLUME … #define WM8996_WRITE_SEQUENCER_0 … #define WM8996_WRITE_SEQUENCER_1 … #define WM8996_WRITE_SEQUENCER_2 … #define WM8996_WRITE_SEQUENCER_3 … #define WM8996_WRITE_SEQUENCER_4 … #define WM8996_WRITE_SEQUENCER_5 … #define WM8996_WRITE_SEQUENCER_6 … #define WM8996_WRITE_SEQUENCER_7 … #define WM8996_WRITE_SEQUENCER_8 … #define WM8996_WRITE_SEQUENCER_9 … #define WM8996_WRITE_SEQUENCER_10 … #define WM8996_WRITE_SEQUENCER_11 … #define WM8996_WRITE_SEQUENCER_12 … #define WM8996_WRITE_SEQUENCER_13 … #define WM8996_WRITE_SEQUENCER_14 … #define WM8996_WRITE_SEQUENCER_15 … #define WM8996_WRITE_SEQUENCER_16 … #define WM8996_WRITE_SEQUENCER_17 … #define WM8996_WRITE_SEQUENCER_18 … #define WM8996_WRITE_SEQUENCER_19 … #define WM8996_WRITE_SEQUENCER_20 … #define WM8996_WRITE_SEQUENCER_21 … #define WM8996_WRITE_SEQUENCER_22 … #define WM8996_WRITE_SEQUENCER_23 … #define WM8996_WRITE_SEQUENCER_24 … #define WM8996_WRITE_SEQUENCER_25 … #define WM8996_WRITE_SEQUENCER_26 … #define WM8996_WRITE_SEQUENCER_27 … #define WM8996_WRITE_SEQUENCER_28 … #define WM8996_WRITE_SEQUENCER_29 … #define WM8996_WRITE_SEQUENCER_30 … #define WM8996_WRITE_SEQUENCER_31 … #define WM8996_WRITE_SEQUENCER_32 … #define WM8996_WRITE_SEQUENCER_33 … #define WM8996_WRITE_SEQUENCER_34 … #define WM8996_WRITE_SEQUENCER_35 … #define WM8996_WRITE_SEQUENCER_36 … #define WM8996_WRITE_SEQUENCER_37 … #define WM8996_WRITE_SEQUENCER_38 … #define WM8996_WRITE_SEQUENCER_39 … #define WM8996_WRITE_SEQUENCER_40 … #define WM8996_WRITE_SEQUENCER_41 … #define WM8996_WRITE_SEQUENCER_42 … #define WM8996_WRITE_SEQUENCER_43 … #define WM8996_WRITE_SEQUENCER_44 … #define WM8996_WRITE_SEQUENCER_45 … #define WM8996_WRITE_SEQUENCER_46 … #define WM8996_WRITE_SEQUENCER_47 … #define WM8996_WRITE_SEQUENCER_48 … #define WM8996_WRITE_SEQUENCER_49 … #define WM8996_WRITE_SEQUENCER_50 … #define WM8996_WRITE_SEQUENCER_51 … #define WM8996_WRITE_SEQUENCER_52 … #define WM8996_WRITE_SEQUENCER_53 … #define WM8996_WRITE_SEQUENCER_54 … #define WM8996_WRITE_SEQUENCER_55 … #define WM8996_WRITE_SEQUENCER_56 … #define WM8996_WRITE_SEQUENCER_57 … #define WM8996_WRITE_SEQUENCER_58 … #define WM8996_WRITE_SEQUENCER_59 … #define WM8996_WRITE_SEQUENCER_60 … #define WM8996_WRITE_SEQUENCER_61 … #define WM8996_WRITE_SEQUENCER_62 … #define WM8996_WRITE_SEQUENCER_63 … #define WM8996_WRITE_SEQUENCER_64 … #define WM8996_WRITE_SEQUENCER_65 … #define WM8996_WRITE_SEQUENCER_66 … #define WM8996_WRITE_SEQUENCER_67 … #define WM8996_WRITE_SEQUENCER_68 … #define WM8996_WRITE_SEQUENCER_69 … #define WM8996_WRITE_SEQUENCER_70 … #define WM8996_WRITE_SEQUENCER_71 … #define WM8996_WRITE_SEQUENCER_72 … #define WM8996_WRITE_SEQUENCER_73 … #define WM8996_WRITE_SEQUENCER_74 … #define WM8996_WRITE_SEQUENCER_75 … #define WM8996_WRITE_SEQUENCER_76 … #define WM8996_WRITE_SEQUENCER_77 … #define WM8996_WRITE_SEQUENCER_78 … #define WM8996_WRITE_SEQUENCER_79 … #define WM8996_WRITE_SEQUENCER_80 … #define WM8996_WRITE_SEQUENCER_81 … #define WM8996_WRITE_SEQUENCER_82 … #define WM8996_WRITE_SEQUENCER_83 … #define WM8996_WRITE_SEQUENCER_84 … #define WM8996_WRITE_SEQUENCER_85 … #define WM8996_WRITE_SEQUENCER_86 … #define WM8996_WRITE_SEQUENCER_87 … #define WM8996_WRITE_SEQUENCER_88 … #define WM8996_WRITE_SEQUENCER_89 … #define WM8996_WRITE_SEQUENCER_90 … #define WM8996_WRITE_SEQUENCER_91 … #define WM8996_WRITE_SEQUENCER_92 … #define WM8996_WRITE_SEQUENCER_93 … #define WM8996_WRITE_SEQUENCER_94 … #define WM8996_WRITE_SEQUENCER_95 … #define WM8996_WRITE_SEQUENCER_96 … #define WM8996_WRITE_SEQUENCER_97 … #define WM8996_WRITE_SEQUENCER_98 … #define WM8996_WRITE_SEQUENCER_99 … #define WM8996_WRITE_SEQUENCER_100 … #define WM8996_WRITE_SEQUENCER_101 … #define WM8996_WRITE_SEQUENCER_102 … #define WM8996_WRITE_SEQUENCER_103 … #define WM8996_WRITE_SEQUENCER_104 … #define WM8996_WRITE_SEQUENCER_105 … #define WM8996_WRITE_SEQUENCER_106 … #define WM8996_WRITE_SEQUENCER_107 … #define WM8996_WRITE_SEQUENCER_108 … #define WM8996_WRITE_SEQUENCER_109 … #define WM8996_WRITE_SEQUENCER_110 … #define WM8996_WRITE_SEQUENCER_111 … #define WM8996_WRITE_SEQUENCER_112 … #define WM8996_WRITE_SEQUENCER_113 … #define WM8996_WRITE_SEQUENCER_114 … #define WM8996_WRITE_SEQUENCER_115 … #define WM8996_WRITE_SEQUENCER_116 … #define WM8996_WRITE_SEQUENCER_117 … #define WM8996_WRITE_SEQUENCER_118 … #define WM8996_WRITE_SEQUENCER_119 … #define WM8996_WRITE_SEQUENCER_120 … #define WM8996_WRITE_SEQUENCER_121 … #define WM8996_WRITE_SEQUENCER_122 … #define WM8996_WRITE_SEQUENCER_123 … #define WM8996_WRITE_SEQUENCER_124 … #define WM8996_WRITE_SEQUENCER_125 … #define WM8996_WRITE_SEQUENCER_126 … #define WM8996_WRITE_SEQUENCER_127 … #define WM8996_WRITE_SEQUENCER_128 … #define WM8996_WRITE_SEQUENCER_129 … #define WM8996_WRITE_SEQUENCER_130 … #define WM8996_WRITE_SEQUENCER_131 … #define WM8996_WRITE_SEQUENCER_132 … #define WM8996_WRITE_SEQUENCER_133 … #define WM8996_WRITE_SEQUENCER_134 … #define WM8996_WRITE_SEQUENCER_135 … #define WM8996_WRITE_SEQUENCER_136 … #define WM8996_WRITE_SEQUENCER_137 … #define WM8996_WRITE_SEQUENCER_138 … #define WM8996_WRITE_SEQUENCER_139 … #define WM8996_WRITE_SEQUENCER_140 … #define WM8996_WRITE_SEQUENCER_141 … #define WM8996_WRITE_SEQUENCER_142 … #define WM8996_WRITE_SEQUENCER_143 … #define WM8996_WRITE_SEQUENCER_144 … #define WM8996_WRITE_SEQUENCER_145 … #define WM8996_WRITE_SEQUENCER_146 … #define WM8996_WRITE_SEQUENCER_147 … #define WM8996_WRITE_SEQUENCER_148 … #define WM8996_WRITE_SEQUENCER_149 … #define WM8996_WRITE_SEQUENCER_150 … #define WM8996_WRITE_SEQUENCER_151 … #define WM8996_WRITE_SEQUENCER_152 … #define WM8996_WRITE_SEQUENCER_153 … #define WM8996_WRITE_SEQUENCER_154 … #define WM8996_WRITE_SEQUENCER_155 … #define WM8996_WRITE_SEQUENCER_156 … #define WM8996_WRITE_SEQUENCER_157 … #define WM8996_WRITE_SEQUENCER_158 … #define WM8996_WRITE_SEQUENCER_159 … #define WM8996_WRITE_SEQUENCER_160 … #define WM8996_WRITE_SEQUENCER_161 … #define WM8996_WRITE_SEQUENCER_162 … #define WM8996_WRITE_SEQUENCER_163 … #define WM8996_WRITE_SEQUENCER_164 … #define WM8996_WRITE_SEQUENCER_165 … #define WM8996_WRITE_SEQUENCER_166 … #define WM8996_WRITE_SEQUENCER_167 … #define WM8996_WRITE_SEQUENCER_168 … #define WM8996_WRITE_SEQUENCER_169 … #define WM8996_WRITE_SEQUENCER_170 … #define WM8996_WRITE_SEQUENCER_171 … #define WM8996_WRITE_SEQUENCER_172 … #define WM8996_WRITE_SEQUENCER_173 … #define WM8996_WRITE_SEQUENCER_174 … #define WM8996_WRITE_SEQUENCER_175 … #define WM8996_WRITE_SEQUENCER_176 … #define WM8996_WRITE_SEQUENCER_177 … #define WM8996_WRITE_SEQUENCER_178 … #define WM8996_WRITE_SEQUENCER_179 … #define WM8996_WRITE_SEQUENCER_180 … #define WM8996_WRITE_SEQUENCER_181 … #define WM8996_WRITE_SEQUENCER_182 … #define WM8996_WRITE_SEQUENCER_183 … #define WM8996_WRITE_SEQUENCER_184 … #define WM8996_WRITE_SEQUENCER_185 … #define WM8996_WRITE_SEQUENCER_186 … #define WM8996_WRITE_SEQUENCER_187 … #define WM8996_WRITE_SEQUENCER_188 … #define WM8996_WRITE_SEQUENCER_189 … #define WM8996_WRITE_SEQUENCER_190 … #define WM8996_WRITE_SEQUENCER_191 … #define WM8996_WRITE_SEQUENCER_192 … #define WM8996_WRITE_SEQUENCER_193 … #define WM8996_WRITE_SEQUENCER_194 … #define WM8996_WRITE_SEQUENCER_195 … #define WM8996_WRITE_SEQUENCER_196 … #define WM8996_WRITE_SEQUENCER_197 … #define WM8996_WRITE_SEQUENCER_198 … #define WM8996_WRITE_SEQUENCER_199 … #define WM8996_WRITE_SEQUENCER_200 … #define WM8996_WRITE_SEQUENCER_201 … #define WM8996_WRITE_SEQUENCER_202 … #define WM8996_WRITE_SEQUENCER_203 … #define WM8996_WRITE_SEQUENCER_204 … #define WM8996_WRITE_SEQUENCER_205 … #define WM8996_WRITE_SEQUENCER_206 … #define WM8996_WRITE_SEQUENCER_207 … #define WM8996_WRITE_SEQUENCER_208 … #define WM8996_WRITE_SEQUENCER_209 … #define WM8996_WRITE_SEQUENCER_210 … #define WM8996_WRITE_SEQUENCER_211 … #define WM8996_WRITE_SEQUENCER_212 … #define WM8996_WRITE_SEQUENCER_213 … #define WM8996_WRITE_SEQUENCER_214 … #define WM8996_WRITE_SEQUENCER_215 … #define WM8996_WRITE_SEQUENCER_216 … #define WM8996_WRITE_SEQUENCER_217 … #define WM8996_WRITE_SEQUENCER_218 … #define WM8996_WRITE_SEQUENCER_219 … #define WM8996_WRITE_SEQUENCER_220 … #define WM8996_WRITE_SEQUENCER_221 … #define WM8996_WRITE_SEQUENCER_222 … #define WM8996_WRITE_SEQUENCER_223 … #define WM8996_WRITE_SEQUENCER_224 … #define WM8996_WRITE_SEQUENCER_225 … #define WM8996_WRITE_SEQUENCER_226 … #define WM8996_WRITE_SEQUENCER_227 … #define WM8996_WRITE_SEQUENCER_228 … #define WM8996_WRITE_SEQUENCER_229 … #define WM8996_WRITE_SEQUENCER_230 … #define WM8996_WRITE_SEQUENCER_231 … #define WM8996_WRITE_SEQUENCER_232 … #define WM8996_WRITE_SEQUENCER_233 … #define WM8996_WRITE_SEQUENCER_234 … #define WM8996_WRITE_SEQUENCER_235 … #define WM8996_WRITE_SEQUENCER_236 … #define WM8996_WRITE_SEQUENCER_237 … #define WM8996_WRITE_SEQUENCER_238 … #define WM8996_WRITE_SEQUENCER_239 … #define WM8996_WRITE_SEQUENCER_240 … #define WM8996_WRITE_SEQUENCER_241 … #define WM8996_WRITE_SEQUENCER_242 … #define WM8996_WRITE_SEQUENCER_243 … #define WM8996_WRITE_SEQUENCER_244 … #define WM8996_WRITE_SEQUENCER_245 … #define WM8996_WRITE_SEQUENCER_246 … #define WM8996_WRITE_SEQUENCER_247 … #define WM8996_WRITE_SEQUENCER_248 … #define WM8996_WRITE_SEQUENCER_249 … #define WM8996_WRITE_SEQUENCER_250 … #define WM8996_WRITE_SEQUENCER_251 … #define WM8996_WRITE_SEQUENCER_252 … #define WM8996_WRITE_SEQUENCER_253 … #define WM8996_WRITE_SEQUENCER_254 … #define WM8996_WRITE_SEQUENCER_255 … #define WM8996_WRITE_SEQUENCER_256 … #define WM8996_WRITE_SEQUENCER_257 … #define WM8996_WRITE_SEQUENCER_258 … #define WM8996_WRITE_SEQUENCER_259 … #define WM8996_WRITE_SEQUENCER_260 … #define WM8996_WRITE_SEQUENCER_261 … #define WM8996_WRITE_SEQUENCER_262 … #define WM8996_WRITE_SEQUENCER_263 … #define WM8996_WRITE_SEQUENCER_264 … #define WM8996_WRITE_SEQUENCER_265 … #define WM8996_WRITE_SEQUENCER_266 … #define WM8996_WRITE_SEQUENCER_267 … #define WM8996_WRITE_SEQUENCER_268 … #define WM8996_WRITE_SEQUENCER_269 … #define WM8996_WRITE_SEQUENCER_270 … #define WM8996_WRITE_SEQUENCER_271 … #define WM8996_WRITE_SEQUENCER_272 … #define WM8996_WRITE_SEQUENCER_273 … #define WM8996_WRITE_SEQUENCER_274 … #define WM8996_WRITE_SEQUENCER_275 … #define WM8996_WRITE_SEQUENCER_276 … #define WM8996_WRITE_SEQUENCER_277 … #define WM8996_WRITE_SEQUENCER_278 … #define WM8996_WRITE_SEQUENCER_279 … #define WM8996_WRITE_SEQUENCER_280 … #define WM8996_WRITE_SEQUENCER_281 … #define WM8996_WRITE_SEQUENCER_282 … #define WM8996_WRITE_SEQUENCER_283 … #define WM8996_WRITE_SEQUENCER_284 … #define WM8996_WRITE_SEQUENCER_285 … #define WM8996_WRITE_SEQUENCER_286 … #define WM8996_WRITE_SEQUENCER_287 … #define WM8996_WRITE_SEQUENCER_288 … #define WM8996_WRITE_SEQUENCER_289 … #define WM8996_WRITE_SEQUENCER_290 … #define WM8996_WRITE_SEQUENCER_291 … #define WM8996_WRITE_SEQUENCER_292 … #define WM8996_WRITE_SEQUENCER_293 … #define WM8996_WRITE_SEQUENCER_294 … #define WM8996_WRITE_SEQUENCER_295 … #define WM8996_WRITE_SEQUENCER_296 … #define WM8996_WRITE_SEQUENCER_297 … #define WM8996_WRITE_SEQUENCER_298 … #define WM8996_WRITE_SEQUENCER_299 … #define WM8996_WRITE_SEQUENCER_300 … #define WM8996_WRITE_SEQUENCER_301 … #define WM8996_WRITE_SEQUENCER_302 … #define WM8996_WRITE_SEQUENCER_303 … #define WM8996_WRITE_SEQUENCER_304 … #define WM8996_WRITE_SEQUENCER_305 … #define WM8996_WRITE_SEQUENCER_306 … #define WM8996_WRITE_SEQUENCER_307 … #define WM8996_WRITE_SEQUENCER_308 … #define WM8996_WRITE_SEQUENCER_309 … #define WM8996_WRITE_SEQUENCER_310 … #define WM8996_WRITE_SEQUENCER_311 … #define WM8996_WRITE_SEQUENCER_312 … #define WM8996_WRITE_SEQUENCER_313 … #define WM8996_WRITE_SEQUENCER_314 … #define WM8996_WRITE_SEQUENCER_315 … #define WM8996_WRITE_SEQUENCER_316 … #define WM8996_WRITE_SEQUENCER_317 … #define WM8996_WRITE_SEQUENCER_318 … #define WM8996_WRITE_SEQUENCER_319 … #define WM8996_WRITE_SEQUENCER_320 … #define WM8996_WRITE_SEQUENCER_321 … #define WM8996_WRITE_SEQUENCER_322 … #define WM8996_WRITE_SEQUENCER_323 … #define WM8996_WRITE_SEQUENCER_324 … #define WM8996_WRITE_SEQUENCER_325 … #define WM8996_WRITE_SEQUENCER_326 … #define WM8996_WRITE_SEQUENCER_327 … #define WM8996_WRITE_SEQUENCER_328 … #define WM8996_WRITE_SEQUENCER_329 … #define WM8996_WRITE_SEQUENCER_330 … #define WM8996_WRITE_SEQUENCER_331 … #define WM8996_WRITE_SEQUENCER_332 … #define WM8996_WRITE_SEQUENCER_333 … #define WM8996_WRITE_SEQUENCER_334 … #define WM8996_WRITE_SEQUENCER_335 … #define WM8996_WRITE_SEQUENCER_336 … #define WM8996_WRITE_SEQUENCER_337 … #define WM8996_WRITE_SEQUENCER_338 … #define WM8996_WRITE_SEQUENCER_339 … #define WM8996_WRITE_SEQUENCER_340 … #define WM8996_WRITE_SEQUENCER_341 … #define WM8996_WRITE_SEQUENCER_342 … #define WM8996_WRITE_SEQUENCER_343 … #define WM8996_WRITE_SEQUENCER_344 … #define WM8996_WRITE_SEQUENCER_345 … #define WM8996_WRITE_SEQUENCER_346 … #define WM8996_WRITE_SEQUENCER_347 … #define WM8996_WRITE_SEQUENCER_348 … #define WM8996_WRITE_SEQUENCER_349 … #define WM8996_WRITE_SEQUENCER_350 … #define WM8996_WRITE_SEQUENCER_351 … #define WM8996_WRITE_SEQUENCER_352 … #define WM8996_WRITE_SEQUENCER_353 … #define WM8996_WRITE_SEQUENCER_354 … #define WM8996_WRITE_SEQUENCER_355 … #define WM8996_WRITE_SEQUENCER_356 … #define WM8996_WRITE_SEQUENCER_357 … #define WM8996_WRITE_SEQUENCER_358 … #define WM8996_WRITE_SEQUENCER_359 … #define WM8996_WRITE_SEQUENCER_360 … #define WM8996_WRITE_SEQUENCER_361 … #define WM8996_WRITE_SEQUENCER_362 … #define WM8996_WRITE_SEQUENCER_363 … #define WM8996_WRITE_SEQUENCER_364 … #define WM8996_WRITE_SEQUENCER_365 … #define WM8996_WRITE_SEQUENCER_366 … #define WM8996_WRITE_SEQUENCER_367 … #define WM8996_WRITE_SEQUENCER_368 … #define WM8996_WRITE_SEQUENCER_369 … #define WM8996_WRITE_SEQUENCER_370 … #define WM8996_WRITE_SEQUENCER_371 … #define WM8996_WRITE_SEQUENCER_372 … #define WM8996_WRITE_SEQUENCER_373 … #define WM8996_WRITE_SEQUENCER_374 … #define WM8996_WRITE_SEQUENCER_375 … #define WM8996_WRITE_SEQUENCER_376 … #define WM8996_WRITE_SEQUENCER_377 … #define WM8996_WRITE_SEQUENCER_378 … #define WM8996_WRITE_SEQUENCER_379 … #define WM8996_WRITE_SEQUENCER_380 … #define WM8996_WRITE_SEQUENCER_381 … #define WM8996_WRITE_SEQUENCER_382 … #define WM8996_WRITE_SEQUENCER_383 … #define WM8996_WRITE_SEQUENCER_384 … #define WM8996_WRITE_SEQUENCER_385 … #define WM8996_WRITE_SEQUENCER_386 … #define WM8996_WRITE_SEQUENCER_387 … #define WM8996_WRITE_SEQUENCER_388 … #define WM8996_WRITE_SEQUENCER_389 … #define WM8996_WRITE_SEQUENCER_390 … #define WM8996_WRITE_SEQUENCER_391 … #define WM8996_WRITE_SEQUENCER_392 … #define WM8996_WRITE_SEQUENCER_393 … #define WM8996_WRITE_SEQUENCER_394 … #define WM8996_WRITE_SEQUENCER_395 … #define WM8996_WRITE_SEQUENCER_396 … #define WM8996_WRITE_SEQUENCER_397 … #define WM8996_WRITE_SEQUENCER_398 … #define WM8996_WRITE_SEQUENCER_399 … #define WM8996_WRITE_SEQUENCER_400 … #define WM8996_WRITE_SEQUENCER_401 … #define WM8996_WRITE_SEQUENCER_402 … #define WM8996_WRITE_SEQUENCER_403 … #define WM8996_WRITE_SEQUENCER_404 … #define WM8996_WRITE_SEQUENCER_405 … #define WM8996_WRITE_SEQUENCER_406 … #define WM8996_WRITE_SEQUENCER_407 … #define WM8996_WRITE_SEQUENCER_408 … #define WM8996_WRITE_SEQUENCER_409 … #define WM8996_WRITE_SEQUENCER_410 … #define WM8996_WRITE_SEQUENCER_411 … #define WM8996_WRITE_SEQUENCER_412 … #define WM8996_WRITE_SEQUENCER_413 … #define WM8996_WRITE_SEQUENCER_414 … #define WM8996_WRITE_SEQUENCER_415 … #define WM8996_WRITE_SEQUENCER_416 … #define WM8996_WRITE_SEQUENCER_417 … #define WM8996_WRITE_SEQUENCER_418 … #define WM8996_WRITE_SEQUENCER_419 … #define WM8996_WRITE_SEQUENCER_420 … #define WM8996_WRITE_SEQUENCER_421 … #define WM8996_WRITE_SEQUENCER_422 … #define WM8996_WRITE_SEQUENCER_423 … #define WM8996_WRITE_SEQUENCER_424 … #define WM8996_WRITE_SEQUENCER_425 … #define WM8996_WRITE_SEQUENCER_426 … #define WM8996_WRITE_SEQUENCER_427 … #define WM8996_WRITE_SEQUENCER_428 … #define WM8996_WRITE_SEQUENCER_429 … #define WM8996_WRITE_SEQUENCER_430 … #define WM8996_WRITE_SEQUENCER_431 … #define WM8996_WRITE_SEQUENCER_432 … #define WM8996_WRITE_SEQUENCER_433 … #define WM8996_WRITE_SEQUENCER_434 … #define WM8996_WRITE_SEQUENCER_435 … #define WM8996_WRITE_SEQUENCER_436 … #define WM8996_WRITE_SEQUENCER_437 … #define WM8996_WRITE_SEQUENCER_438 … #define WM8996_WRITE_SEQUENCER_439 … #define WM8996_WRITE_SEQUENCER_440 … #define WM8996_WRITE_SEQUENCER_441 … #define WM8996_WRITE_SEQUENCER_442 … #define WM8996_WRITE_SEQUENCER_443 … #define WM8996_WRITE_SEQUENCER_444 … #define WM8996_WRITE_SEQUENCER_445 … #define WM8996_WRITE_SEQUENCER_446 … #define WM8996_WRITE_SEQUENCER_447 … #define WM8996_WRITE_SEQUENCER_448 … #define WM8996_WRITE_SEQUENCER_449 … #define WM8996_WRITE_SEQUENCER_450 … #define WM8996_WRITE_SEQUENCER_451 … #define WM8996_WRITE_SEQUENCER_452 … #define WM8996_WRITE_SEQUENCER_453 … #define WM8996_WRITE_SEQUENCER_454 … #define WM8996_WRITE_SEQUENCER_455 … #define WM8996_WRITE_SEQUENCER_456 … #define WM8996_WRITE_SEQUENCER_457 … #define WM8996_WRITE_SEQUENCER_458 … #define WM8996_WRITE_SEQUENCER_459 … #define WM8996_WRITE_SEQUENCER_460 … #define WM8996_WRITE_SEQUENCER_461 … #define WM8996_WRITE_SEQUENCER_462 … #define WM8996_WRITE_SEQUENCER_463 … #define WM8996_WRITE_SEQUENCER_464 … #define WM8996_WRITE_SEQUENCER_465 … #define WM8996_WRITE_SEQUENCER_466 … #define WM8996_WRITE_SEQUENCER_467 … #define WM8996_WRITE_SEQUENCER_468 … #define WM8996_WRITE_SEQUENCER_469 … #define WM8996_WRITE_SEQUENCER_470 … #define WM8996_WRITE_SEQUENCER_471 … #define WM8996_WRITE_SEQUENCER_472 … #define WM8996_WRITE_SEQUENCER_473 … #define WM8996_WRITE_SEQUENCER_474 … #define WM8996_WRITE_SEQUENCER_475 … #define WM8996_WRITE_SEQUENCER_476 … #define WM8996_WRITE_SEQUENCER_477 … #define WM8996_WRITE_SEQUENCER_478 … #define WM8996_WRITE_SEQUENCER_479 … #define WM8996_WRITE_SEQUENCER_480 … #define WM8996_WRITE_SEQUENCER_481 … #define WM8996_WRITE_SEQUENCER_482 … #define WM8996_WRITE_SEQUENCER_483 … #define WM8996_WRITE_SEQUENCER_484 … #define WM8996_WRITE_SEQUENCER_485 … #define WM8996_WRITE_SEQUENCER_486 … #define WM8996_WRITE_SEQUENCER_487 … #define WM8996_WRITE_SEQUENCER_488 … #define WM8996_WRITE_SEQUENCER_489 … #define WM8996_WRITE_SEQUENCER_490 … #define WM8996_WRITE_SEQUENCER_491 … #define WM8996_WRITE_SEQUENCER_492 … #define WM8996_WRITE_SEQUENCER_493 … #define WM8996_WRITE_SEQUENCER_494 … #define WM8996_WRITE_SEQUENCER_495 … #define WM8996_WRITE_SEQUENCER_496 … #define WM8996_WRITE_SEQUENCER_497 … #define WM8996_WRITE_SEQUENCER_498 … #define WM8996_WRITE_SEQUENCER_499 … #define WM8996_WRITE_SEQUENCER_500 … #define WM8996_WRITE_SEQUENCER_501 … #define WM8996_WRITE_SEQUENCER_502 … #define WM8996_WRITE_SEQUENCER_503 … #define WM8996_WRITE_SEQUENCER_504 … #define WM8996_WRITE_SEQUENCER_505 … #define WM8996_WRITE_SEQUENCER_506 … #define WM8996_WRITE_SEQUENCER_507 … #define WM8996_WRITE_SEQUENCER_508 … #define WM8996_WRITE_SEQUENCER_509 … #define WM8996_WRITE_SEQUENCER_510 … #define WM8996_WRITE_SEQUENCER_511 … #define WM8996_REGISTER_COUNT … #define WM8996_MAX_REGISTER … /* * Field Definitions. */ /* * R0 (0x00) - Software Reset */ #define WM8996_SW_RESET_MASK … #define WM8996_SW_RESET_SHIFT … #define WM8996_SW_RESET_WIDTH … /* * R1 (0x01) - Power Management (1) */ #define WM8996_MICB2_ENA … #define WM8996_MICB2_ENA_MASK … #define WM8996_MICB2_ENA_SHIFT … #define WM8996_MICB2_ENA_WIDTH … #define WM8996_MICB1_ENA … #define WM8996_MICB1_ENA_MASK … #define WM8996_MICB1_ENA_SHIFT … #define WM8996_MICB1_ENA_WIDTH … #define WM8996_HPOUT2L_ENA … #define WM8996_HPOUT2L_ENA_MASK … #define WM8996_HPOUT2L_ENA_SHIFT … #define WM8996_HPOUT2L_ENA_WIDTH … #define WM8996_HPOUT2R_ENA … #define WM8996_HPOUT2R_ENA_MASK … #define WM8996_HPOUT2R_ENA_SHIFT … #define WM8996_HPOUT2R_ENA_WIDTH … #define WM8996_HPOUT1L_ENA … #define WM8996_HPOUT1L_ENA_MASK … #define WM8996_HPOUT1L_ENA_SHIFT … #define WM8996_HPOUT1L_ENA_WIDTH … #define WM8996_HPOUT1R_ENA … #define WM8996_HPOUT1R_ENA_MASK … #define WM8996_HPOUT1R_ENA_SHIFT … #define WM8996_HPOUT1R_ENA_WIDTH … #define WM8996_BG_ENA … #define WM8996_BG_ENA_MASK … #define WM8996_BG_ENA_SHIFT … #define WM8996_BG_ENA_WIDTH … /* * R2 (0x02) - Power Management (2) */ #define WM8996_OPCLK_ENA … #define WM8996_OPCLK_ENA_MASK … #define WM8996_OPCLK_ENA_SHIFT … #define WM8996_OPCLK_ENA_WIDTH … #define WM8996_INL_ENA … #define WM8996_INL_ENA_MASK … #define WM8996_INL_ENA_SHIFT … #define WM8996_INL_ENA_WIDTH … #define WM8996_INR_ENA … #define WM8996_INR_ENA_MASK … #define WM8996_INR_ENA_SHIFT … #define WM8996_INR_ENA_WIDTH … #define WM8996_LDO2_ENA … #define WM8996_LDO2_ENA_MASK … #define WM8996_LDO2_ENA_SHIFT … #define WM8996_LDO2_ENA_WIDTH … /* * R3 (0x03) - Power Management (3) */ #define WM8996_DSP2RXL_ENA … #define WM8996_DSP2RXL_ENA_MASK … #define WM8996_DSP2RXL_ENA_SHIFT … #define WM8996_DSP2RXL_ENA_WIDTH … #define WM8996_DSP2RXR_ENA … #define WM8996_DSP2RXR_ENA_MASK … #define WM8996_DSP2RXR_ENA_SHIFT … #define WM8996_DSP2RXR_ENA_WIDTH … #define WM8996_DSP1RXL_ENA … #define WM8996_DSP1RXL_ENA_MASK … #define WM8996_DSP1RXL_ENA_SHIFT … #define WM8996_DSP1RXL_ENA_WIDTH … #define WM8996_DSP1RXR_ENA … #define WM8996_DSP1RXR_ENA_MASK … #define WM8996_DSP1RXR_ENA_SHIFT … #define WM8996_DSP1RXR_ENA_WIDTH … #define WM8996_DMIC2L_ENA … #define WM8996_DMIC2L_ENA_MASK … #define WM8996_DMIC2L_ENA_SHIFT … #define WM8996_DMIC2L_ENA_WIDTH … #define WM8996_DMIC2R_ENA … #define WM8996_DMIC2R_ENA_MASK … #define WM8996_DMIC2R_ENA_SHIFT … #define WM8996_DMIC2R_ENA_WIDTH … #define WM8996_DMIC1L_ENA … #define WM8996_DMIC1L_ENA_MASK … #define WM8996_DMIC1L_ENA_SHIFT … #define WM8996_DMIC1L_ENA_WIDTH … #define WM8996_DMIC1R_ENA … #define WM8996_DMIC1R_ENA_MASK … #define WM8996_DMIC1R_ENA_SHIFT … #define WM8996_DMIC1R_ENA_WIDTH … #define WM8996_ADCL_ENA … #define WM8996_ADCL_ENA_MASK … #define WM8996_ADCL_ENA_SHIFT … #define WM8996_ADCL_ENA_WIDTH … #define WM8996_ADCR_ENA … #define WM8996_ADCR_ENA_MASK … #define WM8996_ADCR_ENA_SHIFT … #define WM8996_ADCR_ENA_WIDTH … /* * R4 (0x04) - Power Management (4) */ #define WM8996_AIF2RX_CHAN1_ENA … #define WM8996_AIF2RX_CHAN1_ENA_MASK … #define WM8996_AIF2RX_CHAN1_ENA_SHIFT … #define WM8996_AIF2RX_CHAN1_ENA_WIDTH … #define WM8996_AIF2RX_CHAN0_ENA … #define WM8996_AIF2RX_CHAN0_ENA_MASK … #define WM8996_AIF2RX_CHAN0_ENA_SHIFT … #define WM8996_AIF2RX_CHAN0_ENA_WIDTH … #define WM8996_AIF1RX_CHAN5_ENA … #define WM8996_AIF1RX_CHAN5_ENA_MASK … #define WM8996_AIF1RX_CHAN5_ENA_SHIFT … #define WM8996_AIF1RX_CHAN5_ENA_WIDTH … #define WM8996_AIF1RX_CHAN4_ENA … #define WM8996_AIF1RX_CHAN4_ENA_MASK … #define WM8996_AIF1RX_CHAN4_ENA_SHIFT … #define WM8996_AIF1RX_CHAN4_ENA_WIDTH … #define WM8996_AIF1RX_CHAN3_ENA … #define WM8996_AIF1RX_CHAN3_ENA_MASK … #define WM8996_AIF1RX_CHAN3_ENA_SHIFT … #define WM8996_AIF1RX_CHAN3_ENA_WIDTH … #define WM8996_AIF1RX_CHAN2_ENA … #define WM8996_AIF1RX_CHAN2_ENA_MASK … #define WM8996_AIF1RX_CHAN2_ENA_SHIFT … #define WM8996_AIF1RX_CHAN2_ENA_WIDTH … #define WM8996_AIF1RX_CHAN1_ENA … #define WM8996_AIF1RX_CHAN1_ENA_MASK … #define WM8996_AIF1RX_CHAN1_ENA_SHIFT … #define WM8996_AIF1RX_CHAN1_ENA_WIDTH … #define WM8996_AIF1RX_CHAN0_ENA … #define WM8996_AIF1RX_CHAN0_ENA_MASK … #define WM8996_AIF1RX_CHAN0_ENA_SHIFT … #define WM8996_AIF1RX_CHAN0_ENA_WIDTH … /* * R5 (0x05) - Power Management (5) */ #define WM8996_DSP2TXL_ENA … #define WM8996_DSP2TXL_ENA_MASK … #define WM8996_DSP2TXL_ENA_SHIFT … #define WM8996_DSP2TXL_ENA_WIDTH … #define WM8996_DSP2TXR_ENA … #define WM8996_DSP2TXR_ENA_MASK … #define WM8996_DSP2TXR_ENA_SHIFT … #define WM8996_DSP2TXR_ENA_WIDTH … #define WM8996_DSP1TXL_ENA … #define WM8996_DSP1TXL_ENA_MASK … #define WM8996_DSP1TXL_ENA_SHIFT … #define WM8996_DSP1TXL_ENA_WIDTH … #define WM8996_DSP1TXR_ENA … #define WM8996_DSP1TXR_ENA_MASK … #define WM8996_DSP1TXR_ENA_SHIFT … #define WM8996_DSP1TXR_ENA_WIDTH … #define WM8996_DAC2L_ENA … #define WM8996_DAC2L_ENA_MASK … #define WM8996_DAC2L_ENA_SHIFT … #define WM8996_DAC2L_ENA_WIDTH … #define WM8996_DAC2R_ENA … #define WM8996_DAC2R_ENA_MASK … #define WM8996_DAC2R_ENA_SHIFT … #define WM8996_DAC2R_ENA_WIDTH … #define WM8996_DAC1L_ENA … #define WM8996_DAC1L_ENA_MASK … #define WM8996_DAC1L_ENA_SHIFT … #define WM8996_DAC1L_ENA_WIDTH … #define WM8996_DAC1R_ENA … #define WM8996_DAC1R_ENA_MASK … #define WM8996_DAC1R_ENA_SHIFT … #define WM8996_DAC1R_ENA_WIDTH … /* * R6 (0x06) - Power Management (6) */ #define WM8996_AIF2TX_CHAN1_ENA … #define WM8996_AIF2TX_CHAN1_ENA_MASK … #define WM8996_AIF2TX_CHAN1_ENA_SHIFT … #define WM8996_AIF2TX_CHAN1_ENA_WIDTH … #define WM8996_AIF2TX_CHAN0_ENA … #define WM8996_AIF2TX_CHAN0_ENA_MASK … #define WM8996_AIF2TX_CHAN0_ENA_SHIFT … #define WM8996_AIF2TX_CHAN0_ENA_WIDTH … #define WM8996_AIF1TX_CHAN5_ENA … #define WM8996_AIF1TX_CHAN5_ENA_MASK … #define WM8996_AIF1TX_CHAN5_ENA_SHIFT … #define WM8996_AIF1TX_CHAN5_ENA_WIDTH … #define WM8996_AIF1TX_CHAN4_ENA … #define WM8996_AIF1TX_CHAN4_ENA_MASK … #define WM8996_AIF1TX_CHAN4_ENA_SHIFT … #define WM8996_AIF1TX_CHAN4_ENA_WIDTH … #define WM8996_AIF1TX_CHAN3_ENA … #define WM8996_AIF1TX_CHAN3_ENA_MASK … #define WM8996_AIF1TX_CHAN3_ENA_SHIFT … #define WM8996_AIF1TX_CHAN3_ENA_WIDTH … #define WM8996_AIF1TX_CHAN2_ENA … #define WM8996_AIF1TX_CHAN2_ENA_MASK … #define WM8996_AIF1TX_CHAN2_ENA_SHIFT … #define WM8996_AIF1TX_CHAN2_ENA_WIDTH … #define WM8996_AIF1TX_CHAN1_ENA … #define WM8996_AIF1TX_CHAN1_ENA_MASK … #define WM8996_AIF1TX_CHAN1_ENA_SHIFT … #define WM8996_AIF1TX_CHAN1_ENA_WIDTH … #define WM8996_AIF1TX_CHAN0_ENA … #define WM8996_AIF1TX_CHAN0_ENA_MASK … #define WM8996_AIF1TX_CHAN0_ENA_SHIFT … #define WM8996_AIF1TX_CHAN0_ENA_WIDTH … /* * R7 (0x07) - Power Management (7) */ #define WM8996_DMIC2_FN … #define WM8996_DMIC2_FN_MASK … #define WM8996_DMIC2_FN_SHIFT … #define WM8996_DMIC2_FN_WIDTH … #define WM8996_DMIC1_FN … #define WM8996_DMIC1_FN_MASK … #define WM8996_DMIC1_FN_SHIFT … #define WM8996_DMIC1_FN_WIDTH … #define WM8996_ADC_DMIC_DSP2R_ENA … #define WM8996_ADC_DMIC_DSP2R_ENA_MASK … #define WM8996_ADC_DMIC_DSP2R_ENA_SHIFT … #define WM8996_ADC_DMIC_DSP2R_ENA_WIDTH … #define WM8996_ADC_DMIC_DSP2L_ENA … #define WM8996_ADC_DMIC_DSP2L_ENA_MASK … #define WM8996_ADC_DMIC_DSP2L_ENA_SHIFT … #define WM8996_ADC_DMIC_DSP2L_ENA_WIDTH … #define WM8996_ADC_DMIC_SRC2_MASK … #define WM8996_ADC_DMIC_SRC2_SHIFT … #define WM8996_ADC_DMIC_SRC2_WIDTH … #define WM8996_ADC_DMIC_DSP1R_ENA … #define WM8996_ADC_DMIC_DSP1R_ENA_MASK … #define WM8996_ADC_DMIC_DSP1R_ENA_SHIFT … #define WM8996_ADC_DMIC_DSP1R_ENA_WIDTH … #define WM8996_ADC_DMIC_DSP1L_ENA … #define WM8996_ADC_DMIC_DSP1L_ENA_MASK … #define WM8996_ADC_DMIC_DSP1L_ENA_SHIFT … #define WM8996_ADC_DMIC_DSP1L_ENA_WIDTH … #define WM8996_ADC_DMIC_SRC1_MASK … #define WM8996_ADC_DMIC_SRC1_SHIFT … #define WM8996_ADC_DMIC_SRC1_WIDTH … /* * R8 (0x08) - Power Management (8) */ #define WM8996_AIF2TX_SRC_MASK … #define WM8996_AIF2TX_SRC_SHIFT … #define WM8996_AIF2TX_SRC_WIDTH … #define WM8996_DSP2RX_SRC … #define WM8996_DSP2RX_SRC_MASK … #define WM8996_DSP2RX_SRC_SHIFT … #define WM8996_DSP2RX_SRC_WIDTH … #define WM8996_DSP1RX_SRC … #define WM8996_DSP1RX_SRC_MASK … #define WM8996_DSP1RX_SRC_SHIFT … #define WM8996_DSP1RX_SRC_WIDTH … /* * R16 (0x10) - Left Line Input Volume */ #define WM8996_IN1_VU … #define WM8996_IN1_VU_MASK … #define WM8996_IN1_VU_SHIFT … #define WM8996_IN1_VU_WIDTH … #define WM8996_IN1L_ZC … #define WM8996_IN1L_ZC_MASK … #define WM8996_IN1L_ZC_SHIFT … #define WM8996_IN1L_ZC_WIDTH … #define WM8996_IN1L_VOL_MASK … #define WM8996_IN1L_VOL_SHIFT … #define WM8996_IN1L_VOL_WIDTH … /* * R17 (0x11) - Right Line Input Volume */ #define WM8996_IN1_VU … #define WM8996_IN1_VU_MASK … #define WM8996_IN1_VU_SHIFT … #define WM8996_IN1_VU_WIDTH … #define WM8996_IN1R_ZC … #define WM8996_IN1R_ZC_MASK … #define WM8996_IN1R_ZC_SHIFT … #define WM8996_IN1R_ZC_WIDTH … #define WM8996_IN1R_VOL_MASK … #define WM8996_IN1R_VOL_SHIFT … #define WM8996_IN1R_VOL_WIDTH … /* * R18 (0x12) - Line Input Control */ #define WM8996_INL_MODE_MASK … #define WM8996_INL_MODE_SHIFT … #define WM8996_INL_MODE_WIDTH … #define WM8996_INR_MODE_MASK … #define WM8996_INR_MODE_SHIFT … #define WM8996_INR_MODE_WIDTH … /* * R21 (0x15) - DAC1 HPOUT1 Volume */ #define WM8996_DAC1R_HPOUT1R_VOL_MASK … #define WM8996_DAC1R_HPOUT1R_VOL_SHIFT … #define WM8996_DAC1R_HPOUT1R_VOL_WIDTH … #define WM8996_DAC1L_HPOUT1L_VOL_MASK … #define WM8996_DAC1L_HPOUT1L_VOL_SHIFT … #define WM8996_DAC1L_HPOUT1L_VOL_WIDTH … /* * R22 (0x16) - DAC2 HPOUT2 Volume */ #define WM8996_DAC2R_HPOUT2R_VOL_MASK … #define WM8996_DAC2R_HPOUT2R_VOL_SHIFT … #define WM8996_DAC2R_HPOUT2R_VOL_WIDTH … #define WM8996_DAC2L_HPOUT2L_VOL_MASK … #define WM8996_DAC2L_HPOUT2L_VOL_SHIFT … #define WM8996_DAC2L_HPOUT2L_VOL_WIDTH … /* * R24 (0x18) - DAC1 Left Volume */ #define WM8996_DAC1L_MUTE … #define WM8996_DAC1L_MUTE_MASK … #define WM8996_DAC1L_MUTE_SHIFT … #define WM8996_DAC1L_MUTE_WIDTH … #define WM8996_DAC1_VU … #define WM8996_DAC1_VU_MASK … #define WM8996_DAC1_VU_SHIFT … #define WM8996_DAC1_VU_WIDTH … #define WM8996_DAC1L_VOL_MASK … #define WM8996_DAC1L_VOL_SHIFT … #define WM8996_DAC1L_VOL_WIDTH … /* * R25 (0x19) - DAC1 Right Volume */ #define WM8996_DAC1R_MUTE … #define WM8996_DAC1R_MUTE_MASK … #define WM8996_DAC1R_MUTE_SHIFT … #define WM8996_DAC1R_MUTE_WIDTH … #define WM8996_DAC1_VU … #define WM8996_DAC1_VU_MASK … #define WM8996_DAC1_VU_SHIFT … #define WM8996_DAC1_VU_WIDTH … #define WM8996_DAC1R_VOL_MASK … #define WM8996_DAC1R_VOL_SHIFT … #define WM8996_DAC1R_VOL_WIDTH … /* * R26 (0x1A) - DAC2 Left Volume */ #define WM8996_DAC2L_MUTE … #define WM8996_DAC2L_MUTE_MASK … #define WM8996_DAC2L_MUTE_SHIFT … #define WM8996_DAC2L_MUTE_WIDTH … #define WM8996_DAC2_VU … #define WM8996_DAC2_VU_MASK … #define WM8996_DAC2_VU_SHIFT … #define WM8996_DAC2_VU_WIDTH … #define WM8996_DAC2L_VOL_MASK … #define WM8996_DAC2L_VOL_SHIFT … #define WM8996_DAC2L_VOL_WIDTH … /* * R27 (0x1B) - DAC2 Right Volume */ #define WM8996_DAC2R_MUTE … #define WM8996_DAC2R_MUTE_MASK … #define WM8996_DAC2R_MUTE_SHIFT … #define WM8996_DAC2R_MUTE_WIDTH … #define WM8996_DAC2_VU … #define WM8996_DAC2_VU_MASK … #define WM8996_DAC2_VU_SHIFT … #define WM8996_DAC2_VU_WIDTH … #define WM8996_DAC2R_VOL_MASK … #define WM8996_DAC2R_VOL_SHIFT … #define WM8996_DAC2R_VOL_WIDTH … /* * R28 (0x1C) - Output1 Left Volume */ #define WM8996_DAC1_VU … #define WM8996_DAC1_VU_MASK … #define WM8996_DAC1_VU_SHIFT … #define WM8996_DAC1_VU_WIDTH … #define WM8996_HPOUT1L_ZC … #define WM8996_HPOUT1L_ZC_MASK … #define WM8996_HPOUT1L_ZC_SHIFT … #define WM8996_HPOUT1L_ZC_WIDTH … #define WM8996_HPOUT1L_VOL_MASK … #define WM8996_HPOUT1L_VOL_SHIFT … #define WM8996_HPOUT1L_VOL_WIDTH … /* * R29 (0x1D) - Output1 Right Volume */ #define WM8996_DAC1_VU … #define WM8996_DAC1_VU_MASK … #define WM8996_DAC1_VU_SHIFT … #define WM8996_DAC1_VU_WIDTH … #define WM8996_HPOUT1R_ZC … #define WM8996_HPOUT1R_ZC_MASK … #define WM8996_HPOUT1R_ZC_SHIFT … #define WM8996_HPOUT1R_ZC_WIDTH … #define WM8996_HPOUT1R_VOL_MASK … #define WM8996_HPOUT1R_VOL_SHIFT … #define WM8996_HPOUT1R_VOL_WIDTH … /* * R30 (0x1E) - Output2 Left Volume */ #define WM8996_DAC2_VU … #define WM8996_DAC2_VU_MASK … #define WM8996_DAC2_VU_SHIFT … #define WM8996_DAC2_VU_WIDTH … #define WM8996_HPOUT2L_ZC … #define WM8996_HPOUT2L_ZC_MASK … #define WM8996_HPOUT2L_ZC_SHIFT … #define WM8996_HPOUT2L_ZC_WIDTH … #define WM8996_HPOUT2L_VOL_MASK … #define WM8996_HPOUT2L_VOL_SHIFT … #define WM8996_HPOUT2L_VOL_WIDTH … /* * R31 (0x1F) - Output2 Right Volume */ #define WM8996_DAC2_VU … #define WM8996_DAC2_VU_MASK … #define WM8996_DAC2_VU_SHIFT … #define WM8996_DAC2_VU_WIDTH … #define WM8996_HPOUT2R_ZC … #define WM8996_HPOUT2R_ZC_MASK … #define WM8996_HPOUT2R_ZC_SHIFT … #define WM8996_HPOUT2R_ZC_WIDTH … #define WM8996_HPOUT2R_VOL_MASK … #define WM8996_HPOUT2R_VOL_SHIFT … #define WM8996_HPOUT2R_VOL_WIDTH … /* * R32 (0x20) - MICBIAS (1) */ #define WM8996_MICB1_RATE … #define WM8996_MICB1_RATE_MASK … #define WM8996_MICB1_RATE_SHIFT … #define WM8996_MICB1_RATE_WIDTH … #define WM8996_MICB1_MODE … #define WM8996_MICB1_MODE_MASK … #define WM8996_MICB1_MODE_SHIFT … #define WM8996_MICB1_MODE_WIDTH … #define WM8996_MICB1_LVL_MASK … #define WM8996_MICB1_LVL_SHIFT … #define WM8996_MICB1_LVL_WIDTH … #define WM8996_MICB1_DISCH … #define WM8996_MICB1_DISCH_MASK … #define WM8996_MICB1_DISCH_SHIFT … #define WM8996_MICB1_DISCH_WIDTH … /* * R33 (0x21) - MICBIAS (2) */ #define WM8996_MICB2_RATE … #define WM8996_MICB2_RATE_MASK … #define WM8996_MICB2_RATE_SHIFT … #define WM8996_MICB2_RATE_WIDTH … #define WM8996_MICB2_MODE … #define WM8996_MICB2_MODE_MASK … #define WM8996_MICB2_MODE_SHIFT … #define WM8996_MICB2_MODE_WIDTH … #define WM8996_MICB2_LVL_MASK … #define WM8996_MICB2_LVL_SHIFT … #define WM8996_MICB2_LVL_WIDTH … #define WM8996_MICB2_DISCH … #define WM8996_MICB2_DISCH_MASK … #define WM8996_MICB2_DISCH_SHIFT … #define WM8996_MICB2_DISCH_WIDTH … /* * R40 (0x28) - LDO 1 */ #define WM8996_LDO1_MODE … #define WM8996_LDO1_MODE_MASK … #define WM8996_LDO1_MODE_SHIFT … #define WM8996_LDO1_MODE_WIDTH … #define WM8996_LDO1_VSEL_MASK … #define WM8996_LDO1_VSEL_SHIFT … #define WM8996_LDO1_VSEL_WIDTH … #define WM8996_LDO1_DISCH … #define WM8996_LDO1_DISCH_MASK … #define WM8996_LDO1_DISCH_SHIFT … #define WM8996_LDO1_DISCH_WIDTH … /* * R41 (0x29) - LDO 2 */ #define WM8996_LDO2_MODE … #define WM8996_LDO2_MODE_MASK … #define WM8996_LDO2_MODE_SHIFT … #define WM8996_LDO2_MODE_WIDTH … #define WM8996_LDO2_VSEL_MASK … #define WM8996_LDO2_VSEL_SHIFT … #define WM8996_LDO2_VSEL_WIDTH … #define WM8996_LDO2_DISCH … #define WM8996_LDO2_DISCH_MASK … #define WM8996_LDO2_DISCH_SHIFT … #define WM8996_LDO2_DISCH_WIDTH … /* * R48 (0x30) - Accessory Detect Mode 1 */ #define WM8996_JD_MODE_MASK … #define WM8996_JD_MODE_SHIFT … #define WM8996_JD_MODE_WIDTH … /* * R49 (0x31) - Accessory Detect Mode 2 */ #define WM8996_HPOUT1FB_SRC … #define WM8996_HPOUT1FB_SRC_MASK … #define WM8996_HPOUT1FB_SRC_SHIFT … #define WM8996_HPOUT1FB_SRC_WIDTH … #define WM8996_MICD_SRC … #define WM8996_MICD_SRC_MASK … #define WM8996_MICD_SRC_SHIFT … #define WM8996_MICD_SRC_WIDTH … #define WM8996_MICD_BIAS_SRC … #define WM8996_MICD_BIAS_SRC_MASK … #define WM8996_MICD_BIAS_SRC_SHIFT … #define WM8996_MICD_BIAS_SRC_WIDTH … /* * R52 (0x34) - Headphone Detect 1 */ #define WM8996_HP_HOLDTIME_MASK … #define WM8996_HP_HOLDTIME_SHIFT … #define WM8996_HP_HOLDTIME_WIDTH … #define WM8996_HP_CLK_DIV_MASK … #define WM8996_HP_CLK_DIV_SHIFT … #define WM8996_HP_CLK_DIV_WIDTH … #define WM8996_HP_STEP_SIZE … #define WM8996_HP_STEP_SIZE_MASK … #define WM8996_HP_STEP_SIZE_SHIFT … #define WM8996_HP_STEP_SIZE_WIDTH … #define WM8996_HP_POLL … #define WM8996_HP_POLL_MASK … #define WM8996_HP_POLL_SHIFT … #define WM8996_HP_POLL_WIDTH … /* * R53 (0x35) - Headphone Detect 2 */ #define WM8996_HP_DONE … #define WM8996_HP_DONE_MASK … #define WM8996_HP_DONE_SHIFT … #define WM8996_HP_DONE_WIDTH … #define WM8996_HP_LVL_MASK … #define WM8996_HP_LVL_SHIFT … #define WM8996_HP_LVL_WIDTH … /* * R56 (0x38) - Mic Detect 1 */ #define WM8996_MICD_BIAS_STARTTIME_MASK … #define WM8996_MICD_BIAS_STARTTIME_SHIFT … #define WM8996_MICD_BIAS_STARTTIME_WIDTH … #define WM8996_MICD_RATE_MASK … #define WM8996_MICD_RATE_SHIFT … #define WM8996_MICD_RATE_WIDTH … #define WM8996_MICD_DBTIME … #define WM8996_MICD_DBTIME_MASK … #define WM8996_MICD_DBTIME_SHIFT … #define WM8996_MICD_DBTIME_WIDTH … #define WM8996_MICD_ENA … #define WM8996_MICD_ENA_MASK … #define WM8996_MICD_ENA_SHIFT … #define WM8996_MICD_ENA_WIDTH … /* * R57 (0x39) - Mic Detect 2 */ #define WM8996_MICD_LVL_SEL_MASK … #define WM8996_MICD_LVL_SEL_SHIFT … #define WM8996_MICD_LVL_SEL_WIDTH … /* * R58 (0x3A) - Mic Detect 3 */ #define WM8996_MICD_LVL_MASK … #define WM8996_MICD_LVL_SHIFT … #define WM8996_MICD_LVL_WIDTH … #define WM8996_MICD_VALID … #define WM8996_MICD_VALID_MASK … #define WM8996_MICD_VALID_SHIFT … #define WM8996_MICD_VALID_WIDTH … #define WM8996_MICD_STS … #define WM8996_MICD_STS_MASK … #define WM8996_MICD_STS_SHIFT … #define WM8996_MICD_STS_WIDTH … /* * R64 (0x40) - Charge Pump (1) */ #define WM8996_CP_ENA … #define WM8996_CP_ENA_MASK … #define WM8996_CP_ENA_SHIFT … #define WM8996_CP_ENA_WIDTH … /* * R65 (0x41) - Charge Pump (2) */ #define WM8996_CP_DISCH … #define WM8996_CP_DISCH_MASK … #define WM8996_CP_DISCH_SHIFT … #define WM8996_CP_DISCH_WIDTH … /* * R80 (0x50) - DC Servo (1) */ #define WM8996_DCS_ENA_CHAN_3 … #define WM8996_DCS_ENA_CHAN_3_MASK … #define WM8996_DCS_ENA_CHAN_3_SHIFT … #define WM8996_DCS_ENA_CHAN_3_WIDTH … #define WM8996_DCS_ENA_CHAN_2 … #define WM8996_DCS_ENA_CHAN_2_MASK … #define WM8996_DCS_ENA_CHAN_2_SHIFT … #define WM8996_DCS_ENA_CHAN_2_WIDTH … #define WM8996_DCS_ENA_CHAN_1 … #define WM8996_DCS_ENA_CHAN_1_MASK … #define WM8996_DCS_ENA_CHAN_1_SHIFT … #define WM8996_DCS_ENA_CHAN_1_WIDTH … #define WM8996_DCS_ENA_CHAN_0 … #define WM8996_DCS_ENA_CHAN_0_MASK … #define WM8996_DCS_ENA_CHAN_0_SHIFT … #define WM8996_DCS_ENA_CHAN_0_WIDTH … /* * R81 (0x51) - DC Servo (2) */ #define WM8996_DCS_TRIG_SINGLE_3 … #define WM8996_DCS_TRIG_SINGLE_3_MASK … #define WM8996_DCS_TRIG_SINGLE_3_SHIFT … #define WM8996_DCS_TRIG_SINGLE_3_WIDTH … #define WM8996_DCS_TRIG_SINGLE_2 … #define WM8996_DCS_TRIG_SINGLE_2_MASK … #define WM8996_DCS_TRIG_SINGLE_2_SHIFT … #define WM8996_DCS_TRIG_SINGLE_2_WIDTH … #define WM8996_DCS_TRIG_SINGLE_1 … #define WM8996_DCS_TRIG_SINGLE_1_MASK … #define WM8996_DCS_TRIG_SINGLE_1_SHIFT … #define WM8996_DCS_TRIG_SINGLE_1_WIDTH … #define WM8996_DCS_TRIG_SINGLE_0 … #define WM8996_DCS_TRIG_SINGLE_0_MASK … #define WM8996_DCS_TRIG_SINGLE_0_SHIFT … #define WM8996_DCS_TRIG_SINGLE_0_WIDTH … #define WM8996_DCS_TRIG_SERIES_3 … #define WM8996_DCS_TRIG_SERIES_3_MASK … #define WM8996_DCS_TRIG_SERIES_3_SHIFT … #define WM8996_DCS_TRIG_SERIES_3_WIDTH … #define WM8996_DCS_TRIG_SERIES_2 … #define WM8996_DCS_TRIG_SERIES_2_MASK … #define WM8996_DCS_TRIG_SERIES_2_SHIFT … #define WM8996_DCS_TRIG_SERIES_2_WIDTH … #define WM8996_DCS_TRIG_SERIES_1 … #define WM8996_DCS_TRIG_SERIES_1_MASK … #define WM8996_DCS_TRIG_SERIES_1_SHIFT … #define WM8996_DCS_TRIG_SERIES_1_WIDTH … #define WM8996_DCS_TRIG_SERIES_0 … #define WM8996_DCS_TRIG_SERIES_0_MASK … #define WM8996_DCS_TRIG_SERIES_0_SHIFT … #define WM8996_DCS_TRIG_SERIES_0_WIDTH … #define WM8996_DCS_TRIG_STARTUP_3 … #define WM8996_DCS_TRIG_STARTUP_3_MASK … #define WM8996_DCS_TRIG_STARTUP_3_SHIFT … #define WM8996_DCS_TRIG_STARTUP_3_WIDTH … #define WM8996_DCS_TRIG_STARTUP_2 … #define WM8996_DCS_TRIG_STARTUP_2_MASK … #define WM8996_DCS_TRIG_STARTUP_2_SHIFT … #define WM8996_DCS_TRIG_STARTUP_2_WIDTH … #define WM8996_DCS_TRIG_STARTUP_1 … #define WM8996_DCS_TRIG_STARTUP_1_MASK … #define WM8996_DCS_TRIG_STARTUP_1_SHIFT … #define WM8996_DCS_TRIG_STARTUP_1_WIDTH … #define WM8996_DCS_TRIG_STARTUP_0 … #define WM8996_DCS_TRIG_STARTUP_0_MASK … #define WM8996_DCS_TRIG_STARTUP_0_SHIFT … #define WM8996_DCS_TRIG_STARTUP_0_WIDTH … #define WM8996_DCS_TRIG_DAC_WR_3 … #define WM8996_DCS_TRIG_DAC_WR_3_MASK … #define WM8996_DCS_TRIG_DAC_WR_3_SHIFT … #define WM8996_DCS_TRIG_DAC_WR_3_WIDTH … #define WM8996_DCS_TRIG_DAC_WR_2 … #define WM8996_DCS_TRIG_DAC_WR_2_MASK … #define WM8996_DCS_TRIG_DAC_WR_2_SHIFT … #define WM8996_DCS_TRIG_DAC_WR_2_WIDTH … #define WM8996_DCS_TRIG_DAC_WR_1 … #define WM8996_DCS_TRIG_DAC_WR_1_MASK … #define WM8996_DCS_TRIG_DAC_WR_1_SHIFT … #define WM8996_DCS_TRIG_DAC_WR_1_WIDTH … #define WM8996_DCS_TRIG_DAC_WR_0 … #define WM8996_DCS_TRIG_DAC_WR_0_MASK … #define WM8996_DCS_TRIG_DAC_WR_0_SHIFT … #define WM8996_DCS_TRIG_DAC_WR_0_WIDTH … /* * R82 (0x52) - DC Servo (3) */ #define WM8996_DCS_TIMER_PERIOD_23_MASK … #define WM8996_DCS_TIMER_PERIOD_23_SHIFT … #define WM8996_DCS_TIMER_PERIOD_23_WIDTH … #define WM8996_DCS_TIMER_PERIOD_01_MASK … #define WM8996_DCS_TIMER_PERIOD_01_SHIFT … #define WM8996_DCS_TIMER_PERIOD_01_WIDTH … /* * R84 (0x54) - DC Servo (5) */ #define WM8996_DCS_SERIES_NO_23_MASK … #define WM8996_DCS_SERIES_NO_23_SHIFT … #define WM8996_DCS_SERIES_NO_23_WIDTH … #define WM8996_DCS_SERIES_NO_01_MASK … #define WM8996_DCS_SERIES_NO_01_SHIFT … #define WM8996_DCS_SERIES_NO_01_WIDTH … /* * R85 (0x55) - DC Servo (6) */ #define WM8996_DCS_DAC_WR_VAL_3_MASK … #define WM8996_DCS_DAC_WR_VAL_3_SHIFT … #define WM8996_DCS_DAC_WR_VAL_3_WIDTH … #define WM8996_DCS_DAC_WR_VAL_2_MASK … #define WM8996_DCS_DAC_WR_VAL_2_SHIFT … #define WM8996_DCS_DAC_WR_VAL_2_WIDTH … /* * R86 (0x56) - DC Servo (7) */ #define WM8996_DCS_DAC_WR_VAL_1_MASK … #define WM8996_DCS_DAC_WR_VAL_1_SHIFT … #define WM8996_DCS_DAC_WR_VAL_1_WIDTH … #define WM8996_DCS_DAC_WR_VAL_0_MASK … #define WM8996_DCS_DAC_WR_VAL_0_SHIFT … #define WM8996_DCS_DAC_WR_VAL_0_WIDTH … /* * R87 (0x57) - DC Servo Readback 0 */ #define WM8996_DCS_CAL_COMPLETE_MASK … #define WM8996_DCS_CAL_COMPLETE_SHIFT … #define WM8996_DCS_CAL_COMPLETE_WIDTH … #define WM8996_DCS_DAC_WR_COMPLETE_MASK … #define WM8996_DCS_DAC_WR_COMPLETE_SHIFT … #define WM8996_DCS_DAC_WR_COMPLETE_WIDTH … #define WM8996_DCS_STARTUP_COMPLETE_MASK … #define WM8996_DCS_STARTUP_COMPLETE_SHIFT … #define WM8996_DCS_STARTUP_COMPLETE_WIDTH … /* * R96 (0x60) - Analogue HP (1) */ #define WM8996_HPOUT1L_RMV_SHORT … #define WM8996_HPOUT1L_RMV_SHORT_MASK … #define WM8996_HPOUT1L_RMV_SHORT_SHIFT … #define WM8996_HPOUT1L_RMV_SHORT_WIDTH … #define WM8996_HPOUT1L_OUTP … #define WM8996_HPOUT1L_OUTP_MASK … #define WM8996_HPOUT1L_OUTP_SHIFT … #define WM8996_HPOUT1L_OUTP_WIDTH … #define WM8996_HPOUT1L_DLY … #define WM8996_HPOUT1L_DLY_MASK … #define WM8996_HPOUT1L_DLY_SHIFT … #define WM8996_HPOUT1L_DLY_WIDTH … #define WM8996_HPOUT1R_RMV_SHORT … #define WM8996_HPOUT1R_RMV_SHORT_MASK … #define WM8996_HPOUT1R_RMV_SHORT_SHIFT … #define WM8996_HPOUT1R_RMV_SHORT_WIDTH … #define WM8996_HPOUT1R_OUTP … #define WM8996_HPOUT1R_OUTP_MASK … #define WM8996_HPOUT1R_OUTP_SHIFT … #define WM8996_HPOUT1R_OUTP_WIDTH … #define WM8996_HPOUT1R_DLY … #define WM8996_HPOUT1R_DLY_MASK … #define WM8996_HPOUT1R_DLY_SHIFT … #define WM8996_HPOUT1R_DLY_WIDTH … /* * R97 (0x61) - Analogue HP (2) */ #define WM8996_HPOUT2L_RMV_SHORT … #define WM8996_HPOUT2L_RMV_SHORT_MASK … #define WM8996_HPOUT2L_RMV_SHORT_SHIFT … #define WM8996_HPOUT2L_RMV_SHORT_WIDTH … #define WM8996_HPOUT2L_OUTP … #define WM8996_HPOUT2L_OUTP_MASK … #define WM8996_HPOUT2L_OUTP_SHIFT … #define WM8996_HPOUT2L_OUTP_WIDTH … #define WM8996_HPOUT2L_DLY … #define WM8996_HPOUT2L_DLY_MASK … #define WM8996_HPOUT2L_DLY_SHIFT … #define WM8996_HPOUT2L_DLY_WIDTH … #define WM8996_HPOUT2R_RMV_SHORT … #define WM8996_HPOUT2R_RMV_SHORT_MASK … #define WM8996_HPOUT2R_RMV_SHORT_SHIFT … #define WM8996_HPOUT2R_RMV_SHORT_WIDTH … #define WM8996_HPOUT2R_OUTP … #define WM8996_HPOUT2R_OUTP_MASK … #define WM8996_HPOUT2R_OUTP_SHIFT … #define WM8996_HPOUT2R_OUTP_WIDTH … #define WM8996_HPOUT2R_DLY … #define WM8996_HPOUT2R_DLY_MASK … #define WM8996_HPOUT2R_DLY_SHIFT … #define WM8996_HPOUT2R_DLY_WIDTH … /* * R256 (0x100) - Chip Revision */ #define WM8996_CHIP_REV_MASK … #define WM8996_CHIP_REV_SHIFT … #define WM8996_CHIP_REV_WIDTH … /* * R257 (0x101) - Control Interface (1) */ #define WM8996_REG_SYNC … #define WM8996_REG_SYNC_MASK … #define WM8996_REG_SYNC_SHIFT … #define WM8996_REG_SYNC_WIDTH … #define WM8996_AUTO_INC … #define WM8996_AUTO_INC_MASK … #define WM8996_AUTO_INC_SHIFT … #define WM8996_AUTO_INC_WIDTH … /* * R272 (0x110) - Write Sequencer Ctrl (1) */ #define WM8996_WSEQ_ENA … #define WM8996_WSEQ_ENA_MASK … #define WM8996_WSEQ_ENA_SHIFT … #define WM8996_WSEQ_ENA_WIDTH … #define WM8996_WSEQ_ABORT … #define WM8996_WSEQ_ABORT_MASK … #define WM8996_WSEQ_ABORT_SHIFT … #define WM8996_WSEQ_ABORT_WIDTH … #define WM8996_WSEQ_START … #define WM8996_WSEQ_START_MASK … #define WM8996_WSEQ_START_SHIFT … #define WM8996_WSEQ_START_WIDTH … #define WM8996_WSEQ_START_INDEX_MASK … #define WM8996_WSEQ_START_INDEX_SHIFT … #define WM8996_WSEQ_START_INDEX_WIDTH … /* * R273 (0x111) - Write Sequencer Ctrl (2) */ #define WM8996_WSEQ_BUSY … #define WM8996_WSEQ_BUSY_MASK … #define WM8996_WSEQ_BUSY_SHIFT … #define WM8996_WSEQ_BUSY_WIDTH … #define WM8996_WSEQ_CURRENT_INDEX_MASK … #define WM8996_WSEQ_CURRENT_INDEX_SHIFT … #define WM8996_WSEQ_CURRENT_INDEX_WIDTH … /* * R512 (0x200) - AIF Clocking (1) */ #define WM8996_SYSCLK_SRC_MASK … #define WM8996_SYSCLK_SRC_SHIFT … #define WM8996_SYSCLK_SRC_WIDTH … #define WM8996_SYSCLK_INV … #define WM8996_SYSCLK_INV_MASK … #define WM8996_SYSCLK_INV_SHIFT … #define WM8996_SYSCLK_INV_WIDTH … #define WM8996_SYSCLK_DIV … #define WM8996_SYSCLK_DIV_MASK … #define WM8996_SYSCLK_DIV_SHIFT … #define WM8996_SYSCLK_DIV_WIDTH … #define WM8996_SYSCLK_ENA … #define WM8996_SYSCLK_ENA_MASK … #define WM8996_SYSCLK_ENA_SHIFT … #define WM8996_SYSCLK_ENA_WIDTH … /* * R513 (0x201) - AIF Clocking (2) */ #define WM8996_DSP2_DIV_MASK … #define WM8996_DSP2_DIV_SHIFT … #define WM8996_DSP2_DIV_WIDTH … #define WM8996_DSP1_DIV_MASK … #define WM8996_DSP1_DIV_SHIFT … #define WM8996_DSP1_DIV_WIDTH … /* * R520 (0x208) - Clocking (1) */ #define WM8996_LFCLK_ENA … #define WM8996_LFCLK_ENA_MASK … #define WM8996_LFCLK_ENA_SHIFT … #define WM8996_LFCLK_ENA_WIDTH … #define WM8996_TOCLK_ENA … #define WM8996_TOCLK_ENA_MASK … #define WM8996_TOCLK_ENA_SHIFT … #define WM8996_TOCLK_ENA_WIDTH … #define WM8996_AIFCLK_ENA … #define WM8996_AIFCLK_ENA_MASK … #define WM8996_AIFCLK_ENA_SHIFT … #define WM8996_AIFCLK_ENA_WIDTH … #define WM8996_SYSDSPCLK_ENA … #define WM8996_SYSDSPCLK_ENA_MASK … #define WM8996_SYSDSPCLK_ENA_SHIFT … #define WM8996_SYSDSPCLK_ENA_WIDTH … /* * R521 (0x209) - Clocking (2) */ #define WM8996_TOCLK_DIV_MASK … #define WM8996_TOCLK_DIV_SHIFT … #define WM8996_TOCLK_DIV_WIDTH … #define WM8996_DBCLK_DIV_MASK … #define WM8996_DBCLK_DIV_SHIFT … #define WM8996_DBCLK_DIV_WIDTH … #define WM8996_OPCLK_DIV_MASK … #define WM8996_OPCLK_DIV_SHIFT … #define WM8996_OPCLK_DIV_WIDTH … /* * R528 (0x210) - AIF Rate */ #define WM8996_SYSCLK_RATE … #define WM8996_SYSCLK_RATE_MASK … #define WM8996_SYSCLK_RATE_SHIFT … #define WM8996_SYSCLK_RATE_WIDTH … /* * R544 (0x220) - FLL Control (1) */ #define WM8996_FLL_OSC_ENA … #define WM8996_FLL_OSC_ENA_MASK … #define WM8996_FLL_OSC_ENA_SHIFT … #define WM8996_FLL_OSC_ENA_WIDTH … #define WM8996_FLL_ENA … #define WM8996_FLL_ENA_MASK … #define WM8996_FLL_ENA_SHIFT … #define WM8996_FLL_ENA_WIDTH … /* * R545 (0x221) - FLL Control (2) */ #define WM8996_FLL_OUTDIV_MASK … #define WM8996_FLL_OUTDIV_SHIFT … #define WM8996_FLL_OUTDIV_WIDTH … #define WM8996_FLL_FRATIO_MASK … #define WM8996_FLL_FRATIO_SHIFT … #define WM8996_FLL_FRATIO_WIDTH … /* * R546 (0x222) - FLL Control (3) */ #define WM8996_FLL_THETA_MASK … #define WM8996_FLL_THETA_SHIFT … #define WM8996_FLL_THETA_WIDTH … /* * R547 (0x223) - FLL Control (4) */ #define WM8996_FLL_N_MASK … #define WM8996_FLL_N_SHIFT … #define WM8996_FLL_N_WIDTH … #define WM8996_FLL_LOOP_GAIN_MASK … #define WM8996_FLL_LOOP_GAIN_SHIFT … #define WM8996_FLL_LOOP_GAIN_WIDTH … /* * R548 (0x224) - FLL Control (5) */ #define WM8996_FLL_FRC_NCO_VAL_MASK … #define WM8996_FLL_FRC_NCO_VAL_SHIFT … #define WM8996_FLL_FRC_NCO_VAL_WIDTH … #define WM8996_FLL_FRC_NCO … #define WM8996_FLL_FRC_NCO_MASK … #define WM8996_FLL_FRC_NCO_SHIFT … #define WM8996_FLL_FRC_NCO_WIDTH … #define WM8996_FLL_REFCLK_DIV_MASK … #define WM8996_FLL_REFCLK_DIV_SHIFT … #define WM8996_FLL_REFCLK_DIV_WIDTH … #define WM8996_FLL_REF_FREQ … #define WM8996_FLL_REF_FREQ_MASK … #define WM8996_FLL_REF_FREQ_SHIFT … #define WM8996_FLL_REF_FREQ_WIDTH … #define WM8996_FLL_REFCLK_SRC_MASK … #define WM8996_FLL_REFCLK_SRC_SHIFT … #define WM8996_FLL_REFCLK_SRC_WIDTH … /* * R549 (0x225) - FLL Control (6) */ #define WM8996_FLL_REFCLK_SRC_STS_MASK … #define WM8996_FLL_REFCLK_SRC_STS_SHIFT … #define WM8996_FLL_REFCLK_SRC_STS_WIDTH … #define WM8996_FLL_SWITCH_CLK … #define WM8996_FLL_SWITCH_CLK_MASK … #define WM8996_FLL_SWITCH_CLK_SHIFT … #define WM8996_FLL_SWITCH_CLK_WIDTH … /* * R550 (0x226) - FLL EFS 1 */ #define WM8996_FLL_LAMBDA_MASK … #define WM8996_FLL_LAMBDA_SHIFT … #define WM8996_FLL_LAMBDA_WIDTH … /* * R551 (0x227) - FLL EFS 2 */ #define WM8996_FLL_LFSR_SEL_MASK … #define WM8996_FLL_LFSR_SEL_SHIFT … #define WM8996_FLL_LFSR_SEL_WIDTH … #define WM8996_FLL_EFS_ENA … #define WM8996_FLL_EFS_ENA_MASK … #define WM8996_FLL_EFS_ENA_SHIFT … #define WM8996_FLL_EFS_ENA_WIDTH … /* * R768 (0x300) - AIF1 Control */ #define WM8996_AIF1_TRI … #define WM8996_AIF1_TRI_MASK … #define WM8996_AIF1_TRI_SHIFT … #define WM8996_AIF1_TRI_WIDTH … #define WM8996_AIF1_FMT_MASK … #define WM8996_AIF1_FMT_SHIFT … #define WM8996_AIF1_FMT_WIDTH … /* * R769 (0x301) - AIF1 BCLK */ #define WM8996_AIF1_BCLK_INV … #define WM8996_AIF1_BCLK_INV_MASK … #define WM8996_AIF1_BCLK_INV_SHIFT … #define WM8996_AIF1_BCLK_INV_WIDTH … #define WM8996_AIF1_BCLK_FRC … #define WM8996_AIF1_BCLK_FRC_MASK … #define WM8996_AIF1_BCLK_FRC_SHIFT … #define WM8996_AIF1_BCLK_FRC_WIDTH … #define WM8996_AIF1_BCLK_MSTR … #define WM8996_AIF1_BCLK_MSTR_MASK … #define WM8996_AIF1_BCLK_MSTR_SHIFT … #define WM8996_AIF1_BCLK_MSTR_WIDTH … #define WM8996_AIF1_BCLK_DIV_MASK … #define WM8996_AIF1_BCLK_DIV_SHIFT … #define WM8996_AIF1_BCLK_DIV_WIDTH … /* * R770 (0x302) - AIF1 TX LRCLK(1) */ #define WM8996_AIF1TX_RATE_MASK … #define WM8996_AIF1TX_RATE_SHIFT … #define WM8996_AIF1TX_RATE_WIDTH … /* * R771 (0x303) - AIF1 TX LRCLK(2) */ #define WM8996_AIF1TX_LRCLK_MODE … #define WM8996_AIF1TX_LRCLK_MODE_MASK … #define WM8996_AIF1TX_LRCLK_MODE_SHIFT … #define WM8996_AIF1TX_LRCLK_MODE_WIDTH … #define WM8996_AIF1TX_LRCLK_INV … #define WM8996_AIF1TX_LRCLK_INV_MASK … #define WM8996_AIF1TX_LRCLK_INV_SHIFT … #define WM8996_AIF1TX_LRCLK_INV_WIDTH … #define WM8996_AIF1TX_LRCLK_FRC … #define WM8996_AIF1TX_LRCLK_FRC_MASK … #define WM8996_AIF1TX_LRCLK_FRC_SHIFT … #define WM8996_AIF1TX_LRCLK_FRC_WIDTH … #define WM8996_AIF1TX_LRCLK_MSTR … #define WM8996_AIF1TX_LRCLK_MSTR_MASK … #define WM8996_AIF1TX_LRCLK_MSTR_SHIFT … #define WM8996_AIF1TX_LRCLK_MSTR_WIDTH … /* * R772 (0x304) - AIF1 RX LRCLK(1) */ #define WM8996_AIF1RX_RATE_MASK … #define WM8996_AIF1RX_RATE_SHIFT … #define WM8996_AIF1RX_RATE_WIDTH … /* * R773 (0x305) - AIF1 RX LRCLK(2) */ #define WM8996_AIF1RX_LRCLK_INV … #define WM8996_AIF1RX_LRCLK_INV_MASK … #define WM8996_AIF1RX_LRCLK_INV_SHIFT … #define WM8996_AIF1RX_LRCLK_INV_WIDTH … #define WM8996_AIF1RX_LRCLK_FRC … #define WM8996_AIF1RX_LRCLK_FRC_MASK … #define WM8996_AIF1RX_LRCLK_FRC_SHIFT … #define WM8996_AIF1RX_LRCLK_FRC_WIDTH … #define WM8996_AIF1RX_LRCLK_MSTR … #define WM8996_AIF1RX_LRCLK_MSTR_MASK … #define WM8996_AIF1RX_LRCLK_MSTR_SHIFT … #define WM8996_AIF1RX_LRCLK_MSTR_WIDTH … /* * R774 (0x306) - AIF1TX Data Configuration (1) */ #define WM8996_AIF1TX_WL_MASK … #define WM8996_AIF1TX_WL_SHIFT … #define WM8996_AIF1TX_WL_WIDTH … #define WM8996_AIF1TX_SLOT_LEN_MASK … #define WM8996_AIF1TX_SLOT_LEN_SHIFT … #define WM8996_AIF1TX_SLOT_LEN_WIDTH … /* * R775 (0x307) - AIF1TX Data Configuration (2) */ #define WM8996_AIF1TX_DAT_TRI … #define WM8996_AIF1TX_DAT_TRI_MASK … #define WM8996_AIF1TX_DAT_TRI_SHIFT … #define WM8996_AIF1TX_DAT_TRI_WIDTH … /* * R776 (0x308) - AIF1RX Data Configuration */ #define WM8996_AIF1RX_WL_MASK … #define WM8996_AIF1RX_WL_SHIFT … #define WM8996_AIF1RX_WL_WIDTH … #define WM8996_AIF1RX_SLOT_LEN_MASK … #define WM8996_AIF1RX_SLOT_LEN_SHIFT … #define WM8996_AIF1RX_SLOT_LEN_WIDTH … /* * R777 (0x309) - AIF1TX Channel 0 Configuration */ #define WM8996_AIF1TX_CHAN0_DAT_INV … #define WM8996_AIF1TX_CHAN0_DAT_INV_MASK … #define WM8996_AIF1TX_CHAN0_DAT_INV_SHIFT … #define WM8996_AIF1TX_CHAN0_DAT_INV_WIDTH … #define WM8996_AIF1TX_CHAN0_SPACING_MASK … #define WM8996_AIF1TX_CHAN0_SPACING_SHIFT … #define WM8996_AIF1TX_CHAN0_SPACING_WIDTH … #define WM8996_AIF1TX_CHAN0_SLOTS_MASK … #define WM8996_AIF1TX_CHAN0_SLOTS_SHIFT … #define WM8996_AIF1TX_CHAN0_SLOTS_WIDTH … #define WM8996_AIF1TX_CHAN0_START_SLOT_MASK … #define WM8996_AIF1TX_CHAN0_START_SLOT_SHIFT … #define WM8996_AIF1TX_CHAN0_START_SLOT_WIDTH … /* * R778 (0x30A) - AIF1TX Channel 1 Configuration */ #define WM8996_AIF1TX_CHAN1_DAT_INV … #define WM8996_AIF1TX_CHAN1_DAT_INV_MASK … #define WM8996_AIF1TX_CHAN1_DAT_INV_SHIFT … #define WM8996_AIF1TX_CHAN1_DAT_INV_WIDTH … #define WM8996_AIF1TX_CHAN1_SPACING_MASK … #define WM8996_AIF1TX_CHAN1_SPACING_SHIFT … #define WM8996_AIF1TX_CHAN1_SPACING_WIDTH … #define WM8996_AIF1TX_CHAN1_SLOTS_MASK … #define WM8996_AIF1TX_CHAN1_SLOTS_SHIFT … #define WM8996_AIF1TX_CHAN1_SLOTS_WIDTH … #define WM8996_AIF1TX_CHAN1_START_SLOT_MASK … #define WM8996_AIF1TX_CHAN1_START_SLOT_SHIFT … #define WM8996_AIF1TX_CHAN1_START_SLOT_WIDTH … /* * R779 (0x30B) - AIF1TX Channel 2 Configuration */ #define WM8996_AIF1TX_CHAN2_DAT_INV … #define WM8996_AIF1TX_CHAN2_DAT_INV_MASK … #define WM8996_AIF1TX_CHAN2_DAT_INV_SHIFT … #define WM8996_AIF1TX_CHAN2_DAT_INV_WIDTH … #define WM8996_AIF1TX_CHAN2_SPACING_MASK … #define WM8996_AIF1TX_CHAN2_SPACING_SHIFT … #define WM8996_AIF1TX_CHAN2_SPACING_WIDTH … #define WM8996_AIF1TX_CHAN2_SLOTS_MASK … #define WM8996_AIF1TX_CHAN2_SLOTS_SHIFT … #define WM8996_AIF1TX_CHAN2_SLOTS_WIDTH … #define WM8996_AIF1TX_CHAN2_START_SLOT_MASK … #define WM8996_AIF1TX_CHAN2_START_SLOT_SHIFT … #define WM8996_AIF1TX_CHAN2_START_SLOT_WIDTH … /* * R780 (0x30C) - AIF1TX Channel 3 Configuration */ #define WM8996_AIF1TX_CHAN3_DAT_INV … #define WM8996_AIF1TX_CHAN3_DAT_INV_MASK … #define WM8996_AIF1TX_CHAN3_DAT_INV_SHIFT … #define WM8996_AIF1TX_CHAN3_DAT_INV_WIDTH … #define WM8996_AIF1TX_CHAN3_SPACING_MASK … #define WM8996_AIF1TX_CHAN3_SPACING_SHIFT … #define WM8996_AIF1TX_CHAN3_SPACING_WIDTH … #define WM8996_AIF1TX_CHAN3_SLOTS_MASK … #define WM8996_AIF1TX_CHAN3_SLOTS_SHIFT … #define WM8996_AIF1TX_CHAN3_SLOTS_WIDTH … #define WM8996_AIF1TX_CHAN3_START_SLOT_MASK … #define WM8996_AIF1TX_CHAN3_START_SLOT_SHIFT … #define WM8996_AIF1TX_CHAN3_START_SLOT_WIDTH … /* * R781 (0x30D) - AIF1TX Channel 4 Configuration */ #define WM8996_AIF1TX_CHAN4_DAT_INV … #define WM8996_AIF1TX_CHAN4_DAT_INV_MASK … #define WM8996_AIF1TX_CHAN4_DAT_INV_SHIFT … #define WM8996_AIF1TX_CHAN4_DAT_INV_WIDTH … #define WM8996_AIF1TX_CHAN4_SPACING_MASK … #define WM8996_AIF1TX_CHAN4_SPACING_SHIFT … #define WM8996_AIF1TX_CHAN4_SPACING_WIDTH … #define WM8996_AIF1TX_CHAN4_SLOTS_MASK … #define WM8996_AIF1TX_CHAN4_SLOTS_SHIFT … #define WM8996_AIF1TX_CHAN4_SLOTS_WIDTH … #define WM8996_AIF1TX_CHAN4_START_SLOT_MASK … #define WM8996_AIF1TX_CHAN4_START_SLOT_SHIFT … #define WM8996_AIF1TX_CHAN4_START_SLOT_WIDTH … /* * R782 (0x30E) - AIF1TX Channel 5 Configuration */ #define WM8996_AIF1TX_CHAN5_DAT_INV … #define WM8996_AIF1TX_CHAN5_DAT_INV_MASK … #define WM8996_AIF1TX_CHAN5_DAT_INV_SHIFT … #define WM8996_AIF1TX_CHAN5_DAT_INV_WIDTH … #define WM8996_AIF1TX_CHAN5_SPACING_MASK … #define WM8996_AIF1TX_CHAN5_SPACING_SHIFT … #define WM8996_AIF1TX_CHAN5_SPACING_WIDTH … #define WM8996_AIF1TX_CHAN5_SLOTS_MASK … #define WM8996_AIF1TX_CHAN5_SLOTS_SHIFT … #define WM8996_AIF1TX_CHAN5_SLOTS_WIDTH … #define WM8996_AIF1TX_CHAN5_START_SLOT_MASK … #define WM8996_AIF1TX_CHAN5_START_SLOT_SHIFT … #define WM8996_AIF1TX_CHAN5_START_SLOT_WIDTH … /* * R783 (0x30F) - AIF1RX Channel 0 Configuration */ #define WM8996_AIF1RX_CHAN0_DAT_INV … #define WM8996_AIF1RX_CHAN0_DAT_INV_MASK … #define WM8996_AIF1RX_CHAN0_DAT_INV_SHIFT … #define WM8996_AIF1RX_CHAN0_DAT_INV_WIDTH … #define WM8996_AIF1RX_CHAN0_SPACING_MASK … #define WM8996_AIF1RX_CHAN0_SPACING_SHIFT … #define WM8996_AIF1RX_CHAN0_SPACING_WIDTH … #define WM8996_AIF1RX_CHAN0_SLOTS_MASK … #define WM8996_AIF1RX_CHAN0_SLOTS_SHIFT … #define WM8996_AIF1RX_CHAN0_SLOTS_WIDTH … #define WM8996_AIF1RX_CHAN0_START_SLOT_MASK … #define WM8996_AIF1RX_CHAN0_START_SLOT_SHIFT … #define WM8996_AIF1RX_CHAN0_START_SLOT_WIDTH … /* * R784 (0x310) - AIF1RX Channel 1 Configuration */ #define WM8996_AIF1RX_CHAN1_DAT_INV … #define WM8996_AIF1RX_CHAN1_DAT_INV_MASK … #define WM8996_AIF1RX_CHAN1_DAT_INV_SHIFT … #define WM8996_AIF1RX_CHAN1_DAT_INV_WIDTH … #define WM8996_AIF1RX_CHAN1_SPACING_MASK … #define WM8996_AIF1RX_CHAN1_SPACING_SHIFT … #define WM8996_AIF1RX_CHAN1_SPACING_WIDTH … #define WM8996_AIF1RX_CHAN1_SLOTS_MASK … #define WM8996_AIF1RX_CHAN1_SLOTS_SHIFT … #define WM8996_AIF1RX_CHAN1_SLOTS_WIDTH … #define WM8996_AIF1RX_CHAN1_START_SLOT_MASK … #define WM8996_AIF1RX_CHAN1_START_SLOT_SHIFT … #define WM8996_AIF1RX_CHAN1_START_SLOT_WIDTH … /* * R785 (0x311) - AIF1RX Channel 2 Configuration */ #define WM8996_AIF1RX_CHAN2_DAT_INV … #define WM8996_AIF1RX_CHAN2_DAT_INV_MASK … #define WM8996_AIF1RX_CHAN2_DAT_INV_SHIFT … #define WM8996_AIF1RX_CHAN2_DAT_INV_WIDTH … #define WM8996_AIF1RX_CHAN2_SPACING_MASK … #define WM8996_AIF1RX_CHAN2_SPACING_SHIFT … #define WM8996_AIF1RX_CHAN2_SPACING_WIDTH … #define WM8996_AIF1RX_CHAN2_SLOTS_MASK … #define WM8996_AIF1RX_CHAN2_SLOTS_SHIFT … #define WM8996_AIF1RX_CHAN2_SLOTS_WIDTH … #define WM8996_AIF1RX_CHAN2_START_SLOT_MASK … #define WM8996_AIF1RX_CHAN2_START_SLOT_SHIFT … #define WM8996_AIF1RX_CHAN2_START_SLOT_WIDTH … /* * R786 (0x312) - AIF1RX Channel 3 Configuration */ #define WM8996_AIF1RX_CHAN3_DAT_INV … #define WM8996_AIF1RX_CHAN3_DAT_INV_MASK … #define WM8996_AIF1RX_CHAN3_DAT_INV_SHIFT … #define WM8996_AIF1RX_CHAN3_DAT_INV_WIDTH … #define WM8996_AIF1RX_CHAN3_SPACING_MASK … #define WM8996_AIF1RX_CHAN3_SPACING_SHIFT … #define WM8996_AIF1RX_CHAN3_SPACING_WIDTH … #define WM8996_AIF1RX_CHAN3_SLOTS_MASK … #define WM8996_AIF1RX_CHAN3_SLOTS_SHIFT … #define WM8996_AIF1RX_CHAN3_SLOTS_WIDTH … #define WM8996_AIF1RX_CHAN3_START_SLOT_MASK … #define WM8996_AIF1RX_CHAN3_START_SLOT_SHIFT … #define WM8996_AIF1RX_CHAN3_START_SLOT_WIDTH … /* * R787 (0x313) - AIF1RX Channel 4 Configuration */ #define WM8996_AIF1RX_CHAN4_DAT_INV … #define WM8996_AIF1RX_CHAN4_DAT_INV_MASK … #define WM8996_AIF1RX_CHAN4_DAT_INV_SHIFT … #define WM8996_AIF1RX_CHAN4_DAT_INV_WIDTH … #define WM8996_AIF1RX_CHAN4_SPACING_MASK … #define WM8996_AIF1RX_CHAN4_SPACING_SHIFT … #define WM8996_AIF1RX_CHAN4_SPACING_WIDTH … #define WM8996_AIF1RX_CHAN4_SLOTS_MASK … #define WM8996_AIF1RX_CHAN4_SLOTS_SHIFT … #define WM8996_AIF1RX_CHAN4_SLOTS_WIDTH … #define WM8996_AIF1RX_CHAN4_START_SLOT_MASK … #define WM8996_AIF1RX_CHAN4_START_SLOT_SHIFT … #define WM8996_AIF1RX_CHAN4_START_SLOT_WIDTH … /* * R788 (0x314) - AIF1RX Channel 5 Configuration */ #define WM8996_AIF1RX_CHAN5_DAT_INV … #define WM8996_AIF1RX_CHAN5_DAT_INV_MASK … #define WM8996_AIF1RX_CHAN5_DAT_INV_SHIFT … #define WM8996_AIF1RX_CHAN5_DAT_INV_WIDTH … #define WM8996_AIF1RX_CHAN5_SPACING_MASK … #define WM8996_AIF1RX_CHAN5_SPACING_SHIFT … #define WM8996_AIF1RX_CHAN5_SPACING_WIDTH … #define WM8996_AIF1RX_CHAN5_SLOTS_MASK … #define WM8996_AIF1RX_CHAN5_SLOTS_SHIFT … #define WM8996_AIF1RX_CHAN5_SLOTS_WIDTH … #define WM8996_AIF1RX_CHAN5_START_SLOT_MASK … #define WM8996_AIF1RX_CHAN5_START_SLOT_SHIFT … #define WM8996_AIF1RX_CHAN5_START_SLOT_WIDTH … /* * R789 (0x315) - AIF1RX Mono Configuration */ #define WM8996_AIF1RX_CHAN4_MONO_MODE … #define WM8996_AIF1RX_CHAN4_MONO_MODE_MASK … #define WM8996_AIF1RX_CHAN4_MONO_MODE_SHIFT … #define WM8996_AIF1RX_CHAN4_MONO_MODE_WIDTH … #define WM8996_AIF1RX_CHAN2_MONO_MODE … #define WM8996_AIF1RX_CHAN2_MONO_MODE_MASK … #define WM8996_AIF1RX_CHAN2_MONO_MODE_SHIFT … #define WM8996_AIF1RX_CHAN2_MONO_MODE_WIDTH … #define WM8996_AIF1RX_CHAN0_MONO_MODE … #define WM8996_AIF1RX_CHAN0_MONO_MODE_MASK … #define WM8996_AIF1RX_CHAN0_MONO_MODE_SHIFT … #define WM8996_AIF1RX_CHAN0_MONO_MODE_WIDTH … /* * R794 (0x31A) - AIF1TX Test */ #define WM8996_AIF1TX45_DITHER_ENA … #define WM8996_AIF1TX45_DITHER_ENA_MASK … #define WM8996_AIF1TX45_DITHER_ENA_SHIFT … #define WM8996_AIF1TX45_DITHER_ENA_WIDTH … #define WM8996_AIF1TX23_DITHER_ENA … #define WM8996_AIF1TX23_DITHER_ENA_MASK … #define WM8996_AIF1TX23_DITHER_ENA_SHIFT … #define WM8996_AIF1TX23_DITHER_ENA_WIDTH … #define WM8996_AIF1TX01_DITHER_ENA … #define WM8996_AIF1TX01_DITHER_ENA_MASK … #define WM8996_AIF1TX01_DITHER_ENA_SHIFT … #define WM8996_AIF1TX01_DITHER_ENA_WIDTH … /* * R800 (0x320) - AIF2 Control */ #define WM8996_AIF2_TRI … #define WM8996_AIF2_TRI_MASK … #define WM8996_AIF2_TRI_SHIFT … #define WM8996_AIF2_TRI_WIDTH … #define WM8996_AIF2_FMT_MASK … #define WM8996_AIF2_FMT_SHIFT … #define WM8996_AIF2_FMT_WIDTH … /* * R801 (0x321) - AIF2 BCLK */ #define WM8996_AIF2_BCLK_INV … #define WM8996_AIF2_BCLK_INV_MASK … #define WM8996_AIF2_BCLK_INV_SHIFT … #define WM8996_AIF2_BCLK_INV_WIDTH … #define WM8996_AIF2_BCLK_FRC … #define WM8996_AIF2_BCLK_FRC_MASK … #define WM8996_AIF2_BCLK_FRC_SHIFT … #define WM8996_AIF2_BCLK_FRC_WIDTH … #define WM8996_AIF2_BCLK_MSTR … #define WM8996_AIF2_BCLK_MSTR_MASK … #define WM8996_AIF2_BCLK_MSTR_SHIFT … #define WM8996_AIF2_BCLK_MSTR_WIDTH … #define WM8996_AIF2_BCLK_DIV_MASK … #define WM8996_AIF2_BCLK_DIV_SHIFT … #define WM8996_AIF2_BCLK_DIV_WIDTH … /* * R802 (0x322) - AIF2 TX LRCLK(1) */ #define WM8996_AIF2TX_RATE_MASK … #define WM8996_AIF2TX_RATE_SHIFT … #define WM8996_AIF2TX_RATE_WIDTH … /* * R803 (0x323) - AIF2 TX LRCLK(2) */ #define WM8996_AIF2TX_LRCLK_MODE … #define WM8996_AIF2TX_LRCLK_MODE_MASK … #define WM8996_AIF2TX_LRCLK_MODE_SHIFT … #define WM8996_AIF2TX_LRCLK_MODE_WIDTH … #define WM8996_AIF2TX_LRCLK_INV … #define WM8996_AIF2TX_LRCLK_INV_MASK … #define WM8996_AIF2TX_LRCLK_INV_SHIFT … #define WM8996_AIF2TX_LRCLK_INV_WIDTH … #define WM8996_AIF2TX_LRCLK_FRC … #define WM8996_AIF2TX_LRCLK_FRC_MASK … #define WM8996_AIF2TX_LRCLK_FRC_SHIFT … #define WM8996_AIF2TX_LRCLK_FRC_WIDTH … #define WM8996_AIF2TX_LRCLK_MSTR … #define WM8996_AIF2TX_LRCLK_MSTR_MASK … #define WM8996_AIF2TX_LRCLK_MSTR_SHIFT … #define WM8996_AIF2TX_LRCLK_MSTR_WIDTH … /* * R804 (0x324) - AIF2 RX LRCLK(1) */ #define WM8996_AIF2RX_RATE_MASK … #define WM8996_AIF2RX_RATE_SHIFT … #define WM8996_AIF2RX_RATE_WIDTH … /* * R805 (0x325) - AIF2 RX LRCLK(2) */ #define WM8996_AIF2RX_LRCLK_INV … #define WM8996_AIF2RX_LRCLK_INV_MASK … #define WM8996_AIF2RX_LRCLK_INV_SHIFT … #define WM8996_AIF2RX_LRCLK_INV_WIDTH … #define WM8996_AIF2RX_LRCLK_FRC … #define WM8996_AIF2RX_LRCLK_FRC_MASK … #define WM8996_AIF2RX_LRCLK_FRC_SHIFT … #define WM8996_AIF2RX_LRCLK_FRC_WIDTH … #define WM8996_AIF2RX_LRCLK_MSTR … #define WM8996_AIF2RX_LRCLK_MSTR_MASK … #define WM8996_AIF2RX_LRCLK_MSTR_SHIFT … #define WM8996_AIF2RX_LRCLK_MSTR_WIDTH … /* * R806 (0x326) - AIF2TX Data Configuration (1) */ #define WM8996_AIF2TX_WL_MASK … #define WM8996_AIF2TX_WL_SHIFT … #define WM8996_AIF2TX_WL_WIDTH … #define WM8996_AIF2TX_SLOT_LEN_MASK … #define WM8996_AIF2TX_SLOT_LEN_SHIFT … #define WM8996_AIF2TX_SLOT_LEN_WIDTH … /* * R807 (0x327) - AIF2TX Data Configuration (2) */ #define WM8996_AIF2TX_DAT_TRI … #define WM8996_AIF2TX_DAT_TRI_MASK … #define WM8996_AIF2TX_DAT_TRI_SHIFT … #define WM8996_AIF2TX_DAT_TRI_WIDTH … /* * R808 (0x328) - AIF2RX Data Configuration */ #define WM8996_AIF2RX_WL_MASK … #define WM8996_AIF2RX_WL_SHIFT … #define WM8996_AIF2RX_WL_WIDTH … #define WM8996_AIF2RX_SLOT_LEN_MASK … #define WM8996_AIF2RX_SLOT_LEN_SHIFT … #define WM8996_AIF2RX_SLOT_LEN_WIDTH … /* * R809 (0x329) - AIF2TX Channel 0 Configuration */ #define WM8996_AIF2TX_CHAN0_DAT_INV … #define WM8996_AIF2TX_CHAN0_DAT_INV_MASK … #define WM8996_AIF2TX_CHAN0_DAT_INV_SHIFT … #define WM8996_AIF2TX_CHAN0_DAT_INV_WIDTH … #define WM8996_AIF2TX_CHAN0_SPACING_MASK … #define WM8996_AIF2TX_CHAN0_SPACING_SHIFT … #define WM8996_AIF2TX_CHAN0_SPACING_WIDTH … #define WM8996_AIF2TX_CHAN0_SLOTS_MASK … #define WM8996_AIF2TX_CHAN0_SLOTS_SHIFT … #define WM8996_AIF2TX_CHAN0_SLOTS_WIDTH … #define WM8996_AIF2TX_CHAN0_START_SLOT_MASK … #define WM8996_AIF2TX_CHAN0_START_SLOT_SHIFT … #define WM8996_AIF2TX_CHAN0_START_SLOT_WIDTH … /* * R810 (0x32A) - AIF2TX Channel 1 Configuration */ #define WM8996_AIF2TX_CHAN1_DAT_INV … #define WM8996_AIF2TX_CHAN1_DAT_INV_MASK … #define WM8996_AIF2TX_CHAN1_DAT_INV_SHIFT … #define WM8996_AIF2TX_CHAN1_DAT_INV_WIDTH … #define WM8996_AIF2TX_CHAN1_SPACING_MASK … #define WM8996_AIF2TX_CHAN1_SPACING_SHIFT … #define WM8996_AIF2TX_CHAN1_SPACING_WIDTH … #define WM8996_AIF2TX_CHAN1_SLOTS_MASK … #define WM8996_AIF2TX_CHAN1_SLOTS_SHIFT … #define WM8996_AIF2TX_CHAN1_SLOTS_WIDTH … #define WM8996_AIF2TX_CHAN1_START_SLOT_MASK … #define WM8996_AIF2TX_CHAN1_START_SLOT_SHIFT … #define WM8996_AIF2TX_CHAN1_START_SLOT_WIDTH … /* * R811 (0x32B) - AIF2RX Channel 0 Configuration */ #define WM8996_AIF2RX_CHAN0_DAT_INV … #define WM8996_AIF2RX_CHAN0_DAT_INV_MASK … #define WM8996_AIF2RX_CHAN0_DAT_INV_SHIFT … #define WM8996_AIF2RX_CHAN0_DAT_INV_WIDTH … #define WM8996_AIF2RX_CHAN0_SPACING_MASK … #define WM8996_AIF2RX_CHAN0_SPACING_SHIFT … #define WM8996_AIF2RX_CHAN0_SPACING_WIDTH … #define WM8996_AIF2RX_CHAN0_SLOTS_MASK … #define WM8996_AIF2RX_CHAN0_SLOTS_SHIFT … #define WM8996_AIF2RX_CHAN0_SLOTS_WIDTH … #define WM8996_AIF2RX_CHAN0_START_SLOT_MASK … #define WM8996_AIF2RX_CHAN0_START_SLOT_SHIFT … #define WM8996_AIF2RX_CHAN0_START_SLOT_WIDTH … /* * R812 (0x32C) - AIF2RX Channel 1 Configuration */ #define WM8996_AIF2RX_CHAN1_DAT_INV … #define WM8996_AIF2RX_CHAN1_DAT_INV_MASK … #define WM8996_AIF2RX_CHAN1_DAT_INV_SHIFT … #define WM8996_AIF2RX_CHAN1_DAT_INV_WIDTH … #define WM8996_AIF2RX_CHAN1_SPACING_MASK … #define WM8996_AIF2RX_CHAN1_SPACING_SHIFT … #define WM8996_AIF2RX_CHAN1_SPACING_WIDTH … #define WM8996_AIF2RX_CHAN1_SLOTS_MASK … #define WM8996_AIF2RX_CHAN1_SLOTS_SHIFT … #define WM8996_AIF2RX_CHAN1_SLOTS_WIDTH … #define WM8996_AIF2RX_CHAN1_START_SLOT_MASK … #define WM8996_AIF2RX_CHAN1_START_SLOT_SHIFT … #define WM8996_AIF2RX_CHAN1_START_SLOT_WIDTH … /* * R813 (0x32D) - AIF2RX Mono Configuration */ #define WM8996_AIF2RX_CHAN0_MONO_MODE … #define WM8996_AIF2RX_CHAN0_MONO_MODE_MASK … #define WM8996_AIF2RX_CHAN0_MONO_MODE_SHIFT … #define WM8996_AIF2RX_CHAN0_MONO_MODE_WIDTH … /* * R815 (0x32F) - AIF2TX Test */ #define WM8996_AIF2TX_DITHER_ENA … #define WM8996_AIF2TX_DITHER_ENA_MASK … #define WM8996_AIF2TX_DITHER_ENA_SHIFT … #define WM8996_AIF2TX_DITHER_ENA_WIDTH … /* * R1024 (0x400) - DSP1 TX Left Volume */ #define WM8996_DSP1TX_VU … #define WM8996_DSP1TX_VU_MASK … #define WM8996_DSP1TX_VU_SHIFT … #define WM8996_DSP1TX_VU_WIDTH … #define WM8996_DSP1TXL_VOL_MASK … #define WM8996_DSP1TXL_VOL_SHIFT … #define WM8996_DSP1TXL_VOL_WIDTH … /* * R1025 (0x401) - DSP1 TX Right Volume */ #define WM8996_DSP1TX_VU … #define WM8996_DSP1TX_VU_MASK … #define WM8996_DSP1TX_VU_SHIFT … #define WM8996_DSP1TX_VU_WIDTH … #define WM8996_DSP1TXR_VOL_MASK … #define WM8996_DSP1TXR_VOL_SHIFT … #define WM8996_DSP1TXR_VOL_WIDTH … /* * R1026 (0x402) - DSP1 RX Left Volume */ #define WM8996_DSP1RX_VU … #define WM8996_DSP1RX_VU_MASK … #define WM8996_DSP1RX_VU_SHIFT … #define WM8996_DSP1RX_VU_WIDTH … #define WM8996_DSP1RXL_VOL_MASK … #define WM8996_DSP1RXL_VOL_SHIFT … #define WM8996_DSP1RXL_VOL_WIDTH … /* * R1027 (0x403) - DSP1 RX Right Volume */ #define WM8996_DSP1RX_VU … #define WM8996_DSP1RX_VU_MASK … #define WM8996_DSP1RX_VU_SHIFT … #define WM8996_DSP1RX_VU_WIDTH … #define WM8996_DSP1RXR_VOL_MASK … #define WM8996_DSP1RXR_VOL_SHIFT … #define WM8996_DSP1RXR_VOL_WIDTH … /* * R1040 (0x410) - DSP1 TX Filters */ #define WM8996_DSP1TX_NF … #define WM8996_DSP1TX_NF_MASK … #define WM8996_DSP1TX_NF_SHIFT … #define WM8996_DSP1TX_NF_WIDTH … #define WM8996_DSP1TXL_HPF … #define WM8996_DSP1TXL_HPF_MASK … #define WM8996_DSP1TXL_HPF_SHIFT … #define WM8996_DSP1TXL_HPF_WIDTH … #define WM8996_DSP1TXR_HPF … #define WM8996_DSP1TXR_HPF_MASK … #define WM8996_DSP1TXR_HPF_SHIFT … #define WM8996_DSP1TXR_HPF_WIDTH … #define WM8996_DSP1TX_HPF_MODE_MASK … #define WM8996_DSP1TX_HPF_MODE_SHIFT … #define WM8996_DSP1TX_HPF_MODE_WIDTH … #define WM8996_DSP1TX_HPF_CUT_MASK … #define WM8996_DSP1TX_HPF_CUT_SHIFT … #define WM8996_DSP1TX_HPF_CUT_WIDTH … /* * R1056 (0x420) - DSP1 RX Filters (1) */ #define WM8996_DSP1RX_MUTE … #define WM8996_DSP1RX_MUTE_MASK … #define WM8996_DSP1RX_MUTE_SHIFT … #define WM8996_DSP1RX_MUTE_WIDTH … #define WM8996_DSP1RX_MONO … #define WM8996_DSP1RX_MONO_MASK … #define WM8996_DSP1RX_MONO_SHIFT … #define WM8996_DSP1RX_MONO_WIDTH … #define WM8996_DSP1RX_MUTERATE … #define WM8996_DSP1RX_MUTERATE_MASK … #define WM8996_DSP1RX_MUTERATE_SHIFT … #define WM8996_DSP1RX_MUTERATE_WIDTH … #define WM8996_DSP1RX_UNMUTE_RAMP … #define WM8996_DSP1RX_UNMUTE_RAMP_MASK … #define WM8996_DSP1RX_UNMUTE_RAMP_SHIFT … #define WM8996_DSP1RX_UNMUTE_RAMP_WIDTH … /* * R1057 (0x421) - DSP1 RX Filters (2) */ #define WM8996_DSP1RX_3D_GAIN_MASK … #define WM8996_DSP1RX_3D_GAIN_SHIFT … #define WM8996_DSP1RX_3D_GAIN_WIDTH … #define WM8996_DSP1RX_3D_ENA … #define WM8996_DSP1RX_3D_ENA_MASK … #define WM8996_DSP1RX_3D_ENA_SHIFT … #define WM8996_DSP1RX_3D_ENA_WIDTH … /* * R1088 (0x440) - DSP1 DRC (1) */ #define WM8996_DSP1DRC_SIG_DET_RMS_MASK … #define WM8996_DSP1DRC_SIG_DET_RMS_SHIFT … #define WM8996_DSP1DRC_SIG_DET_RMS_WIDTH … #define WM8996_DSP1DRC_SIG_DET_PK_MASK … #define WM8996_DSP1DRC_SIG_DET_PK_SHIFT … #define WM8996_DSP1DRC_SIG_DET_PK_WIDTH … #define WM8996_DSP1DRC_NG_ENA … #define WM8996_DSP1DRC_NG_ENA_MASK … #define WM8996_DSP1DRC_NG_ENA_SHIFT … #define WM8996_DSP1DRC_NG_ENA_WIDTH … #define WM8996_DSP1DRC_SIG_DET_MODE … #define WM8996_DSP1DRC_SIG_DET_MODE_MASK … #define WM8996_DSP1DRC_SIG_DET_MODE_SHIFT … #define WM8996_DSP1DRC_SIG_DET_MODE_WIDTH … #define WM8996_DSP1DRC_SIG_DET … #define WM8996_DSP1DRC_SIG_DET_MASK … #define WM8996_DSP1DRC_SIG_DET_SHIFT … #define WM8996_DSP1DRC_SIG_DET_WIDTH … #define WM8996_DSP1DRC_KNEE2_OP_ENA … #define WM8996_DSP1DRC_KNEE2_OP_ENA_MASK … #define WM8996_DSP1DRC_KNEE2_OP_ENA_SHIFT … #define WM8996_DSP1DRC_KNEE2_OP_ENA_WIDTH … #define WM8996_DSP1DRC_QR … #define WM8996_DSP1DRC_QR_MASK … #define WM8996_DSP1DRC_QR_SHIFT … #define WM8996_DSP1DRC_QR_WIDTH … #define WM8996_DSP1DRC_ANTICLIP … #define WM8996_DSP1DRC_ANTICLIP_MASK … #define WM8996_DSP1DRC_ANTICLIP_SHIFT … #define WM8996_DSP1DRC_ANTICLIP_WIDTH … #define WM8996_DSP1RX_DRC_ENA … #define WM8996_DSP1RX_DRC_ENA_MASK … #define WM8996_DSP1RX_DRC_ENA_SHIFT … #define WM8996_DSP1RX_DRC_ENA_WIDTH … #define WM8996_DSP1TXL_DRC_ENA … #define WM8996_DSP1TXL_DRC_ENA_MASK … #define WM8996_DSP1TXL_DRC_ENA_SHIFT … #define WM8996_DSP1TXL_DRC_ENA_WIDTH … #define WM8996_DSP1TXR_DRC_ENA … #define WM8996_DSP1TXR_DRC_ENA_MASK … #define WM8996_DSP1TXR_DRC_ENA_SHIFT … #define WM8996_DSP1TXR_DRC_ENA_WIDTH … /* * R1089 (0x441) - DSP1 DRC (2) */ #define WM8996_DSP1DRC_ATK_MASK … #define WM8996_DSP1DRC_ATK_SHIFT … #define WM8996_DSP1DRC_ATK_WIDTH … #define WM8996_DSP1DRC_DCY_MASK … #define WM8996_DSP1DRC_DCY_SHIFT … #define WM8996_DSP1DRC_DCY_WIDTH … #define WM8996_DSP1DRC_MINGAIN_MASK … #define WM8996_DSP1DRC_MINGAIN_SHIFT … #define WM8996_DSP1DRC_MINGAIN_WIDTH … #define WM8996_DSP1DRC_MAXGAIN_MASK … #define WM8996_DSP1DRC_MAXGAIN_SHIFT … #define WM8996_DSP1DRC_MAXGAIN_WIDTH … /* * R1090 (0x442) - DSP1 DRC (3) */ #define WM8996_DSP1DRC_NG_MINGAIN_MASK … #define WM8996_DSP1DRC_NG_MINGAIN_SHIFT … #define WM8996_DSP1DRC_NG_MINGAIN_WIDTH … #define WM8996_DSP1DRC_NG_EXP_MASK … #define WM8996_DSP1DRC_NG_EXP_SHIFT … #define WM8996_DSP1DRC_NG_EXP_WIDTH … #define WM8996_DSP1DRC_QR_THR_MASK … #define WM8996_DSP1DRC_QR_THR_SHIFT … #define WM8996_DSP1DRC_QR_THR_WIDTH … #define WM8996_DSP1DRC_QR_DCY_MASK … #define WM8996_DSP1DRC_QR_DCY_SHIFT … #define WM8996_DSP1DRC_QR_DCY_WIDTH … #define WM8996_DSP1DRC_HI_COMP_MASK … #define WM8996_DSP1DRC_HI_COMP_SHIFT … #define WM8996_DSP1DRC_HI_COMP_WIDTH … #define WM8996_DSP1DRC_LO_COMP_MASK … #define WM8996_DSP1DRC_LO_COMP_SHIFT … #define WM8996_DSP1DRC_LO_COMP_WIDTH … /* * R1091 (0x443) - DSP1 DRC (4) */ #define WM8996_DSP1DRC_KNEE_IP_MASK … #define WM8996_DSP1DRC_KNEE_IP_SHIFT … #define WM8996_DSP1DRC_KNEE_IP_WIDTH … #define WM8996_DSP1DRC_KNEE_OP_MASK … #define WM8996_DSP1DRC_KNEE_OP_SHIFT … #define WM8996_DSP1DRC_KNEE_OP_WIDTH … /* * R1092 (0x444) - DSP1 DRC (5) */ #define WM8996_DSP1DRC_KNEE2_IP_MASK … #define WM8996_DSP1DRC_KNEE2_IP_SHIFT … #define WM8996_DSP1DRC_KNEE2_IP_WIDTH … #define WM8996_DSP1DRC_KNEE2_OP_MASK … #define WM8996_DSP1DRC_KNEE2_OP_SHIFT … #define WM8996_DSP1DRC_KNEE2_OP_WIDTH … /* * R1152 (0x480) - DSP1 RX EQ Gains (1) */ #define WM8996_DSP1RX_EQ_B1_GAIN_MASK … #define WM8996_DSP1RX_EQ_B1_GAIN_SHIFT … #define WM8996_DSP1RX_EQ_B1_GAIN_WIDTH … #define WM8996_DSP1RX_EQ_B2_GAIN_MASK … #define WM8996_DSP1RX_EQ_B2_GAIN_SHIFT … #define WM8996_DSP1RX_EQ_B2_GAIN_WIDTH … #define WM8996_DSP1RX_EQ_B3_GAIN_MASK … #define WM8996_DSP1RX_EQ_B3_GAIN_SHIFT … #define WM8996_DSP1RX_EQ_B3_GAIN_WIDTH … #define WM8996_DSP1RX_EQ_ENA … #define WM8996_DSP1RX_EQ_ENA_MASK … #define WM8996_DSP1RX_EQ_ENA_SHIFT … #define WM8996_DSP1RX_EQ_ENA_WIDTH … /* * R1153 (0x481) - DSP1 RX EQ Gains (2) */ #define WM8996_DSP1RX_EQ_B4_GAIN_MASK … #define WM8996_DSP1RX_EQ_B4_GAIN_SHIFT … #define WM8996_DSP1RX_EQ_B4_GAIN_WIDTH … #define WM8996_DSP1RX_EQ_B5_GAIN_MASK … #define WM8996_DSP1RX_EQ_B5_GAIN_SHIFT … #define WM8996_DSP1RX_EQ_B5_GAIN_WIDTH … /* * R1154 (0x482) - DSP1 RX EQ Band 1 A */ #define WM8996_DSP1RX_EQ_B1_A_MASK … #define WM8996_DSP1RX_EQ_B1_A_SHIFT … #define WM8996_DSP1RX_EQ_B1_A_WIDTH … /* * R1155 (0x483) - DSP1 RX EQ Band 1 B */ #define WM8996_DSP1RX_EQ_B1_B_MASK … #define WM8996_DSP1RX_EQ_B1_B_SHIFT … #define WM8996_DSP1RX_EQ_B1_B_WIDTH … /* * R1156 (0x484) - DSP1 RX EQ Band 1 PG */ #define WM8996_DSP1RX_EQ_B1_PG_MASK … #define WM8996_DSP1RX_EQ_B1_PG_SHIFT … #define WM8996_DSP1RX_EQ_B1_PG_WIDTH … /* * R1157 (0x485) - DSP1 RX EQ Band 2 A */ #define WM8996_DSP1RX_EQ_B2_A_MASK … #define WM8996_DSP1RX_EQ_B2_A_SHIFT … #define WM8996_DSP1RX_EQ_B2_A_WIDTH … /* * R1158 (0x486) - DSP1 RX EQ Band 2 B */ #define WM8996_DSP1RX_EQ_B2_B_MASK … #define WM8996_DSP1RX_EQ_B2_B_SHIFT … #define WM8996_DSP1RX_EQ_B2_B_WIDTH … /* * R1159 (0x487) - DSP1 RX EQ Band 2 C */ #define WM8996_DSP1RX_EQ_B2_C_MASK … #define WM8996_DSP1RX_EQ_B2_C_SHIFT … #define WM8996_DSP1RX_EQ_B2_C_WIDTH … /* * R1160 (0x488) - DSP1 RX EQ Band 2 PG */ #define WM8996_DSP1RX_EQ_B2_PG_MASK … #define WM8996_DSP1RX_EQ_B2_PG_SHIFT … #define WM8996_DSP1RX_EQ_B2_PG_WIDTH … /* * R1161 (0x489) - DSP1 RX EQ Band 3 A */ #define WM8996_DSP1RX_EQ_B3_A_MASK … #define WM8996_DSP1RX_EQ_B3_A_SHIFT … #define WM8996_DSP1RX_EQ_B3_A_WIDTH … /* * R1162 (0x48A) - DSP1 RX EQ Band 3 B */ #define WM8996_DSP1RX_EQ_B3_B_MASK … #define WM8996_DSP1RX_EQ_B3_B_SHIFT … #define WM8996_DSP1RX_EQ_B3_B_WIDTH … /* * R1163 (0x48B) - DSP1 RX EQ Band 3 C */ #define WM8996_DSP1RX_EQ_B3_C_MASK … #define WM8996_DSP1RX_EQ_B3_C_SHIFT … #define WM8996_DSP1RX_EQ_B3_C_WIDTH … /* * R1164 (0x48C) - DSP1 RX EQ Band 3 PG */ #define WM8996_DSP1RX_EQ_B3_PG_MASK … #define WM8996_DSP1RX_EQ_B3_PG_SHIFT … #define WM8996_DSP1RX_EQ_B3_PG_WIDTH … /* * R1165 (0x48D) - DSP1 RX EQ Band 4 A */ #define WM8996_DSP1RX_EQ_B4_A_MASK … #define WM8996_DSP1RX_EQ_B4_A_SHIFT … #define WM8996_DSP1RX_EQ_B4_A_WIDTH … /* * R1166 (0x48E) - DSP1 RX EQ Band 4 B */ #define WM8996_DSP1RX_EQ_B4_B_MASK … #define WM8996_DSP1RX_EQ_B4_B_SHIFT … #define WM8996_DSP1RX_EQ_B4_B_WIDTH … /* * R1167 (0x48F) - DSP1 RX EQ Band 4 C */ #define WM8996_DSP1RX_EQ_B4_C_MASK … #define WM8996_DSP1RX_EQ_B4_C_SHIFT … #define WM8996_DSP1RX_EQ_B4_C_WIDTH … /* * R1168 (0x490) - DSP1 RX EQ Band 4 PG */ #define WM8996_DSP1RX_EQ_B4_PG_MASK … #define WM8996_DSP1RX_EQ_B4_PG_SHIFT … #define WM8996_DSP1RX_EQ_B4_PG_WIDTH … /* * R1169 (0x491) - DSP1 RX EQ Band 5 A */ #define WM8996_DSP1RX_EQ_B5_A_MASK … #define WM8996_DSP1RX_EQ_B5_A_SHIFT … #define WM8996_DSP1RX_EQ_B5_A_WIDTH … /* * R1170 (0x492) - DSP1 RX EQ Band 5 B */ #define WM8996_DSP1RX_EQ_B5_B_MASK … #define WM8996_DSP1RX_EQ_B5_B_SHIFT … #define WM8996_DSP1RX_EQ_B5_B_WIDTH … /* * R1171 (0x493) - DSP1 RX EQ Band 5 PG */ #define WM8996_DSP1RX_EQ_B5_PG_MASK … #define WM8996_DSP1RX_EQ_B5_PG_SHIFT … #define WM8996_DSP1RX_EQ_B5_PG_WIDTH … /* * R1280 (0x500) - DSP2 TX Left Volume */ #define WM8996_DSP2TX_VU … #define WM8996_DSP2TX_VU_MASK … #define WM8996_DSP2TX_VU_SHIFT … #define WM8996_DSP2TX_VU_WIDTH … #define WM8996_DSP2TXL_VOL_MASK … #define WM8996_DSP2TXL_VOL_SHIFT … #define WM8996_DSP2TXL_VOL_WIDTH … /* * R1281 (0x501) - DSP2 TX Right Volume */ #define WM8996_DSP2TX_VU … #define WM8996_DSP2TX_VU_MASK … #define WM8996_DSP2TX_VU_SHIFT … #define WM8996_DSP2TX_VU_WIDTH … #define WM8996_DSP2TXR_VOL_MASK … #define WM8996_DSP2TXR_VOL_SHIFT … #define WM8996_DSP2TXR_VOL_WIDTH … /* * R1282 (0x502) - DSP2 RX Left Volume */ #define WM8996_DSP2RX_VU … #define WM8996_DSP2RX_VU_MASK … #define WM8996_DSP2RX_VU_SHIFT … #define WM8996_DSP2RX_VU_WIDTH … #define WM8996_DSP2RXL_VOL_MASK … #define WM8996_DSP2RXL_VOL_SHIFT … #define WM8996_DSP2RXL_VOL_WIDTH … /* * R1283 (0x503) - DSP2 RX Right Volume */ #define WM8996_DSP2RX_VU … #define WM8996_DSP2RX_VU_MASK … #define WM8996_DSP2RX_VU_SHIFT … #define WM8996_DSP2RX_VU_WIDTH … #define WM8996_DSP2RXR_VOL_MASK … #define WM8996_DSP2RXR_VOL_SHIFT … #define WM8996_DSP2RXR_VOL_WIDTH … /* * R1296 (0x510) - DSP2 TX Filters */ #define WM8996_DSP2TX_NF … #define WM8996_DSP2TX_NF_MASK … #define WM8996_DSP2TX_NF_SHIFT … #define WM8996_DSP2TX_NF_WIDTH … #define WM8996_DSP2TXL_HPF … #define WM8996_DSP2TXL_HPF_MASK … #define WM8996_DSP2TXL_HPF_SHIFT … #define WM8996_DSP2TXL_HPF_WIDTH … #define WM8996_DSP2TXR_HPF … #define WM8996_DSP2TXR_HPF_MASK … #define WM8996_DSP2TXR_HPF_SHIFT … #define WM8996_DSP2TXR_HPF_WIDTH … #define WM8996_DSP2TX_HPF_MODE_MASK … #define WM8996_DSP2TX_HPF_MODE_SHIFT … #define WM8996_DSP2TX_HPF_MODE_WIDTH … #define WM8996_DSP2TX_HPF_CUT_MASK … #define WM8996_DSP2TX_HPF_CUT_SHIFT … #define WM8996_DSP2TX_HPF_CUT_WIDTH … /* * R1312 (0x520) - DSP2 RX Filters (1) */ #define WM8996_DSP2RX_MUTE … #define WM8996_DSP2RX_MUTE_MASK … #define WM8996_DSP2RX_MUTE_SHIFT … #define WM8996_DSP2RX_MUTE_WIDTH … #define WM8996_DSP2RX_MONO … #define WM8996_DSP2RX_MONO_MASK … #define WM8996_DSP2RX_MONO_SHIFT … #define WM8996_DSP2RX_MONO_WIDTH … #define WM8996_DSP2RX_MUTERATE … #define WM8996_DSP2RX_MUTERATE_MASK … #define WM8996_DSP2RX_MUTERATE_SHIFT … #define WM8996_DSP2RX_MUTERATE_WIDTH … #define WM8996_DSP2RX_UNMUTE_RAMP … #define WM8996_DSP2RX_UNMUTE_RAMP_MASK … #define WM8996_DSP2RX_UNMUTE_RAMP_SHIFT … #define WM8996_DSP2RX_UNMUTE_RAMP_WIDTH … /* * R1313 (0x521) - DSP2 RX Filters (2) */ #define WM8996_DSP2RX_3D_GAIN_MASK … #define WM8996_DSP2RX_3D_GAIN_SHIFT … #define WM8996_DSP2RX_3D_GAIN_WIDTH … #define WM8996_DSP2RX_3D_ENA … #define WM8996_DSP2RX_3D_ENA_MASK … #define WM8996_DSP2RX_3D_ENA_SHIFT … #define WM8996_DSP2RX_3D_ENA_WIDTH … /* * R1344 (0x540) - DSP2 DRC (1) */ #define WM8996_DSP2DRC_SIG_DET_RMS_MASK … #define WM8996_DSP2DRC_SIG_DET_RMS_SHIFT … #define WM8996_DSP2DRC_SIG_DET_RMS_WIDTH … #define WM8996_DSP2DRC_SIG_DET_PK_MASK … #define WM8996_DSP2DRC_SIG_DET_PK_SHIFT … #define WM8996_DSP2DRC_SIG_DET_PK_WIDTH … #define WM8996_DSP2DRC_NG_ENA … #define WM8996_DSP2DRC_NG_ENA_MASK … #define WM8996_DSP2DRC_NG_ENA_SHIFT … #define WM8996_DSP2DRC_NG_ENA_WIDTH … #define WM8996_DSP2DRC_SIG_DET_MODE … #define WM8996_DSP2DRC_SIG_DET_MODE_MASK … #define WM8996_DSP2DRC_SIG_DET_MODE_SHIFT … #define WM8996_DSP2DRC_SIG_DET_MODE_WIDTH … #define WM8996_DSP2DRC_SIG_DET … #define WM8996_DSP2DRC_SIG_DET_MASK … #define WM8996_DSP2DRC_SIG_DET_SHIFT … #define WM8996_DSP2DRC_SIG_DET_WIDTH … #define WM8996_DSP2DRC_KNEE2_OP_ENA … #define WM8996_DSP2DRC_KNEE2_OP_ENA_MASK … #define WM8996_DSP2DRC_KNEE2_OP_ENA_SHIFT … #define WM8996_DSP2DRC_KNEE2_OP_ENA_WIDTH … #define WM8996_DSP2DRC_QR … #define WM8996_DSP2DRC_QR_MASK … #define WM8996_DSP2DRC_QR_SHIFT … #define WM8996_DSP2DRC_QR_WIDTH … #define WM8996_DSP2DRC_ANTICLIP … #define WM8996_DSP2DRC_ANTICLIP_MASK … #define WM8996_DSP2DRC_ANTICLIP_SHIFT … #define WM8996_DSP2DRC_ANTICLIP_WIDTH … #define WM8996_DSP2RX_DRC_ENA … #define WM8996_DSP2RX_DRC_ENA_MASK … #define WM8996_DSP2RX_DRC_ENA_SHIFT … #define WM8996_DSP2RX_DRC_ENA_WIDTH … #define WM8996_DSP2TXL_DRC_ENA … #define WM8996_DSP2TXL_DRC_ENA_MASK … #define WM8996_DSP2TXL_DRC_ENA_SHIFT … #define WM8996_DSP2TXL_DRC_ENA_WIDTH … #define WM8996_DSP2TXR_DRC_ENA … #define WM8996_DSP2TXR_DRC_ENA_MASK … #define WM8996_DSP2TXR_DRC_ENA_SHIFT … #define WM8996_DSP2TXR_DRC_ENA_WIDTH … /* * R1345 (0x541) - DSP2 DRC (2) */ #define WM8996_DSP2DRC_ATK_MASK … #define WM8996_DSP2DRC_ATK_SHIFT … #define WM8996_DSP2DRC_ATK_WIDTH … #define WM8996_DSP2DRC_DCY_MASK … #define WM8996_DSP2DRC_DCY_SHIFT … #define WM8996_DSP2DRC_DCY_WIDTH … #define WM8996_DSP2DRC_MINGAIN_MASK … #define WM8996_DSP2DRC_MINGAIN_SHIFT … #define WM8996_DSP2DRC_MINGAIN_WIDTH … #define WM8996_DSP2DRC_MAXGAIN_MASK … #define WM8996_DSP2DRC_MAXGAIN_SHIFT … #define WM8996_DSP2DRC_MAXGAIN_WIDTH … /* * R1346 (0x542) - DSP2 DRC (3) */ #define WM8996_DSP2DRC_NG_MINGAIN_MASK … #define WM8996_DSP2DRC_NG_MINGAIN_SHIFT … #define WM8996_DSP2DRC_NG_MINGAIN_WIDTH … #define WM8996_DSP2DRC_NG_EXP_MASK … #define WM8996_DSP2DRC_NG_EXP_SHIFT … #define WM8996_DSP2DRC_NG_EXP_WIDTH … #define WM8996_DSP2DRC_QR_THR_MASK … #define WM8996_DSP2DRC_QR_THR_SHIFT … #define WM8996_DSP2DRC_QR_THR_WIDTH … #define WM8996_DSP2DRC_QR_DCY_MASK … #define WM8996_DSP2DRC_QR_DCY_SHIFT … #define WM8996_DSP2DRC_QR_DCY_WIDTH … #define WM8996_DSP2DRC_HI_COMP_MASK … #define WM8996_DSP2DRC_HI_COMP_SHIFT … #define WM8996_DSP2DRC_HI_COMP_WIDTH … #define WM8996_DSP2DRC_LO_COMP_MASK … #define WM8996_DSP2DRC_LO_COMP_SHIFT … #define WM8996_DSP2DRC_LO_COMP_WIDTH … /* * R1347 (0x543) - DSP2 DRC (4) */ #define WM8996_DSP2DRC_KNEE_IP_MASK … #define WM8996_DSP2DRC_KNEE_IP_SHIFT … #define WM8996_DSP2DRC_KNEE_IP_WIDTH … #define WM8996_DSP2DRC_KNEE_OP_MASK … #define WM8996_DSP2DRC_KNEE_OP_SHIFT … #define WM8996_DSP2DRC_KNEE_OP_WIDTH … /* * R1348 (0x544) - DSP2 DRC (5) */ #define WM8996_DSP2DRC_KNEE2_IP_MASK … #define WM8996_DSP2DRC_KNEE2_IP_SHIFT … #define WM8996_DSP2DRC_KNEE2_IP_WIDTH … #define WM8996_DSP2DRC_KNEE2_OP_MASK … #define WM8996_DSP2DRC_KNEE2_OP_SHIFT … #define WM8996_DSP2DRC_KNEE2_OP_WIDTH … /* * R1408 (0x580) - DSP2 RX EQ Gains (1) */ #define WM8996_DSP2RX_EQ_B1_GAIN_MASK … #define WM8996_DSP2RX_EQ_B1_GAIN_SHIFT … #define WM8996_DSP2RX_EQ_B1_GAIN_WIDTH … #define WM8996_DSP2RX_EQ_B2_GAIN_MASK … #define WM8996_DSP2RX_EQ_B2_GAIN_SHIFT … #define WM8996_DSP2RX_EQ_B2_GAIN_WIDTH … #define WM8996_DSP2RX_EQ_B3_GAIN_MASK … #define WM8996_DSP2RX_EQ_B3_GAIN_SHIFT … #define WM8996_DSP2RX_EQ_B3_GAIN_WIDTH … #define WM8996_DSP2RX_EQ_ENA … #define WM8996_DSP2RX_EQ_ENA_MASK … #define WM8996_DSP2RX_EQ_ENA_SHIFT … #define WM8996_DSP2RX_EQ_ENA_WIDTH … /* * R1409 (0x581) - DSP2 RX EQ Gains (2) */ #define WM8996_DSP2RX_EQ_B4_GAIN_MASK … #define WM8996_DSP2RX_EQ_B4_GAIN_SHIFT … #define WM8996_DSP2RX_EQ_B4_GAIN_WIDTH … #define WM8996_DSP2RX_EQ_B5_GAIN_MASK … #define WM8996_DSP2RX_EQ_B5_GAIN_SHIFT … #define WM8996_DSP2RX_EQ_B5_GAIN_WIDTH … /* * R1410 (0x582) - DSP2 RX EQ Band 1 A */ #define WM8996_DSP2RX_EQ_B1_A_MASK … #define WM8996_DSP2RX_EQ_B1_A_SHIFT … #define WM8996_DSP2RX_EQ_B1_A_WIDTH … /* * R1411 (0x583) - DSP2 RX EQ Band 1 B */ #define WM8996_DSP2RX_EQ_B1_B_MASK … #define WM8996_DSP2RX_EQ_B1_B_SHIFT … #define WM8996_DSP2RX_EQ_B1_B_WIDTH … /* * R1412 (0x584) - DSP2 RX EQ Band 1 PG */ #define WM8996_DSP2RX_EQ_B1_PG_MASK … #define WM8996_DSP2RX_EQ_B1_PG_SHIFT … #define WM8996_DSP2RX_EQ_B1_PG_WIDTH … /* * R1413 (0x585) - DSP2 RX EQ Band 2 A */ #define WM8996_DSP2RX_EQ_B2_A_MASK … #define WM8996_DSP2RX_EQ_B2_A_SHIFT … #define WM8996_DSP2RX_EQ_B2_A_WIDTH … /* * R1414 (0x586) - DSP2 RX EQ Band 2 B */ #define WM8996_DSP2RX_EQ_B2_B_MASK … #define WM8996_DSP2RX_EQ_B2_B_SHIFT … #define WM8996_DSP2RX_EQ_B2_B_WIDTH … /* * R1415 (0x587) - DSP2 RX EQ Band 2 C */ #define WM8996_DSP2RX_EQ_B2_C_MASK … #define WM8996_DSP2RX_EQ_B2_C_SHIFT … #define WM8996_DSP2RX_EQ_B2_C_WIDTH … /* * R1416 (0x588) - DSP2 RX EQ Band 2 PG */ #define WM8996_DSP2RX_EQ_B2_PG_MASK … #define WM8996_DSP2RX_EQ_B2_PG_SHIFT … #define WM8996_DSP2RX_EQ_B2_PG_WIDTH … /* * R1417 (0x589) - DSP2 RX EQ Band 3 A */ #define WM8996_DSP2RX_EQ_B3_A_MASK … #define WM8996_DSP2RX_EQ_B3_A_SHIFT … #define WM8996_DSP2RX_EQ_B3_A_WIDTH … /* * R1418 (0x58A) - DSP2 RX EQ Band 3 B */ #define WM8996_DSP2RX_EQ_B3_B_MASK … #define WM8996_DSP2RX_EQ_B3_B_SHIFT … #define WM8996_DSP2RX_EQ_B3_B_WIDTH … /* * R1419 (0x58B) - DSP2 RX EQ Band 3 C */ #define WM8996_DSP2RX_EQ_B3_C_MASK … #define WM8996_DSP2RX_EQ_B3_C_SHIFT … #define WM8996_DSP2RX_EQ_B3_C_WIDTH … /* * R1420 (0x58C) - DSP2 RX EQ Band 3 PG */ #define WM8996_DSP2RX_EQ_B3_PG_MASK … #define WM8996_DSP2RX_EQ_B3_PG_SHIFT … #define WM8996_DSP2RX_EQ_B3_PG_WIDTH … /* * R1421 (0x58D) - DSP2 RX EQ Band 4 A */ #define WM8996_DSP2RX_EQ_B4_A_MASK … #define WM8996_DSP2RX_EQ_B4_A_SHIFT … #define WM8996_DSP2RX_EQ_B4_A_WIDTH … /* * R1422 (0x58E) - DSP2 RX EQ Band 4 B */ #define WM8996_DSP2RX_EQ_B4_B_MASK … #define WM8996_DSP2RX_EQ_B4_B_SHIFT … #define WM8996_DSP2RX_EQ_B4_B_WIDTH … /* * R1423 (0x58F) - DSP2 RX EQ Band 4 C */ #define WM8996_DSP2RX_EQ_B4_C_MASK … #define WM8996_DSP2RX_EQ_B4_C_SHIFT … #define WM8996_DSP2RX_EQ_B4_C_WIDTH … /* * R1424 (0x590) - DSP2 RX EQ Band 4 PG */ #define WM8996_DSP2RX_EQ_B4_PG_MASK … #define WM8996_DSP2RX_EQ_B4_PG_SHIFT … #define WM8996_DSP2RX_EQ_B4_PG_WIDTH … /* * R1425 (0x591) - DSP2 RX EQ Band 5 A */ #define WM8996_DSP2RX_EQ_B5_A_MASK … #define WM8996_DSP2RX_EQ_B5_A_SHIFT … #define WM8996_DSP2RX_EQ_B5_A_WIDTH … /* * R1426 (0x592) - DSP2 RX EQ Band 5 B */ #define WM8996_DSP2RX_EQ_B5_B_MASK … #define WM8996_DSP2RX_EQ_B5_B_SHIFT … #define WM8996_DSP2RX_EQ_B5_B_WIDTH … /* * R1427 (0x593) - DSP2 RX EQ Band 5 PG */ #define WM8996_DSP2RX_EQ_B5_PG_MASK … #define WM8996_DSP2RX_EQ_B5_PG_SHIFT … #define WM8996_DSP2RX_EQ_B5_PG_WIDTH … /* * R1536 (0x600) - DAC1 Mixer Volumes */ #define WM8996_ADCR_DAC1_VOL_MASK … #define WM8996_ADCR_DAC1_VOL_SHIFT … #define WM8996_ADCR_DAC1_VOL_WIDTH … #define WM8996_ADCL_DAC1_VOL_MASK … #define WM8996_ADCL_DAC1_VOL_SHIFT … #define WM8996_ADCL_DAC1_VOL_WIDTH … /* * R1537 (0x601) - DAC1 Left Mixer Routing */ #define WM8996_ADCR_TO_DAC1L … #define WM8996_ADCR_TO_DAC1L_MASK … #define WM8996_ADCR_TO_DAC1L_SHIFT … #define WM8996_ADCR_TO_DAC1L_WIDTH … #define WM8996_ADCL_TO_DAC1L … #define WM8996_ADCL_TO_DAC1L_MASK … #define WM8996_ADCL_TO_DAC1L_SHIFT … #define WM8996_ADCL_TO_DAC1L_WIDTH … #define WM8996_DSP2RXL_TO_DAC1L … #define WM8996_DSP2RXL_TO_DAC1L_MASK … #define WM8996_DSP2RXL_TO_DAC1L_SHIFT … #define WM8996_DSP2RXL_TO_DAC1L_WIDTH … #define WM8996_DSP1RXL_TO_DAC1L … #define WM8996_DSP1RXL_TO_DAC1L_MASK … #define WM8996_DSP1RXL_TO_DAC1L_SHIFT … #define WM8996_DSP1RXL_TO_DAC1L_WIDTH … /* * R1538 (0x602) - DAC1 Right Mixer Routing */ #define WM8996_ADCR_TO_DAC1R … #define WM8996_ADCR_TO_DAC1R_MASK … #define WM8996_ADCR_TO_DAC1R_SHIFT … #define WM8996_ADCR_TO_DAC1R_WIDTH … #define WM8996_ADCL_TO_DAC1R … #define WM8996_ADCL_TO_DAC1R_MASK … #define WM8996_ADCL_TO_DAC1R_SHIFT … #define WM8996_ADCL_TO_DAC1R_WIDTH … #define WM8996_DSP2RXR_TO_DAC1R … #define WM8996_DSP2RXR_TO_DAC1R_MASK … #define WM8996_DSP2RXR_TO_DAC1R_SHIFT … #define WM8996_DSP2RXR_TO_DAC1R_WIDTH … #define WM8996_DSP1RXR_TO_DAC1R … #define WM8996_DSP1RXR_TO_DAC1R_MASK … #define WM8996_DSP1RXR_TO_DAC1R_SHIFT … #define WM8996_DSP1RXR_TO_DAC1R_WIDTH … /* * R1539 (0x603) - DAC2 Mixer Volumes */ #define WM8996_ADCR_DAC2_VOL_MASK … #define WM8996_ADCR_DAC2_VOL_SHIFT … #define WM8996_ADCR_DAC2_VOL_WIDTH … #define WM8996_ADCL_DAC2_VOL_MASK … #define WM8996_ADCL_DAC2_VOL_SHIFT … #define WM8996_ADCL_DAC2_VOL_WIDTH … /* * R1540 (0x604) - DAC2 Left Mixer Routing */ #define WM8996_ADCR_TO_DAC2L … #define WM8996_ADCR_TO_DAC2L_MASK … #define WM8996_ADCR_TO_DAC2L_SHIFT … #define WM8996_ADCR_TO_DAC2L_WIDTH … #define WM8996_ADCL_TO_DAC2L … #define WM8996_ADCL_TO_DAC2L_MASK … #define WM8996_ADCL_TO_DAC2L_SHIFT … #define WM8996_ADCL_TO_DAC2L_WIDTH … #define WM8996_DSP2RXL_TO_DAC2L … #define WM8996_DSP2RXL_TO_DAC2L_MASK … #define WM8996_DSP2RXL_TO_DAC2L_SHIFT … #define WM8996_DSP2RXL_TO_DAC2L_WIDTH … #define WM8996_DSP1RXL_TO_DAC2L … #define WM8996_DSP1RXL_TO_DAC2L_MASK … #define WM8996_DSP1RXL_TO_DAC2L_SHIFT … #define WM8996_DSP1RXL_TO_DAC2L_WIDTH … /* * R1541 (0x605) - DAC2 Right Mixer Routing */ #define WM8996_ADCR_TO_DAC2R … #define WM8996_ADCR_TO_DAC2R_MASK … #define WM8996_ADCR_TO_DAC2R_SHIFT … #define WM8996_ADCR_TO_DAC2R_WIDTH … #define WM8996_ADCL_TO_DAC2R … #define WM8996_ADCL_TO_DAC2R_MASK … #define WM8996_ADCL_TO_DAC2R_SHIFT … #define WM8996_ADCL_TO_DAC2R_WIDTH … #define WM8996_DSP2RXR_TO_DAC2R … #define WM8996_DSP2RXR_TO_DAC2R_MASK … #define WM8996_DSP2RXR_TO_DAC2R_SHIFT … #define WM8996_DSP2RXR_TO_DAC2R_WIDTH … #define WM8996_DSP1RXR_TO_DAC2R … #define WM8996_DSP1RXR_TO_DAC2R_MASK … #define WM8996_DSP1RXR_TO_DAC2R_SHIFT … #define WM8996_DSP1RXR_TO_DAC2R_WIDTH … /* * R1542 (0x606) - DSP1 TX Left Mixer Routing */ #define WM8996_ADC1L_TO_DSP1TXL … #define WM8996_ADC1L_TO_DSP1TXL_MASK … #define WM8996_ADC1L_TO_DSP1TXL_SHIFT … #define WM8996_ADC1L_TO_DSP1TXL_WIDTH … #define WM8996_DACL_TO_DSP1TXL … #define WM8996_DACL_TO_DSP1TXL_MASK … #define WM8996_DACL_TO_DSP1TXL_SHIFT … #define WM8996_DACL_TO_DSP1TXL_WIDTH … /* * R1543 (0x607) - DSP1 TX Right Mixer Routing */ #define WM8996_ADC1R_TO_DSP1TXR … #define WM8996_ADC1R_TO_DSP1TXR_MASK … #define WM8996_ADC1R_TO_DSP1TXR_SHIFT … #define WM8996_ADC1R_TO_DSP1TXR_WIDTH … #define WM8996_DACR_TO_DSP1TXR … #define WM8996_DACR_TO_DSP1TXR_MASK … #define WM8996_DACR_TO_DSP1TXR_SHIFT … #define WM8996_DACR_TO_DSP1TXR_WIDTH … /* * R1544 (0x608) - DSP2 TX Left Mixer Routing */ #define WM8996_ADC2L_TO_DSP2TXL … #define WM8996_ADC2L_TO_DSP2TXL_MASK … #define WM8996_ADC2L_TO_DSP2TXL_SHIFT … #define WM8996_ADC2L_TO_DSP2TXL_WIDTH … #define WM8996_DACL_TO_DSP2TXL … #define WM8996_DACL_TO_DSP2TXL_MASK … #define WM8996_DACL_TO_DSP2TXL_SHIFT … #define WM8996_DACL_TO_DSP2TXL_WIDTH … /* * R1545 (0x609) - DSP2 TX Right Mixer Routing */ #define WM8996_ADC2R_TO_DSP2TXR … #define WM8996_ADC2R_TO_DSP2TXR_MASK … #define WM8996_ADC2R_TO_DSP2TXR_SHIFT … #define WM8996_ADC2R_TO_DSP2TXR_WIDTH … #define WM8996_DACR_TO_DSP2TXR … #define WM8996_DACR_TO_DSP2TXR_MASK … #define WM8996_DACR_TO_DSP2TXR_SHIFT … #define WM8996_DACR_TO_DSP2TXR_WIDTH … /* * R1546 (0x60A) - DSP TX Mixer Select */ #define WM8996_DAC_TO_DSPTX_SRC … #define WM8996_DAC_TO_DSPTX_SRC_MASK … #define WM8996_DAC_TO_DSPTX_SRC_SHIFT … #define WM8996_DAC_TO_DSPTX_SRC_WIDTH … /* * R1552 (0x610) - DAC Softmute */ #define WM8996_DAC_SOFTMUTEMODE … #define WM8996_DAC_SOFTMUTEMODE_MASK … #define WM8996_DAC_SOFTMUTEMODE_SHIFT … #define WM8996_DAC_SOFTMUTEMODE_WIDTH … #define WM8996_DAC_MUTERATE … #define WM8996_DAC_MUTERATE_MASK … #define WM8996_DAC_MUTERATE_SHIFT … #define WM8996_DAC_MUTERATE_WIDTH … /* * R1568 (0x620) - Oversampling */ #define WM8996_SPK_OSR128 … #define WM8996_SPK_OSR128_MASK … #define WM8996_SPK_OSR128_SHIFT … #define WM8996_SPK_OSR128_WIDTH … #define WM8996_DMIC_OSR64 … #define WM8996_DMIC_OSR64_MASK … #define WM8996_DMIC_OSR64_SHIFT … #define WM8996_DMIC_OSR64_WIDTH … #define WM8996_ADC_OSR128 … #define WM8996_ADC_OSR128_MASK … #define WM8996_ADC_OSR128_SHIFT … #define WM8996_ADC_OSR128_WIDTH … #define WM8996_DAC_OSR128 … #define WM8996_DAC_OSR128_MASK … #define WM8996_DAC_OSR128_SHIFT … #define WM8996_DAC_OSR128_WIDTH … /* * R1569 (0x621) - Sidetone */ #define WM8996_ST_LPF … #define WM8996_ST_LPF_MASK … #define WM8996_ST_LPF_SHIFT … #define WM8996_ST_LPF_WIDTH … #define WM8996_ST_HPF_CUT_MASK … #define WM8996_ST_HPF_CUT_SHIFT … #define WM8996_ST_HPF_CUT_WIDTH … #define WM8996_ST_HPF … #define WM8996_ST_HPF_MASK … #define WM8996_ST_HPF_SHIFT … #define WM8996_ST_HPF_WIDTH … #define WM8996_STR_SEL … #define WM8996_STR_SEL_MASK … #define WM8996_STR_SEL_SHIFT … #define WM8996_STR_SEL_WIDTH … #define WM8996_STL_SEL … #define WM8996_STL_SEL_MASK … #define WM8996_STL_SEL_SHIFT … #define WM8996_STL_SEL_WIDTH … /* * R1792 (0x700) - GPIO 1 */ #define WM8996_GP1_DIR … #define WM8996_GP1_DIR_MASK … #define WM8996_GP1_DIR_SHIFT … #define WM8996_GP1_DIR_WIDTH … #define WM8996_GP1_PU … #define WM8996_GP1_PU_MASK … #define WM8996_GP1_PU_SHIFT … #define WM8996_GP1_PU_WIDTH … #define WM8996_GP1_PD … #define WM8996_GP1_PD_MASK … #define WM8996_GP1_PD_SHIFT … #define WM8996_GP1_PD_WIDTH … #define WM8996_GP1_POL … #define WM8996_GP1_POL_MASK … #define WM8996_GP1_POL_SHIFT … #define WM8996_GP1_POL_WIDTH … #define WM8996_GP1_OP_CFG … #define WM8996_GP1_OP_CFG_MASK … #define WM8996_GP1_OP_CFG_SHIFT … #define WM8996_GP1_OP_CFG_WIDTH … #define WM8996_GP1_DB … #define WM8996_GP1_DB_MASK … #define WM8996_GP1_DB_SHIFT … #define WM8996_GP1_DB_WIDTH … #define WM8996_GP1_LVL … #define WM8996_GP1_LVL_MASK … #define WM8996_GP1_LVL_SHIFT … #define WM8996_GP1_LVL_WIDTH … #define WM8996_GP1_FN_MASK … #define WM8996_GP1_FN_SHIFT … #define WM8996_GP1_FN_WIDTH … /* * R1793 (0x701) - GPIO 2 */ #define WM8996_GP2_DIR … #define WM8996_GP2_DIR_MASK … #define WM8996_GP2_DIR_SHIFT … #define WM8996_GP2_DIR_WIDTH … #define WM8996_GP2_PU … #define WM8996_GP2_PU_MASK … #define WM8996_GP2_PU_SHIFT … #define WM8996_GP2_PU_WIDTH … #define WM8996_GP2_PD … #define WM8996_GP2_PD_MASK … #define WM8996_GP2_PD_SHIFT … #define WM8996_GP2_PD_WIDTH … #define WM8996_GP2_POL … #define WM8996_GP2_POL_MASK … #define WM8996_GP2_POL_SHIFT … #define WM8996_GP2_POL_WIDTH … #define WM8996_GP2_OP_CFG … #define WM8996_GP2_OP_CFG_MASK … #define WM8996_GP2_OP_CFG_SHIFT … #define WM8996_GP2_OP_CFG_WIDTH … #define WM8996_GP2_DB … #define WM8996_GP2_DB_MASK … #define WM8996_GP2_DB_SHIFT … #define WM8996_GP2_DB_WIDTH … #define WM8996_GP2_LVL … #define WM8996_GP2_LVL_MASK … #define WM8996_GP2_LVL_SHIFT … #define WM8996_GP2_LVL_WIDTH … #define WM8996_GP2_FN_MASK … #define WM8996_GP2_FN_SHIFT … #define WM8996_GP2_FN_WIDTH … /* * R1794 (0x702) - GPIO 3 */ #define WM8996_GP3_DIR … #define WM8996_GP3_DIR_MASK … #define WM8996_GP3_DIR_SHIFT … #define WM8996_GP3_DIR_WIDTH … #define WM8996_GP3_PU … #define WM8996_GP3_PU_MASK … #define WM8996_GP3_PU_SHIFT … #define WM8996_GP3_PU_WIDTH … #define WM8996_GP3_PD … #define WM8996_GP3_PD_MASK … #define WM8996_GP3_PD_SHIFT … #define WM8996_GP3_PD_WIDTH … #define WM8996_GP3_POL … #define WM8996_GP3_POL_MASK … #define WM8996_GP3_POL_SHIFT … #define WM8996_GP3_POL_WIDTH … #define WM8996_GP3_OP_CFG … #define WM8996_GP3_OP_CFG_MASK … #define WM8996_GP3_OP_CFG_SHIFT … #define WM8996_GP3_OP_CFG_WIDTH … #define WM8996_GP3_DB … #define WM8996_GP3_DB_MASK … #define WM8996_GP3_DB_SHIFT … #define WM8996_GP3_DB_WIDTH … #define WM8996_GP3_LVL … #define WM8996_GP3_LVL_MASK … #define WM8996_GP3_LVL_SHIFT … #define WM8996_GP3_LVL_WIDTH … #define WM8996_GP3_FN_MASK … #define WM8996_GP3_FN_SHIFT … #define WM8996_GP3_FN_WIDTH … /* * R1795 (0x703) - GPIO 4 */ #define WM8996_GP4_DIR … #define WM8996_GP4_DIR_MASK … #define WM8996_GP4_DIR_SHIFT … #define WM8996_GP4_DIR_WIDTH … #define WM8996_GP4_PU … #define WM8996_GP4_PU_MASK … #define WM8996_GP4_PU_SHIFT … #define WM8996_GP4_PU_WIDTH … #define WM8996_GP4_PD … #define WM8996_GP4_PD_MASK … #define WM8996_GP4_PD_SHIFT … #define WM8996_GP4_PD_WIDTH … #define WM8996_GP4_POL … #define WM8996_GP4_POL_MASK … #define WM8996_GP4_POL_SHIFT … #define WM8996_GP4_POL_WIDTH … #define WM8996_GP4_OP_CFG … #define WM8996_GP4_OP_CFG_MASK … #define WM8996_GP4_OP_CFG_SHIFT … #define WM8996_GP4_OP_CFG_WIDTH … #define WM8996_GP4_DB … #define WM8996_GP4_DB_MASK … #define WM8996_GP4_DB_SHIFT … #define WM8996_GP4_DB_WIDTH … #define WM8996_GP4_LVL … #define WM8996_GP4_LVL_MASK … #define WM8996_GP4_LVL_SHIFT … #define WM8996_GP4_LVL_WIDTH … #define WM8996_GP4_FN_MASK … #define WM8996_GP4_FN_SHIFT … #define WM8996_GP4_FN_WIDTH … /* * R1796 (0x704) - GPIO 5 */ #define WM8996_GP5_DIR … #define WM8996_GP5_DIR_MASK … #define WM8996_GP5_DIR_SHIFT … #define WM8996_GP5_DIR_WIDTH … #define WM8996_GP5_PU … #define WM8996_GP5_PU_MASK … #define WM8996_GP5_PU_SHIFT … #define WM8996_GP5_PU_WIDTH … #define WM8996_GP5_PD … #define WM8996_GP5_PD_MASK … #define WM8996_GP5_PD_SHIFT … #define WM8996_GP5_PD_WIDTH … #define WM8996_GP5_POL … #define WM8996_GP5_POL_MASK … #define WM8996_GP5_POL_SHIFT … #define WM8996_GP5_POL_WIDTH … #define WM8996_GP5_OP_CFG … #define WM8996_GP5_OP_CFG_MASK … #define WM8996_GP5_OP_CFG_SHIFT … #define WM8996_GP5_OP_CFG_WIDTH … #define WM8996_GP5_DB … #define WM8996_GP5_DB_MASK … #define WM8996_GP5_DB_SHIFT … #define WM8996_GP5_DB_WIDTH … #define WM8996_GP5_LVL … #define WM8996_GP5_LVL_MASK … #define WM8996_GP5_LVL_SHIFT … #define WM8996_GP5_LVL_WIDTH … #define WM8996_GP5_FN_MASK … #define WM8996_GP5_FN_SHIFT … #define WM8996_GP5_FN_WIDTH … /* * R1824 (0x720) - Pull Control (1) */ #define WM8996_DMICDAT2_PD … #define WM8996_DMICDAT2_PD_MASK … #define WM8996_DMICDAT2_PD_SHIFT … #define WM8996_DMICDAT2_PD_WIDTH … #define WM8996_DMICDAT1_PD … #define WM8996_DMICDAT1_PD_MASK … #define WM8996_DMICDAT1_PD_SHIFT … #define WM8996_DMICDAT1_PD_WIDTH … #define WM8996_MCLK2_PU … #define WM8996_MCLK2_PU_MASK … #define WM8996_MCLK2_PU_SHIFT … #define WM8996_MCLK2_PU_WIDTH … #define WM8996_MCLK2_PD … #define WM8996_MCLK2_PD_MASK … #define WM8996_MCLK2_PD_SHIFT … #define WM8996_MCLK2_PD_WIDTH … #define WM8996_MCLK1_PU … #define WM8996_MCLK1_PU_MASK … #define WM8996_MCLK1_PU_SHIFT … #define WM8996_MCLK1_PU_WIDTH … #define WM8996_MCLK1_PD … #define WM8996_MCLK1_PD_MASK … #define WM8996_MCLK1_PD_SHIFT … #define WM8996_MCLK1_PD_WIDTH … #define WM8996_DACDAT1_PU … #define WM8996_DACDAT1_PU_MASK … #define WM8996_DACDAT1_PU_SHIFT … #define WM8996_DACDAT1_PU_WIDTH … #define WM8996_DACDAT1_PD … #define WM8996_DACDAT1_PD_MASK … #define WM8996_DACDAT1_PD_SHIFT … #define WM8996_DACDAT1_PD_WIDTH … #define WM8996_DACLRCLK1_PU … #define WM8996_DACLRCLK1_PU_MASK … #define WM8996_DACLRCLK1_PU_SHIFT … #define WM8996_DACLRCLK1_PU_WIDTH … #define WM8996_DACLRCLK1_PD … #define WM8996_DACLRCLK1_PD_MASK … #define WM8996_DACLRCLK1_PD_SHIFT … #define WM8996_DACLRCLK1_PD_WIDTH … #define WM8996_BCLK1_PU … #define WM8996_BCLK1_PU_MASK … #define WM8996_BCLK1_PU_SHIFT … #define WM8996_BCLK1_PU_WIDTH … #define WM8996_BCLK1_PD … #define WM8996_BCLK1_PD_MASK … #define WM8996_BCLK1_PD_SHIFT … #define WM8996_BCLK1_PD_WIDTH … /* * R1825 (0x721) - Pull Control (2) */ #define WM8996_LDO1ENA_PD … #define WM8996_LDO1ENA_PD_MASK … #define WM8996_LDO1ENA_PD_SHIFT … #define WM8996_LDO1ENA_PD_WIDTH … #define WM8996_ADDR_PD … #define WM8996_ADDR_PD_MASK … #define WM8996_ADDR_PD_SHIFT … #define WM8996_ADDR_PD_WIDTH … #define WM8996_DACDAT2_PU … #define WM8996_DACDAT2_PU_MASK … #define WM8996_DACDAT2_PU_SHIFT … #define WM8996_DACDAT2_PU_WIDTH … #define WM8996_DACDAT2_PD … #define WM8996_DACDAT2_PD_MASK … #define WM8996_DACDAT2_PD_SHIFT … #define WM8996_DACDAT2_PD_WIDTH … #define WM8996_DACLRCLK2_PU … #define WM8996_DACLRCLK2_PU_MASK … #define WM8996_DACLRCLK2_PU_SHIFT … #define WM8996_DACLRCLK2_PU_WIDTH … #define WM8996_DACLRCLK2_PD … #define WM8996_DACLRCLK2_PD_MASK … #define WM8996_DACLRCLK2_PD_SHIFT … #define WM8996_DACLRCLK2_PD_WIDTH … #define WM8996_BCLK2_PU … #define WM8996_BCLK2_PU_MASK … #define WM8996_BCLK2_PU_SHIFT … #define WM8996_BCLK2_PU_WIDTH … #define WM8996_BCLK2_PD … #define WM8996_BCLK2_PD_MASK … #define WM8996_BCLK2_PD_SHIFT … #define WM8996_BCLK2_PD_WIDTH … /* * R1840 (0x730) - Interrupt Status 1 */ #define WM8996_GP5_EINT … #define WM8996_GP5_EINT_MASK … #define WM8996_GP5_EINT_SHIFT … #define WM8996_GP5_EINT_WIDTH … #define WM8996_GP4_EINT … #define WM8996_GP4_EINT_MASK … #define WM8996_GP4_EINT_SHIFT … #define WM8996_GP4_EINT_WIDTH … #define WM8996_GP3_EINT … #define WM8996_GP3_EINT_MASK … #define WM8996_GP3_EINT_SHIFT … #define WM8996_GP3_EINT_WIDTH … #define WM8996_GP2_EINT … #define WM8996_GP2_EINT_MASK … #define WM8996_GP2_EINT_SHIFT … #define WM8996_GP2_EINT_WIDTH … #define WM8996_GP1_EINT … #define WM8996_GP1_EINT_MASK … #define WM8996_GP1_EINT_SHIFT … #define WM8996_GP1_EINT_WIDTH … /* * R1841 (0x731) - Interrupt Status 2 */ #define WM8996_DCS_DONE_23_EINT … #define WM8996_DCS_DONE_23_EINT_MASK … #define WM8996_DCS_DONE_23_EINT_SHIFT … #define WM8996_DCS_DONE_23_EINT_WIDTH … #define WM8996_DCS_DONE_01_EINT … #define WM8996_DCS_DONE_01_EINT_MASK … #define WM8996_DCS_DONE_01_EINT_SHIFT … #define WM8996_DCS_DONE_01_EINT_WIDTH … #define WM8996_WSEQ_DONE_EINT … #define WM8996_WSEQ_DONE_EINT_MASK … #define WM8996_WSEQ_DONE_EINT_SHIFT … #define WM8996_WSEQ_DONE_EINT_WIDTH … #define WM8996_FIFOS_ERR_EINT … #define WM8996_FIFOS_ERR_EINT_MASK … #define WM8996_FIFOS_ERR_EINT_SHIFT … #define WM8996_FIFOS_ERR_EINT_WIDTH … #define WM8996_DSP2DRC_SIG_DET_EINT … #define WM8996_DSP2DRC_SIG_DET_EINT_MASK … #define WM8996_DSP2DRC_SIG_DET_EINT_SHIFT … #define WM8996_DSP2DRC_SIG_DET_EINT_WIDTH … #define WM8996_DSP1DRC_SIG_DET_EINT … #define WM8996_DSP1DRC_SIG_DET_EINT_MASK … #define WM8996_DSP1DRC_SIG_DET_EINT_SHIFT … #define WM8996_DSP1DRC_SIG_DET_EINT_WIDTH … #define WM8996_FLL_SW_CLK_DONE_EINT … #define WM8996_FLL_SW_CLK_DONE_EINT_MASK … #define WM8996_FLL_SW_CLK_DONE_EINT_SHIFT … #define WM8996_FLL_SW_CLK_DONE_EINT_WIDTH … #define WM8996_FLL_LOCK_EINT … #define WM8996_FLL_LOCK_EINT_MASK … #define WM8996_FLL_LOCK_EINT_SHIFT … #define WM8996_FLL_LOCK_EINT_WIDTH … #define WM8996_HP_DONE_EINT … #define WM8996_HP_DONE_EINT_MASK … #define WM8996_HP_DONE_EINT_SHIFT … #define WM8996_HP_DONE_EINT_WIDTH … #define WM8996_MICD_EINT … #define WM8996_MICD_EINT_MASK … #define WM8996_MICD_EINT_SHIFT … #define WM8996_MICD_EINT_WIDTH … /* * R1842 (0x732) - Interrupt Raw Status 2 */ #define WM8996_DCS_DONE_23_STS … #define WM8996_DCS_DONE_23_STS_MASK … #define WM8996_DCS_DONE_23_STS_SHIFT … #define WM8996_DCS_DONE_23_STS_WIDTH … #define WM8996_DCS_DONE_01_STS … #define WM8996_DCS_DONE_01_STS_MASK … #define WM8996_DCS_DONE_01_STS_SHIFT … #define WM8996_DCS_DONE_01_STS_WIDTH … #define WM8996_WSEQ_DONE_STS … #define WM8996_WSEQ_DONE_STS_MASK … #define WM8996_WSEQ_DONE_STS_SHIFT … #define WM8996_WSEQ_DONE_STS_WIDTH … #define WM8996_FIFOS_ERR_STS … #define WM8996_FIFOS_ERR_STS_MASK … #define WM8996_FIFOS_ERR_STS_SHIFT … #define WM8996_FIFOS_ERR_STS_WIDTH … #define WM8996_DSP2DRC_SIG_DET_STS … #define WM8996_DSP2DRC_SIG_DET_STS_MASK … #define WM8996_DSP2DRC_SIG_DET_STS_SHIFT … #define WM8996_DSP2DRC_SIG_DET_STS_WIDTH … #define WM8996_DSP1DRC_SIG_DET_STS … #define WM8996_DSP1DRC_SIG_DET_STS_MASK … #define WM8996_DSP1DRC_SIG_DET_STS_SHIFT … #define WM8996_DSP1DRC_SIG_DET_STS_WIDTH … #define WM8996_FLL_LOCK_STS … #define WM8996_FLL_LOCK_STS_MASK … #define WM8996_FLL_LOCK_STS_SHIFT … #define WM8996_FLL_LOCK_STS_WIDTH … /* * R1848 (0x738) - Interrupt Status 1 Mask */ #define WM8996_IM_GP5_EINT … #define WM8996_IM_GP5_EINT_MASK … #define WM8996_IM_GP5_EINT_SHIFT … #define WM8996_IM_GP5_EINT_WIDTH … #define WM8996_IM_GP4_EINT … #define WM8996_IM_GP4_EINT_MASK … #define WM8996_IM_GP4_EINT_SHIFT … #define WM8996_IM_GP4_EINT_WIDTH … #define WM8996_IM_GP3_EINT … #define WM8996_IM_GP3_EINT_MASK … #define WM8996_IM_GP3_EINT_SHIFT … #define WM8996_IM_GP3_EINT_WIDTH … #define WM8996_IM_GP2_EINT … #define WM8996_IM_GP2_EINT_MASK … #define WM8996_IM_GP2_EINT_SHIFT … #define WM8996_IM_GP2_EINT_WIDTH … #define WM8996_IM_GP1_EINT … #define WM8996_IM_GP1_EINT_MASK … #define WM8996_IM_GP1_EINT_SHIFT … #define WM8996_IM_GP1_EINT_WIDTH … /* * R1849 (0x739) - Interrupt Status 2 Mask */ #define WM8996_IM_DCS_DONE_23_EINT … #define WM8996_IM_DCS_DONE_23_EINT_MASK … #define WM8996_IM_DCS_DONE_23_EINT_SHIFT … #define WM8996_IM_DCS_DONE_23_EINT_WIDTH … #define WM8996_IM_DCS_DONE_01_EINT … #define WM8996_IM_DCS_DONE_01_EINT_MASK … #define WM8996_IM_DCS_DONE_01_EINT_SHIFT … #define WM8996_IM_DCS_DONE_01_EINT_WIDTH … #define WM8996_IM_WSEQ_DONE_EINT … #define WM8996_IM_WSEQ_DONE_EINT_MASK … #define WM8996_IM_WSEQ_DONE_EINT_SHIFT … #define WM8996_IM_WSEQ_DONE_EINT_WIDTH … #define WM8996_IM_FIFOS_ERR_EINT … #define WM8996_IM_FIFOS_ERR_EINT_MASK … #define WM8996_IM_FIFOS_ERR_EINT_SHIFT … #define WM8996_IM_FIFOS_ERR_EINT_WIDTH … #define WM8996_IM_DSP2DRC_SIG_DET_EINT … #define WM8996_IM_DSP2DRC_SIG_DET_EINT_MASK … #define WM8996_IM_DSP2DRC_SIG_DET_EINT_SHIFT … #define WM8996_IM_DSP2DRC_SIG_DET_EINT_WIDTH … #define WM8996_IM_DSP1DRC_SIG_DET_EINT … #define WM8996_IM_DSP1DRC_SIG_DET_EINT_MASK … #define WM8996_IM_DSP1DRC_SIG_DET_EINT_SHIFT … #define WM8996_IM_DSP1DRC_SIG_DET_EINT_WIDTH … #define WM8996_IM_FLL_SW_CLK_DONE_EINT … #define WM8996_IM_FLL_SW_CLK_DONE_EINT_MASK … #define WM8996_IM_FLL_SW_CLK_DONE_EINT_SHIFT … #define WM8996_IM_FLL_SW_CLK_DONE_EINT_WIDTH … #define WM8996_IM_FLL_LOCK_EINT … #define WM8996_IM_FLL_LOCK_EINT_MASK … #define WM8996_IM_FLL_LOCK_EINT_SHIFT … #define WM8996_IM_FLL_LOCK_EINT_WIDTH … #define WM8996_IM_HP_DONE_EINT … #define WM8996_IM_HP_DONE_EINT_MASK … #define WM8996_IM_HP_DONE_EINT_SHIFT … #define WM8996_IM_HP_DONE_EINT_WIDTH … #define WM8996_IM_MICD_EINT … #define WM8996_IM_MICD_EINT_MASK … #define WM8996_IM_MICD_EINT_SHIFT … #define WM8996_IM_MICD_EINT_WIDTH … /* * R1856 (0x740) - Interrupt Control */ #define WM8996_IM_IRQ … #define WM8996_IM_IRQ_MASK … #define WM8996_IM_IRQ_SHIFT … #define WM8996_IM_IRQ_WIDTH … /* * R2048 (0x800) - Left PDM Speaker */ #define WM8996_SPKL_ENA … #define WM8996_SPKL_ENA_MASK … #define WM8996_SPKL_ENA_SHIFT … #define WM8996_SPKL_ENA_WIDTH … #define WM8996_SPKL_MUTE … #define WM8996_SPKL_MUTE_MASK … #define WM8996_SPKL_MUTE_SHIFT … #define WM8996_SPKL_MUTE_WIDTH … #define WM8996_SPKL_MUTE_ZC … #define WM8996_SPKL_MUTE_ZC_MASK … #define WM8996_SPKL_MUTE_ZC_SHIFT … #define WM8996_SPKL_MUTE_ZC_WIDTH … #define WM8996_SPKL_SRC_MASK … #define WM8996_SPKL_SRC_SHIFT … #define WM8996_SPKL_SRC_WIDTH … /* * R2049 (0x801) - Right PDM Speaker */ #define WM8996_SPKR_ENA … #define WM8996_SPKR_ENA_MASK … #define WM8996_SPKR_ENA_SHIFT … #define WM8996_SPKR_ENA_WIDTH … #define WM8996_SPKR_MUTE … #define WM8996_SPKR_MUTE_MASK … #define WM8996_SPKR_MUTE_SHIFT … #define WM8996_SPKR_MUTE_WIDTH … #define WM8996_SPKR_MUTE_ZC … #define WM8996_SPKR_MUTE_ZC_MASK … #define WM8996_SPKR_MUTE_ZC_SHIFT … #define WM8996_SPKR_MUTE_ZC_WIDTH … #define WM8996_SPKR_SRC_MASK … #define WM8996_SPKR_SRC_SHIFT … #define WM8996_SPKR_SRC_WIDTH … /* * R2050 (0x802) - PDM Speaker Mute Sequence */ #define WM8996_SPK_MUTE_ENDIAN … #define WM8996_SPK_MUTE_ENDIAN_MASK … #define WM8996_SPK_MUTE_ENDIAN_SHIFT … #define WM8996_SPK_MUTE_ENDIAN_WIDTH … #define WM8996_SPK_MUTE_SEQ1_MASK … #define WM8996_SPK_MUTE_SEQ1_SHIFT … #define WM8996_SPK_MUTE_SEQ1_WIDTH … /* * R2051 (0x803) - PDM Speaker Volume */ #define WM8996_SPKR_VOL_MASK … #define WM8996_SPKR_VOL_SHIFT … #define WM8996_SPKR_VOL_WIDTH … #define WM8996_SPKL_VOL_MASK … #define WM8996_SPKL_VOL_SHIFT … #define WM8996_SPKL_VOL_WIDTH … #endif
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