linux/sound/soc/codecs/wm8903.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * wm8903.h - WM8903 audio codec interface
 *
 * Copyright 2008 Wolfson Microelectronics PLC.
 * Author: Mark Brown <[email protected]>
 */

#ifndef _WM8903_H
#define _WM8903_H

#include <linux/i2c.h>

extern int wm8903_mic_detect(struct snd_soc_component *component,
			     struct snd_soc_jack *jack,
			     int det, int shrt);


/*
 * Register values.
 */
#define WM8903_SW_RESET_AND_ID
#define WM8903_REVISION_NUMBER
#define WM8903_BIAS_CONTROL_0
#define WM8903_VMID_CONTROL_0
#define WM8903_MIC_BIAS_CONTROL_0
#define WM8903_ANALOGUE_DAC_0
#define WM8903_ANALOGUE_ADC_0
#define WM8903_POWER_MANAGEMENT_0
#define WM8903_POWER_MANAGEMENT_1
#define WM8903_POWER_MANAGEMENT_2
#define WM8903_POWER_MANAGEMENT_3
#define WM8903_POWER_MANAGEMENT_4
#define WM8903_POWER_MANAGEMENT_5
#define WM8903_POWER_MANAGEMENT_6
#define WM8903_CLOCK_RATES_0
#define WM8903_CLOCK_RATES_1
#define WM8903_CLOCK_RATES_2
#define WM8903_AUDIO_INTERFACE_0
#define WM8903_AUDIO_INTERFACE_1
#define WM8903_AUDIO_INTERFACE_2
#define WM8903_AUDIO_INTERFACE_3
#define WM8903_DAC_DIGITAL_VOLUME_LEFT
#define WM8903_DAC_DIGITAL_VOLUME_RIGHT
#define WM8903_DAC_DIGITAL_0
#define WM8903_DAC_DIGITAL_1
#define WM8903_ADC_DIGITAL_VOLUME_LEFT
#define WM8903_ADC_DIGITAL_VOLUME_RIGHT
#define WM8903_ADC_DIGITAL_0
#define WM8903_DIGITAL_MICROPHONE_0
#define WM8903_DRC_0
#define WM8903_DRC_1
#define WM8903_DRC_2
#define WM8903_DRC_3
#define WM8903_ANALOGUE_LEFT_INPUT_0
#define WM8903_ANALOGUE_RIGHT_INPUT_0
#define WM8903_ANALOGUE_LEFT_INPUT_1
#define WM8903_ANALOGUE_RIGHT_INPUT_1
#define WM8903_ANALOGUE_LEFT_MIX_0
#define WM8903_ANALOGUE_RIGHT_MIX_0
#define WM8903_ANALOGUE_SPK_MIX_LEFT_0
#define WM8903_ANALOGUE_SPK_MIX_LEFT_1
#define WM8903_ANALOGUE_SPK_MIX_RIGHT_0
#define WM8903_ANALOGUE_SPK_MIX_RIGHT_1
#define WM8903_ANALOGUE_OUT1_LEFT
#define WM8903_ANALOGUE_OUT1_RIGHT
#define WM8903_ANALOGUE_OUT2_LEFT
#define WM8903_ANALOGUE_OUT2_RIGHT
#define WM8903_ANALOGUE_OUT3_LEFT
#define WM8903_ANALOGUE_OUT3_RIGHT
#define WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0
#define WM8903_DC_SERVO_0
#define WM8903_DC_SERVO_2
#define WM8903_DC_SERVO_4
#define WM8903_DC_SERVO_5
#define WM8903_DC_SERVO_6
#define WM8903_DC_SERVO_7
#define WM8903_DC_SERVO_READBACK_1
#define WM8903_DC_SERVO_READBACK_2
#define WM8903_DC_SERVO_READBACK_3
#define WM8903_DC_SERVO_READBACK_4
#define WM8903_ANALOGUE_HP_0
#define WM8903_ANALOGUE_LINEOUT_0
#define WM8903_CHARGE_PUMP_0
#define WM8903_CLASS_W_0
#define WM8903_WRITE_SEQUENCER_0
#define WM8903_WRITE_SEQUENCER_1
#define WM8903_WRITE_SEQUENCER_2
#define WM8903_WRITE_SEQUENCER_3
#define WM8903_WRITE_SEQUENCER_4
#define WM8903_CONTROL_INTERFACE
#define WM8903_GPIO_CONTROL_1
#define WM8903_GPIO_CONTROL_2
#define WM8903_GPIO_CONTROL_3
#define WM8903_GPIO_CONTROL_4
#define WM8903_GPIO_CONTROL_5
#define WM8903_INTERRUPT_STATUS_1
#define WM8903_INTERRUPT_STATUS_1_MASK
#define WM8903_INTERRUPT_POLARITY_1
#define WM8903_INTERRUPT_CONTROL
#define WM8903_CLOCK_RATE_TEST_4
#define WM8903_ANALOGUE_OUTPUT_BIAS_0

#define WM8903_REGISTER_COUNT
#define WM8903_MAX_REGISTER

/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - SW Reset and ID
 */
#define WM8903_SW_RESET_DEV_ID1_MASK
#define WM8903_SW_RESET_DEV_ID1_SHIFT
#define WM8903_SW_RESET_DEV_ID1_WIDTH

/*
 * R1 (0x01) - Revision Number
 */
#define WM8903_CHIP_REV_MASK
#define WM8903_CHIP_REV_SHIFT
#define WM8903_CHIP_REV_WIDTH

/*
 * R4 (0x04) - Bias Control 0
 */
#define WM8903_POBCTRL
#define WM8903_POBCTRL_MASK
#define WM8903_POBCTRL_SHIFT
#define WM8903_POBCTRL_WIDTH
#define WM8903_ISEL_MASK
#define WM8903_ISEL_SHIFT
#define WM8903_ISEL_WIDTH
#define WM8903_STARTUP_BIAS_ENA
#define WM8903_STARTUP_BIAS_ENA_MASK
#define WM8903_STARTUP_BIAS_ENA_SHIFT
#define WM8903_STARTUP_BIAS_ENA_WIDTH
#define WM8903_BIAS_ENA
#define WM8903_BIAS_ENA_MASK
#define WM8903_BIAS_ENA_SHIFT
#define WM8903_BIAS_ENA_WIDTH

/*
 * R5 (0x05) - VMID Control 0
 */
#define WM8903_VMID_TIE_ENA
#define WM8903_VMID_TIE_ENA_MASK
#define WM8903_VMID_TIE_ENA_SHIFT
#define WM8903_VMID_TIE_ENA_WIDTH
#define WM8903_BUFIO_ENA
#define WM8903_BUFIO_ENA_MASK
#define WM8903_BUFIO_ENA_SHIFT
#define WM8903_BUFIO_ENA_WIDTH
#define WM8903_VMID_IO_ENA
#define WM8903_VMID_IO_ENA_MASK
#define WM8903_VMID_IO_ENA_SHIFT
#define WM8903_VMID_IO_ENA_WIDTH
#define WM8903_VMID_SOFT_MASK
#define WM8903_VMID_SOFT_SHIFT
#define WM8903_VMID_SOFT_WIDTH
#define WM8903_VMID_RES_MASK
#define WM8903_VMID_RES_SHIFT
#define WM8903_VMID_RES_WIDTH
#define WM8903_VMID_BUF_ENA
#define WM8903_VMID_BUF_ENA_MASK
#define WM8903_VMID_BUF_ENA_SHIFT
#define WM8903_VMID_BUF_ENA_WIDTH

#define WM8903_VMID_RES_50K
#define WM8903_VMID_RES_250K
#define WM8903_VMID_RES_5K

/*
 * R8 (0x08) - Analogue DAC 0
 */
#define WM8903_DACBIAS_SEL_MASK
#define WM8903_DACBIAS_SEL_SHIFT
#define WM8903_DACBIAS_SEL_WIDTH
#define WM8903_DACVMID_BIAS_SEL_MASK
#define WM8903_DACVMID_BIAS_SEL_SHIFT
#define WM8903_DACVMID_BIAS_SEL_WIDTH

/*
 * R10 (0x0A) - Analogue ADC 0
 */
#define WM8903_ADC_OSR128
#define WM8903_ADC_OSR128_MASK
#define WM8903_ADC_OSR128_SHIFT
#define WM8903_ADC_OSR128_WIDTH

/*
 * R12 (0x0C) - Power Management 0
 */
#define WM8903_INL_ENA
#define WM8903_INL_ENA_MASK
#define WM8903_INL_ENA_SHIFT
#define WM8903_INL_ENA_WIDTH
#define WM8903_INR_ENA
#define WM8903_INR_ENA_MASK
#define WM8903_INR_ENA_SHIFT
#define WM8903_INR_ENA_WIDTH

/*
 * R13 (0x0D) - Power Management 1
 */
#define WM8903_MIXOUTL_ENA
#define WM8903_MIXOUTL_ENA_MASK
#define WM8903_MIXOUTL_ENA_SHIFT
#define WM8903_MIXOUTL_ENA_WIDTH
#define WM8903_MIXOUTR_ENA
#define WM8903_MIXOUTR_ENA_MASK
#define WM8903_MIXOUTR_ENA_SHIFT
#define WM8903_MIXOUTR_ENA_WIDTH

/*
 * R14 (0x0E) - Power Management 2
 */
#define WM8903_HPL_PGA_ENA
#define WM8903_HPL_PGA_ENA_MASK
#define WM8903_HPL_PGA_ENA_SHIFT
#define WM8903_HPL_PGA_ENA_WIDTH
#define WM8903_HPR_PGA_ENA
#define WM8903_HPR_PGA_ENA_MASK
#define WM8903_HPR_PGA_ENA_SHIFT
#define WM8903_HPR_PGA_ENA_WIDTH

/*
 * R15 (0x0F) - Power Management 3
 */
#define WM8903_LINEOUTL_PGA_ENA
#define WM8903_LINEOUTL_PGA_ENA_MASK
#define WM8903_LINEOUTL_PGA_ENA_SHIFT
#define WM8903_LINEOUTL_PGA_ENA_WIDTH
#define WM8903_LINEOUTR_PGA_ENA
#define WM8903_LINEOUTR_PGA_ENA_MASK
#define WM8903_LINEOUTR_PGA_ENA_SHIFT
#define WM8903_LINEOUTR_PGA_ENA_WIDTH

/*
 * R16 (0x10) - Power Management 4
 */
#define WM8903_MIXSPKL_ENA
#define WM8903_MIXSPKL_ENA_MASK
#define WM8903_MIXSPKL_ENA_SHIFT
#define WM8903_MIXSPKL_ENA_WIDTH
#define WM8903_MIXSPKR_ENA
#define WM8903_MIXSPKR_ENA_MASK
#define WM8903_MIXSPKR_ENA_SHIFT
#define WM8903_MIXSPKR_ENA_WIDTH

/*
 * R17 (0x11) - Power Management 5
 */
#define WM8903_SPKL_ENA
#define WM8903_SPKL_ENA_MASK
#define WM8903_SPKL_ENA_SHIFT
#define WM8903_SPKL_ENA_WIDTH
#define WM8903_SPKR_ENA
#define WM8903_SPKR_ENA_MASK
#define WM8903_SPKR_ENA_SHIFT
#define WM8903_SPKR_ENA_WIDTH

/*
 * R18 (0x12) - Power Management 6
 */
#define WM8903_DACL_ENA
#define WM8903_DACL_ENA_MASK
#define WM8903_DACL_ENA_SHIFT
#define WM8903_DACL_ENA_WIDTH
#define WM8903_DACR_ENA
#define WM8903_DACR_ENA_MASK
#define WM8903_DACR_ENA_SHIFT
#define WM8903_DACR_ENA_WIDTH
#define WM8903_ADCL_ENA
#define WM8903_ADCL_ENA_MASK
#define WM8903_ADCL_ENA_SHIFT
#define WM8903_ADCL_ENA_WIDTH
#define WM8903_ADCR_ENA
#define WM8903_ADCR_ENA_MASK
#define WM8903_ADCR_ENA_SHIFT
#define WM8903_ADCR_ENA_WIDTH

/*
 * R20 (0x14) - Clock Rates 0
 */
#define WM8903_MCLKDIV2
#define WM8903_MCLKDIV2_MASK
#define WM8903_MCLKDIV2_SHIFT
#define WM8903_MCLKDIV2_WIDTH

/*
 * R21 (0x15) - Clock Rates 1
 */
#define WM8903_CLK_SYS_RATE_MASK
#define WM8903_CLK_SYS_RATE_SHIFT
#define WM8903_CLK_SYS_RATE_WIDTH
#define WM8903_CLK_SYS_MODE_MASK
#define WM8903_CLK_SYS_MODE_SHIFT
#define WM8903_CLK_SYS_MODE_WIDTH
#define WM8903_SAMPLE_RATE_MASK
#define WM8903_SAMPLE_RATE_SHIFT
#define WM8903_SAMPLE_RATE_WIDTH

/*
 * R22 (0x16) - Clock Rates 2
 */
#define WM8903_CLK_SYS_ENA
#define WM8903_CLK_SYS_ENA_MASK
#define WM8903_CLK_SYS_ENA_SHIFT
#define WM8903_CLK_SYS_ENA_WIDTH
#define WM8903_CLK_DSP_ENA
#define WM8903_CLK_DSP_ENA_MASK
#define WM8903_CLK_DSP_ENA_SHIFT
#define WM8903_CLK_DSP_ENA_WIDTH
#define WM8903_TO_ENA
#define WM8903_TO_ENA_MASK
#define WM8903_TO_ENA_SHIFT
#define WM8903_TO_ENA_WIDTH

/*
 * R24 (0x18) - Audio Interface 0
 */
#define WM8903_DACL_DATINV
#define WM8903_DACL_DATINV_MASK
#define WM8903_DACL_DATINV_SHIFT
#define WM8903_DACL_DATINV_WIDTH
#define WM8903_DACR_DATINV
#define WM8903_DACR_DATINV_MASK
#define WM8903_DACR_DATINV_SHIFT
#define WM8903_DACR_DATINV_WIDTH
#define WM8903_DAC_BOOST_MASK
#define WM8903_DAC_BOOST_SHIFT
#define WM8903_DAC_BOOST_WIDTH
#define WM8903_LOOPBACK
#define WM8903_LOOPBACK_MASK
#define WM8903_LOOPBACK_SHIFT
#define WM8903_LOOPBACK_WIDTH
#define WM8903_AIFADCL_SRC
#define WM8903_AIFADCL_SRC_MASK
#define WM8903_AIFADCL_SRC_SHIFT
#define WM8903_AIFADCL_SRC_WIDTH
#define WM8903_AIFADCR_SRC
#define WM8903_AIFADCR_SRC_MASK
#define WM8903_AIFADCR_SRC_SHIFT
#define WM8903_AIFADCR_SRC_WIDTH
#define WM8903_AIFDACL_SRC
#define WM8903_AIFDACL_SRC_MASK
#define WM8903_AIFDACL_SRC_SHIFT
#define WM8903_AIFDACL_SRC_WIDTH
#define WM8903_AIFDACR_SRC
#define WM8903_AIFDACR_SRC_MASK
#define WM8903_AIFDACR_SRC_SHIFT
#define WM8903_AIFDACR_SRC_WIDTH
#define WM8903_ADC_COMP
#define WM8903_ADC_COMP_MASK
#define WM8903_ADC_COMP_SHIFT
#define WM8903_ADC_COMP_WIDTH
#define WM8903_ADC_COMPMODE
#define WM8903_ADC_COMPMODE_MASK
#define WM8903_ADC_COMPMODE_SHIFT
#define WM8903_ADC_COMPMODE_WIDTH
#define WM8903_DAC_COMP
#define WM8903_DAC_COMP_MASK
#define WM8903_DAC_COMP_SHIFT
#define WM8903_DAC_COMP_WIDTH
#define WM8903_DAC_COMPMODE
#define WM8903_DAC_COMPMODE_MASK
#define WM8903_DAC_COMPMODE_SHIFT
#define WM8903_DAC_COMPMODE_WIDTH

/*
 * R25 (0x19) - Audio Interface 1
 */
#define WM8903_AIFDAC_TDM
#define WM8903_AIFDAC_TDM_MASK
#define WM8903_AIFDAC_TDM_SHIFT
#define WM8903_AIFDAC_TDM_WIDTH
#define WM8903_AIFDAC_TDM_CHAN
#define WM8903_AIFDAC_TDM_CHAN_MASK
#define WM8903_AIFDAC_TDM_CHAN_SHIFT
#define WM8903_AIFDAC_TDM_CHAN_WIDTH
#define WM8903_AIFADC_TDM
#define WM8903_AIFADC_TDM_MASK
#define WM8903_AIFADC_TDM_SHIFT
#define WM8903_AIFADC_TDM_WIDTH
#define WM8903_AIFADC_TDM_CHAN
#define WM8903_AIFADC_TDM_CHAN_MASK
#define WM8903_AIFADC_TDM_CHAN_SHIFT
#define WM8903_AIFADC_TDM_CHAN_WIDTH
#define WM8903_LRCLK_DIR
#define WM8903_LRCLK_DIR_MASK
#define WM8903_LRCLK_DIR_SHIFT
#define WM8903_LRCLK_DIR_WIDTH
#define WM8903_AIF_BCLK_INV
#define WM8903_AIF_BCLK_INV_MASK
#define WM8903_AIF_BCLK_INV_SHIFT
#define WM8903_AIF_BCLK_INV_WIDTH
#define WM8903_BCLK_DIR
#define WM8903_BCLK_DIR_MASK
#define WM8903_BCLK_DIR_SHIFT
#define WM8903_BCLK_DIR_WIDTH
#define WM8903_AIF_LRCLK_INV
#define WM8903_AIF_LRCLK_INV_MASK
#define WM8903_AIF_LRCLK_INV_SHIFT
#define WM8903_AIF_LRCLK_INV_WIDTH
#define WM8903_AIF_WL_MASK
#define WM8903_AIF_WL_SHIFT
#define WM8903_AIF_WL_WIDTH
#define WM8903_AIF_FMT_MASK
#define WM8903_AIF_FMT_SHIFT
#define WM8903_AIF_FMT_WIDTH

/*
 * R26 (0x1A) - Audio Interface 2
 */
#define WM8903_BCLK_DIV_MASK
#define WM8903_BCLK_DIV_SHIFT
#define WM8903_BCLK_DIV_WIDTH

/*
 * R27 (0x1B) - Audio Interface 3
 */
#define WM8903_LRCLK_RATE_MASK
#define WM8903_LRCLK_RATE_SHIFT
#define WM8903_LRCLK_RATE_WIDTH

/*
 * R30 (0x1E) - DAC Digital Volume Left
 */
#define WM8903_DACVU
#define WM8903_DACVU_MASK
#define WM8903_DACVU_SHIFT
#define WM8903_DACVU_WIDTH
#define WM8903_DACL_VOL_MASK
#define WM8903_DACL_VOL_SHIFT
#define WM8903_DACL_VOL_WIDTH

/*
 * R31 (0x1F) - DAC Digital Volume Right
 */
#define WM8903_DACVU
#define WM8903_DACVU_MASK
#define WM8903_DACVU_SHIFT
#define WM8903_DACVU_WIDTH
#define WM8903_DACR_VOL_MASK
#define WM8903_DACR_VOL_SHIFT
#define WM8903_DACR_VOL_WIDTH

/*
 * R32 (0x20) - DAC Digital 0
 */
#define WM8903_ADCL_DAC_SVOL_MASK
#define WM8903_ADCL_DAC_SVOL_SHIFT
#define WM8903_ADCL_DAC_SVOL_WIDTH
#define WM8903_ADCR_DAC_SVOL_MASK
#define WM8903_ADCR_DAC_SVOL_SHIFT
#define WM8903_ADCR_DAC_SVOL_WIDTH
#define WM8903_ADC_TO_DACL_MASK
#define WM8903_ADC_TO_DACL_SHIFT
#define WM8903_ADC_TO_DACL_WIDTH
#define WM8903_ADC_TO_DACR_MASK
#define WM8903_ADC_TO_DACR_SHIFT
#define WM8903_ADC_TO_DACR_WIDTH

/*
 * R33 (0x21) - DAC Digital 1
 */
#define WM8903_DAC_MONO
#define WM8903_DAC_MONO_MASK
#define WM8903_DAC_MONO_SHIFT
#define WM8903_DAC_MONO_WIDTH
#define WM8903_DAC_SB_FILT
#define WM8903_DAC_SB_FILT_MASK
#define WM8903_DAC_SB_FILT_SHIFT
#define WM8903_DAC_SB_FILT_WIDTH
#define WM8903_DAC_MUTERATE
#define WM8903_DAC_MUTERATE_MASK
#define WM8903_DAC_MUTERATE_SHIFT
#define WM8903_DAC_MUTERATE_WIDTH
#define WM8903_DAC_MUTEMODE
#define WM8903_DAC_MUTEMODE_MASK
#define WM8903_DAC_MUTEMODE_SHIFT
#define WM8903_DAC_MUTEMODE_WIDTH
#define WM8903_DAC_MUTE
#define WM8903_DAC_MUTE_MASK
#define WM8903_DAC_MUTE_SHIFT
#define WM8903_DAC_MUTE_WIDTH
#define WM8903_DEEMPH_MASK
#define WM8903_DEEMPH_SHIFT
#define WM8903_DEEMPH_WIDTH

/*
 * R36 (0x24) - ADC Digital Volume Left
 */
#define WM8903_ADCVU
#define WM8903_ADCVU_MASK
#define WM8903_ADCVU_SHIFT
#define WM8903_ADCVU_WIDTH
#define WM8903_ADCL_VOL_MASK
#define WM8903_ADCL_VOL_SHIFT
#define WM8903_ADCL_VOL_WIDTH

/*
 * R37 (0x25) - ADC Digital Volume Right
 */
#define WM8903_ADCVU
#define WM8903_ADCVU_MASK
#define WM8903_ADCVU_SHIFT
#define WM8903_ADCVU_WIDTH
#define WM8903_ADCR_VOL_MASK
#define WM8903_ADCR_VOL_SHIFT
#define WM8903_ADCR_VOL_WIDTH

/*
 * R38 (0x26) - ADC Digital 0
 */
#define WM8903_ADC_HPF_CUT_MASK
#define WM8903_ADC_HPF_CUT_SHIFT
#define WM8903_ADC_HPF_CUT_WIDTH
#define WM8903_ADC_HPF_ENA
#define WM8903_ADC_HPF_ENA_MASK
#define WM8903_ADC_HPF_ENA_SHIFT
#define WM8903_ADC_HPF_ENA_WIDTH
#define WM8903_ADCL_DATINV
#define WM8903_ADCL_DATINV_MASK
#define WM8903_ADCL_DATINV_SHIFT
#define WM8903_ADCL_DATINV_WIDTH
#define WM8903_ADCR_DATINV
#define WM8903_ADCR_DATINV_MASK
#define WM8903_ADCR_DATINV_SHIFT
#define WM8903_ADCR_DATINV_WIDTH

/*
 * R39 (0x27) - Digital Microphone 0
 */
#define WM8903_DIGMIC_MODE_SEL
#define WM8903_DIGMIC_MODE_SEL_MASK
#define WM8903_DIGMIC_MODE_SEL_SHIFT
#define WM8903_DIGMIC_MODE_SEL_WIDTH
#define WM8903_DIGMIC_CLK_SEL_L_MASK
#define WM8903_DIGMIC_CLK_SEL_L_SHIFT
#define WM8903_DIGMIC_CLK_SEL_L_WIDTH
#define WM8903_DIGMIC_CLK_SEL_R_MASK
#define WM8903_DIGMIC_CLK_SEL_R_SHIFT
#define WM8903_DIGMIC_CLK_SEL_R_WIDTH
#define WM8903_DIGMIC_CLK_SEL_RT_MASK
#define WM8903_DIGMIC_CLK_SEL_RT_SHIFT
#define WM8903_DIGMIC_CLK_SEL_RT_WIDTH
#define WM8903_DIGMIC_CLK_SEL_MASK
#define WM8903_DIGMIC_CLK_SEL_SHIFT
#define WM8903_DIGMIC_CLK_SEL_WIDTH

/*
 * R40 (0x28) - DRC 0
 */
#define WM8903_DRC_ENA
#define WM8903_DRC_ENA_MASK
#define WM8903_DRC_ENA_SHIFT
#define WM8903_DRC_ENA_WIDTH
#define WM8903_DRC_THRESH_HYST_MASK
#define WM8903_DRC_THRESH_HYST_SHIFT
#define WM8903_DRC_THRESH_HYST_WIDTH
#define WM8903_DRC_STARTUP_GAIN_MASK
#define WM8903_DRC_STARTUP_GAIN_SHIFT
#define WM8903_DRC_STARTUP_GAIN_WIDTH
#define WM8903_DRC_FF_DELAY
#define WM8903_DRC_FF_DELAY_MASK
#define WM8903_DRC_FF_DELAY_SHIFT
#define WM8903_DRC_FF_DELAY_WIDTH
#define WM8903_DRC_SMOOTH_ENA
#define WM8903_DRC_SMOOTH_ENA_MASK
#define WM8903_DRC_SMOOTH_ENA_SHIFT
#define WM8903_DRC_SMOOTH_ENA_WIDTH
#define WM8903_DRC_QR_ENA
#define WM8903_DRC_QR_ENA_MASK
#define WM8903_DRC_QR_ENA_SHIFT
#define WM8903_DRC_QR_ENA_WIDTH
#define WM8903_DRC_ANTICLIP_ENA
#define WM8903_DRC_ANTICLIP_ENA_MASK
#define WM8903_DRC_ANTICLIP_ENA_SHIFT
#define WM8903_DRC_ANTICLIP_ENA_WIDTH
#define WM8903_DRC_HYST_ENA
#define WM8903_DRC_HYST_ENA_MASK
#define WM8903_DRC_HYST_ENA_SHIFT
#define WM8903_DRC_HYST_ENA_WIDTH

/*
 * R41 (0x29) - DRC 1
 */
#define WM8903_DRC_ATTACK_RATE_MASK
#define WM8903_DRC_ATTACK_RATE_SHIFT
#define WM8903_DRC_ATTACK_RATE_WIDTH
#define WM8903_DRC_DECAY_RATE_MASK
#define WM8903_DRC_DECAY_RATE_SHIFT
#define WM8903_DRC_DECAY_RATE_WIDTH
#define WM8903_DRC_THRESH_QR_MASK
#define WM8903_DRC_THRESH_QR_SHIFT
#define WM8903_DRC_THRESH_QR_WIDTH
#define WM8903_DRC_RATE_QR_MASK
#define WM8903_DRC_RATE_QR_SHIFT
#define WM8903_DRC_RATE_QR_WIDTH
#define WM8903_DRC_MINGAIN_MASK
#define WM8903_DRC_MINGAIN_SHIFT
#define WM8903_DRC_MINGAIN_WIDTH
#define WM8903_DRC_MAXGAIN_MASK
#define WM8903_DRC_MAXGAIN_SHIFT
#define WM8903_DRC_MAXGAIN_WIDTH

/*
 * R42 (0x2A) - DRC 2
 */
#define WM8903_DRC_R0_SLOPE_COMP_MASK
#define WM8903_DRC_R0_SLOPE_COMP_SHIFT
#define WM8903_DRC_R0_SLOPE_COMP_WIDTH
#define WM8903_DRC_R1_SLOPE_COMP_MASK
#define WM8903_DRC_R1_SLOPE_COMP_SHIFT
#define WM8903_DRC_R1_SLOPE_COMP_WIDTH

/*
 * R43 (0x2B) - DRC 3
 */
#define WM8903_DRC_THRESH_COMP_MASK
#define WM8903_DRC_THRESH_COMP_SHIFT
#define WM8903_DRC_THRESH_COMP_WIDTH
#define WM8903_DRC_AMP_COMP_MASK
#define WM8903_DRC_AMP_COMP_SHIFT
#define WM8903_DRC_AMP_COMP_WIDTH

/*
 * R44 (0x2C) - Analogue Left Input 0
 */
#define WM8903_LINMUTE
#define WM8903_LINMUTE_MASK
#define WM8903_LINMUTE_SHIFT
#define WM8903_LINMUTE_WIDTH
#define WM8903_LIN_VOL_MASK
#define WM8903_LIN_VOL_SHIFT
#define WM8903_LIN_VOL_WIDTH

/*
 * R45 (0x2D) - Analogue Right Input 0
 */
#define WM8903_RINMUTE
#define WM8903_RINMUTE_MASK
#define WM8903_RINMUTE_SHIFT
#define WM8903_RINMUTE_WIDTH
#define WM8903_RIN_VOL_MASK
#define WM8903_RIN_VOL_SHIFT
#define WM8903_RIN_VOL_WIDTH

/*
 * R46 (0x2E) - Analogue Left Input 1
 */
#define WM8903_INL_CM_ENA
#define WM8903_INL_CM_ENA_MASK
#define WM8903_INL_CM_ENA_SHIFT
#define WM8903_INL_CM_ENA_WIDTH
#define WM8903_L_IP_SEL_N_MASK
#define WM8903_L_IP_SEL_N_SHIFT
#define WM8903_L_IP_SEL_N_WIDTH
#define WM8903_L_IP_SEL_P_MASK
#define WM8903_L_IP_SEL_P_SHIFT
#define WM8903_L_IP_SEL_P_WIDTH
#define WM8903_L_MODE_MASK
#define WM8903_L_MODE_SHIFT
#define WM8903_L_MODE_WIDTH

/*
 * R47 (0x2F) - Analogue Right Input 1
 */
#define WM8903_INR_CM_ENA
#define WM8903_INR_CM_ENA_MASK
#define WM8903_INR_CM_ENA_SHIFT
#define WM8903_INR_CM_ENA_WIDTH
#define WM8903_R_IP_SEL_N_MASK
#define WM8903_R_IP_SEL_N_SHIFT
#define WM8903_R_IP_SEL_N_WIDTH
#define WM8903_R_IP_SEL_P_MASK
#define WM8903_R_IP_SEL_P_SHIFT
#define WM8903_R_IP_SEL_P_WIDTH
#define WM8903_R_MODE_MASK
#define WM8903_R_MODE_SHIFT
#define WM8903_R_MODE_WIDTH

/*
 * R50 (0x32) - Analogue Left Mix 0
 */
#define WM8903_DACL_TO_MIXOUTL
#define WM8903_DACL_TO_MIXOUTL_MASK
#define WM8903_DACL_TO_MIXOUTL_SHIFT
#define WM8903_DACL_TO_MIXOUTL_WIDTH
#define WM8903_DACR_TO_MIXOUTL
#define WM8903_DACR_TO_MIXOUTL_MASK
#define WM8903_DACR_TO_MIXOUTL_SHIFT
#define WM8903_DACR_TO_MIXOUTL_WIDTH
#define WM8903_BYPASSL_TO_MIXOUTL
#define WM8903_BYPASSL_TO_MIXOUTL_MASK
#define WM8903_BYPASSL_TO_MIXOUTL_SHIFT
#define WM8903_BYPASSL_TO_MIXOUTL_WIDTH
#define WM8903_BYPASSR_TO_MIXOUTL
#define WM8903_BYPASSR_TO_MIXOUTL_MASK
#define WM8903_BYPASSR_TO_MIXOUTL_SHIFT
#define WM8903_BYPASSR_TO_MIXOUTL_WIDTH

/*
 * R51 (0x33) - Analogue Right Mix 0
 */
#define WM8903_DACL_TO_MIXOUTR
#define WM8903_DACL_TO_MIXOUTR_MASK
#define WM8903_DACL_TO_MIXOUTR_SHIFT
#define WM8903_DACL_TO_MIXOUTR_WIDTH
#define WM8903_DACR_TO_MIXOUTR
#define WM8903_DACR_TO_MIXOUTR_MASK
#define WM8903_DACR_TO_MIXOUTR_SHIFT
#define WM8903_DACR_TO_MIXOUTR_WIDTH
#define WM8903_BYPASSL_TO_MIXOUTR
#define WM8903_BYPASSL_TO_MIXOUTR_MASK
#define WM8903_BYPASSL_TO_MIXOUTR_SHIFT
#define WM8903_BYPASSL_TO_MIXOUTR_WIDTH
#define WM8903_BYPASSR_TO_MIXOUTR
#define WM8903_BYPASSR_TO_MIXOUTR_MASK
#define WM8903_BYPASSR_TO_MIXOUTR_SHIFT
#define WM8903_BYPASSR_TO_MIXOUTR_WIDTH

/*
 * R52 (0x34) - Analogue Spk Mix Left 0
 */
#define WM8903_DACL_TO_MIXSPKL
#define WM8903_DACL_TO_MIXSPKL_MASK
#define WM8903_DACL_TO_MIXSPKL_SHIFT
#define WM8903_DACL_TO_MIXSPKL_WIDTH
#define WM8903_DACR_TO_MIXSPKL
#define WM8903_DACR_TO_MIXSPKL_MASK
#define WM8903_DACR_TO_MIXSPKL_SHIFT
#define WM8903_DACR_TO_MIXSPKL_WIDTH
#define WM8903_BYPASSL_TO_MIXSPKL
#define WM8903_BYPASSL_TO_MIXSPKL_MASK
#define WM8903_BYPASSL_TO_MIXSPKL_SHIFT
#define WM8903_BYPASSL_TO_MIXSPKL_WIDTH
#define WM8903_BYPASSR_TO_MIXSPKL
#define WM8903_BYPASSR_TO_MIXSPKL_MASK
#define WM8903_BYPASSR_TO_MIXSPKL_SHIFT
#define WM8903_BYPASSR_TO_MIXSPKL_WIDTH

/*
 * R53 (0x35) - Analogue Spk Mix Left 1
 */
#define WM8903_DACL_MIXSPKL_VOL
#define WM8903_DACL_MIXSPKL_VOL_MASK
#define WM8903_DACL_MIXSPKL_VOL_SHIFT
#define WM8903_DACL_MIXSPKL_VOL_WIDTH
#define WM8903_DACR_MIXSPKL_VOL
#define WM8903_DACR_MIXSPKL_VOL_MASK
#define WM8903_DACR_MIXSPKL_VOL_SHIFT
#define WM8903_DACR_MIXSPKL_VOL_WIDTH
#define WM8903_BYPASSL_MIXSPKL_VOL
#define WM8903_BYPASSL_MIXSPKL_VOL_MASK
#define WM8903_BYPASSL_MIXSPKL_VOL_SHIFT
#define WM8903_BYPASSL_MIXSPKL_VOL_WIDTH
#define WM8903_BYPASSR_MIXSPKL_VOL
#define WM8903_BYPASSR_MIXSPKL_VOL_MASK
#define WM8903_BYPASSR_MIXSPKL_VOL_SHIFT
#define WM8903_BYPASSR_MIXSPKL_VOL_WIDTH

/*
 * R54 (0x36) - Analogue Spk Mix Right 0
 */
#define WM8903_DACL_TO_MIXSPKR
#define WM8903_DACL_TO_MIXSPKR_MASK
#define WM8903_DACL_TO_MIXSPKR_SHIFT
#define WM8903_DACL_TO_MIXSPKR_WIDTH
#define WM8903_DACR_TO_MIXSPKR
#define WM8903_DACR_TO_MIXSPKR_MASK
#define WM8903_DACR_TO_MIXSPKR_SHIFT
#define WM8903_DACR_TO_MIXSPKR_WIDTH
#define WM8903_BYPASSL_TO_MIXSPKR
#define WM8903_BYPASSL_TO_MIXSPKR_MASK
#define WM8903_BYPASSL_TO_MIXSPKR_SHIFT
#define WM8903_BYPASSL_TO_MIXSPKR_WIDTH
#define WM8903_BYPASSR_TO_MIXSPKR
#define WM8903_BYPASSR_TO_MIXSPKR_MASK
#define WM8903_BYPASSR_TO_MIXSPKR_SHIFT
#define WM8903_BYPASSR_TO_MIXSPKR_WIDTH

/*
 * R55 (0x37) - Analogue Spk Mix Right 1
 */
#define WM8903_DACL_MIXSPKR_VOL
#define WM8903_DACL_MIXSPKR_VOL_MASK
#define WM8903_DACL_MIXSPKR_VOL_SHIFT
#define WM8903_DACL_MIXSPKR_VOL_WIDTH
#define WM8903_DACR_MIXSPKR_VOL
#define WM8903_DACR_MIXSPKR_VOL_MASK
#define WM8903_DACR_MIXSPKR_VOL_SHIFT
#define WM8903_DACR_MIXSPKR_VOL_WIDTH
#define WM8903_BYPASSL_MIXSPKR_VOL
#define WM8903_BYPASSL_MIXSPKR_VOL_MASK
#define WM8903_BYPASSL_MIXSPKR_VOL_SHIFT
#define WM8903_BYPASSL_MIXSPKR_VOL_WIDTH
#define WM8903_BYPASSR_MIXSPKR_VOL
#define WM8903_BYPASSR_MIXSPKR_VOL_MASK
#define WM8903_BYPASSR_MIXSPKR_VOL_SHIFT
#define WM8903_BYPASSR_MIXSPKR_VOL_WIDTH

/*
 * R57 (0x39) - Analogue OUT1 Left
 */
#define WM8903_HPL_MUTE
#define WM8903_HPL_MUTE_MASK
#define WM8903_HPL_MUTE_SHIFT
#define WM8903_HPL_MUTE_WIDTH
#define WM8903_HPOUTVU
#define WM8903_HPOUTVU_MASK
#define WM8903_HPOUTVU_SHIFT
#define WM8903_HPOUTVU_WIDTH
#define WM8903_HPOUTLZC
#define WM8903_HPOUTLZC_MASK
#define WM8903_HPOUTLZC_SHIFT
#define WM8903_HPOUTLZC_WIDTH
#define WM8903_HPOUTL_VOL_MASK
#define WM8903_HPOUTL_VOL_SHIFT
#define WM8903_HPOUTL_VOL_WIDTH

/*
 * R58 (0x3A) - Analogue OUT1 Right
 */
#define WM8903_HPR_MUTE
#define WM8903_HPR_MUTE_MASK
#define WM8903_HPR_MUTE_SHIFT
#define WM8903_HPR_MUTE_WIDTH
#define WM8903_HPOUTVU
#define WM8903_HPOUTVU_MASK
#define WM8903_HPOUTVU_SHIFT
#define WM8903_HPOUTVU_WIDTH
#define WM8903_HPOUTRZC
#define WM8903_HPOUTRZC_MASK
#define WM8903_HPOUTRZC_SHIFT
#define WM8903_HPOUTRZC_WIDTH
#define WM8903_HPOUTR_VOL_MASK
#define WM8903_HPOUTR_VOL_SHIFT
#define WM8903_HPOUTR_VOL_WIDTH

/*
 * R59 (0x3B) - Analogue OUT2 Left
 */
#define WM8903_LINEOUTL_MUTE
#define WM8903_LINEOUTL_MUTE_MASK
#define WM8903_LINEOUTL_MUTE_SHIFT
#define WM8903_LINEOUTL_MUTE_WIDTH
#define WM8903_LINEOUTVU
#define WM8903_LINEOUTVU_MASK
#define WM8903_LINEOUTVU_SHIFT
#define WM8903_LINEOUTVU_WIDTH
#define WM8903_LINEOUTLZC
#define WM8903_LINEOUTLZC_MASK
#define WM8903_LINEOUTLZC_SHIFT
#define WM8903_LINEOUTLZC_WIDTH
#define WM8903_LINEOUTL_VOL_MASK
#define WM8903_LINEOUTL_VOL_SHIFT
#define WM8903_LINEOUTL_VOL_WIDTH

/*
 * R60 (0x3C) - Analogue OUT2 Right
 */
#define WM8903_LINEOUTR_MUTE
#define WM8903_LINEOUTR_MUTE_MASK
#define WM8903_LINEOUTR_MUTE_SHIFT
#define WM8903_LINEOUTR_MUTE_WIDTH
#define WM8903_LINEOUTVU
#define WM8903_LINEOUTVU_MASK
#define WM8903_LINEOUTVU_SHIFT
#define WM8903_LINEOUTVU_WIDTH
#define WM8903_LINEOUTRZC
#define WM8903_LINEOUTRZC_MASK
#define WM8903_LINEOUTRZC_SHIFT
#define WM8903_LINEOUTRZC_WIDTH
#define WM8903_LINEOUTR_VOL_MASK
#define WM8903_LINEOUTR_VOL_SHIFT
#define WM8903_LINEOUTR_VOL_WIDTH

/*
 * R62 (0x3E) - Analogue OUT3 Left
 */
#define WM8903_SPKL_MUTE
#define WM8903_SPKL_MUTE_MASK
#define WM8903_SPKL_MUTE_SHIFT
#define WM8903_SPKL_MUTE_WIDTH
#define WM8903_SPKVU
#define WM8903_SPKVU_MASK
#define WM8903_SPKVU_SHIFT
#define WM8903_SPKVU_WIDTH
#define WM8903_SPKLZC
#define WM8903_SPKLZC_MASK
#define WM8903_SPKLZC_SHIFT
#define WM8903_SPKLZC_WIDTH
#define WM8903_SPKL_VOL_MASK
#define WM8903_SPKL_VOL_SHIFT
#define WM8903_SPKL_VOL_WIDTH

/*
 * R63 (0x3F) - Analogue OUT3 Right
 */
#define WM8903_SPKR_MUTE
#define WM8903_SPKR_MUTE_MASK
#define WM8903_SPKR_MUTE_SHIFT
#define WM8903_SPKR_MUTE_WIDTH
#define WM8903_SPKVU
#define WM8903_SPKVU_MASK
#define WM8903_SPKVU_SHIFT
#define WM8903_SPKVU_WIDTH
#define WM8903_SPKRZC
#define WM8903_SPKRZC_MASK
#define WM8903_SPKRZC_SHIFT
#define WM8903_SPKRZC_WIDTH
#define WM8903_SPKR_VOL_MASK
#define WM8903_SPKR_VOL_SHIFT
#define WM8903_SPKR_VOL_WIDTH

/*
 * R65 (0x41) - Analogue SPK Output Control 0
 */
#define WM8903_SPK_DISCHARGE
#define WM8903_SPK_DISCHARGE_MASK
#define WM8903_SPK_DISCHARGE_SHIFT
#define WM8903_SPK_DISCHARGE_WIDTH
#define WM8903_VROI
#define WM8903_VROI_MASK
#define WM8903_VROI_SHIFT
#define WM8903_VROI_WIDTH

/*
 * R67 (0x43) - DC Servo 0
 */
#define WM8903_DCS_MASTER_ENA
#define WM8903_DCS_MASTER_ENA_MASK
#define WM8903_DCS_MASTER_ENA_SHIFT
#define WM8903_DCS_MASTER_ENA_WIDTH
#define WM8903_DCS_ENA_MASK
#define WM8903_DCS_ENA_SHIFT
#define WM8903_DCS_ENA_WIDTH

/*
 * R69 (0x45) - DC Servo 2
 */
#define WM8903_DCS_MODE_MASK
#define WM8903_DCS_MODE_SHIFT
#define WM8903_DCS_MODE_WIDTH

/*
 * R90 (0x5A) - Analogue HP 0
 */
#define WM8903_HPL_RMV_SHORT
#define WM8903_HPL_RMV_SHORT_MASK
#define WM8903_HPL_RMV_SHORT_SHIFT
#define WM8903_HPL_RMV_SHORT_WIDTH
#define WM8903_HPL_ENA_OUTP
#define WM8903_HPL_ENA_OUTP_MASK
#define WM8903_HPL_ENA_OUTP_SHIFT
#define WM8903_HPL_ENA_OUTP_WIDTH
#define WM8903_HPL_ENA_DLY
#define WM8903_HPL_ENA_DLY_MASK
#define WM8903_HPL_ENA_DLY_SHIFT
#define WM8903_HPL_ENA_DLY_WIDTH
#define WM8903_HPL_ENA
#define WM8903_HPL_ENA_MASK
#define WM8903_HPL_ENA_SHIFT
#define WM8903_HPL_ENA_WIDTH
#define WM8903_HPR_RMV_SHORT
#define WM8903_HPR_RMV_SHORT_MASK
#define WM8903_HPR_RMV_SHORT_SHIFT
#define WM8903_HPR_RMV_SHORT_WIDTH
#define WM8903_HPR_ENA_OUTP
#define WM8903_HPR_ENA_OUTP_MASK
#define WM8903_HPR_ENA_OUTP_SHIFT
#define WM8903_HPR_ENA_OUTP_WIDTH
#define WM8903_HPR_ENA_DLY
#define WM8903_HPR_ENA_DLY_MASK
#define WM8903_HPR_ENA_DLY_SHIFT
#define WM8903_HPR_ENA_DLY_WIDTH
#define WM8903_HPR_ENA
#define WM8903_HPR_ENA_MASK
#define WM8903_HPR_ENA_SHIFT
#define WM8903_HPR_ENA_WIDTH

/*
 * R94 (0x5E) - Analogue Lineout 0
 */
#define WM8903_LINEOUTL_RMV_SHORT
#define WM8903_LINEOUTL_RMV_SHORT_MASK
#define WM8903_LINEOUTL_RMV_SHORT_SHIFT
#define WM8903_LINEOUTL_RMV_SHORT_WIDTH
#define WM8903_LINEOUTL_ENA_OUTP
#define WM8903_LINEOUTL_ENA_OUTP_MASK
#define WM8903_LINEOUTL_ENA_OUTP_SHIFT
#define WM8903_LINEOUTL_ENA_OUTP_WIDTH
#define WM8903_LINEOUTL_ENA_DLY
#define WM8903_LINEOUTL_ENA_DLY_MASK
#define WM8903_LINEOUTL_ENA_DLY_SHIFT
#define WM8903_LINEOUTL_ENA_DLY_WIDTH
#define WM8903_LINEOUTL_ENA
#define WM8903_LINEOUTL_ENA_MASK
#define WM8903_LINEOUTL_ENA_SHIFT
#define WM8903_LINEOUTL_ENA_WIDTH
#define WM8903_LINEOUTR_RMV_SHORT
#define WM8903_LINEOUTR_RMV_SHORT_MASK
#define WM8903_LINEOUTR_RMV_SHORT_SHIFT
#define WM8903_LINEOUTR_RMV_SHORT_WIDTH
#define WM8903_LINEOUTR_ENA_OUTP
#define WM8903_LINEOUTR_ENA_OUTP_MASK
#define WM8903_LINEOUTR_ENA_OUTP_SHIFT
#define WM8903_LINEOUTR_ENA_OUTP_WIDTH
#define WM8903_LINEOUTR_ENA_DLY
#define WM8903_LINEOUTR_ENA_DLY_MASK
#define WM8903_LINEOUTR_ENA_DLY_SHIFT
#define WM8903_LINEOUTR_ENA_DLY_WIDTH
#define WM8903_LINEOUTR_ENA
#define WM8903_LINEOUTR_ENA_MASK
#define WM8903_LINEOUTR_ENA_SHIFT
#define WM8903_LINEOUTR_ENA_WIDTH

/*
 * R98 (0x62) - Charge Pump 0
 */
#define WM8903_CP_ENA
#define WM8903_CP_ENA_MASK
#define WM8903_CP_ENA_SHIFT
#define WM8903_CP_ENA_WIDTH

/*
 * R104 (0x68) - Class W 0
 */
#define WM8903_CP_DYN_FREQ
#define WM8903_CP_DYN_FREQ_MASK
#define WM8903_CP_DYN_FREQ_SHIFT
#define WM8903_CP_DYN_FREQ_WIDTH
#define WM8903_CP_DYN_V
#define WM8903_CP_DYN_V_MASK
#define WM8903_CP_DYN_V_SHIFT
#define WM8903_CP_DYN_V_WIDTH

/*
 * R108 (0x6C) - Write Sequencer 0
 */
#define WM8903_WSEQ_ENA
#define WM8903_WSEQ_ENA_MASK
#define WM8903_WSEQ_ENA_SHIFT
#define WM8903_WSEQ_ENA_WIDTH
#define WM8903_WSEQ_WRITE_INDEX_MASK
#define WM8903_WSEQ_WRITE_INDEX_SHIFT
#define WM8903_WSEQ_WRITE_INDEX_WIDTH

/*
 * R109 (0x6D) - Write Sequencer 1
 */
#define WM8903_WSEQ_DATA_WIDTH_MASK
#define WM8903_WSEQ_DATA_WIDTH_SHIFT
#define WM8903_WSEQ_DATA_WIDTH_WIDTH
#define WM8903_WSEQ_DATA_START_MASK
#define WM8903_WSEQ_DATA_START_SHIFT
#define WM8903_WSEQ_DATA_START_WIDTH
#define WM8903_WSEQ_ADDR_MASK
#define WM8903_WSEQ_ADDR_SHIFT
#define WM8903_WSEQ_ADDR_WIDTH

/*
 * R110 (0x6E) - Write Sequencer 2
 */
#define WM8903_WSEQ_EOS
#define WM8903_WSEQ_EOS_MASK
#define WM8903_WSEQ_EOS_SHIFT
#define WM8903_WSEQ_EOS_WIDTH
#define WM8903_WSEQ_DELAY_MASK
#define WM8903_WSEQ_DELAY_SHIFT
#define WM8903_WSEQ_DELAY_WIDTH
#define WM8903_WSEQ_DATA_MASK
#define WM8903_WSEQ_DATA_SHIFT
#define WM8903_WSEQ_DATA_WIDTH

/*
 * R111 (0x6F) - Write Sequencer 3
 */
#define WM8903_WSEQ_ABORT
#define WM8903_WSEQ_ABORT_MASK
#define WM8903_WSEQ_ABORT_SHIFT
#define WM8903_WSEQ_ABORT_WIDTH
#define WM8903_WSEQ_START
#define WM8903_WSEQ_START_MASK
#define WM8903_WSEQ_START_SHIFT
#define WM8903_WSEQ_START_WIDTH
#define WM8903_WSEQ_START_INDEX_MASK
#define WM8903_WSEQ_START_INDEX_SHIFT
#define WM8903_WSEQ_START_INDEX_WIDTH

/*
 * R112 (0x70) - Write Sequencer 4
 */
#define WM8903_WSEQ_CURRENT_INDEX_MASK
#define WM8903_WSEQ_CURRENT_INDEX_SHIFT
#define WM8903_WSEQ_CURRENT_INDEX_WIDTH
#define WM8903_WSEQ_BUSY
#define WM8903_WSEQ_BUSY_MASK
#define WM8903_WSEQ_BUSY_SHIFT
#define WM8903_WSEQ_BUSY_WIDTH

/*
 * R114 (0x72) - Control Interface
 */
#define WM8903_MASK_WRITE_ENA
#define WM8903_MASK_WRITE_ENA_MASK
#define WM8903_MASK_WRITE_ENA_SHIFT
#define WM8903_MASK_WRITE_ENA_WIDTH

/*
 * R121 (0x79) - Interrupt Status 1
 */
#define WM8903_MICSHRT_EINT
#define WM8903_MICSHRT_EINT_MASK
#define WM8903_MICSHRT_EINT_SHIFT
#define WM8903_MICSHRT_EINT_WIDTH
#define WM8903_MICDET_EINT
#define WM8903_MICDET_EINT_MASK
#define WM8903_MICDET_EINT_SHIFT
#define WM8903_MICDET_EINT_WIDTH
#define WM8903_WSEQ_BUSY_EINT
#define WM8903_WSEQ_BUSY_EINT_MASK
#define WM8903_WSEQ_BUSY_EINT_SHIFT
#define WM8903_WSEQ_BUSY_EINT_WIDTH
#define WM8903_GP5_EINT
#define WM8903_GP5_EINT_MASK
#define WM8903_GP5_EINT_SHIFT
#define WM8903_GP5_EINT_WIDTH
#define WM8903_GP4_EINT
#define WM8903_GP4_EINT_MASK
#define WM8903_GP4_EINT_SHIFT
#define WM8903_GP4_EINT_WIDTH
#define WM8903_GP3_EINT
#define WM8903_GP3_EINT_MASK
#define WM8903_GP3_EINT_SHIFT
#define WM8903_GP3_EINT_WIDTH
#define WM8903_GP2_EINT
#define WM8903_GP2_EINT_MASK
#define WM8903_GP2_EINT_SHIFT
#define WM8903_GP2_EINT_WIDTH
#define WM8903_GP1_EINT
#define WM8903_GP1_EINT_MASK
#define WM8903_GP1_EINT_SHIFT
#define WM8903_GP1_EINT_WIDTH

/*
 * R122 (0x7A) - Interrupt Status 1 Mask
 */
#define WM8903_IM_MICSHRT_EINT
#define WM8903_IM_MICSHRT_EINT_MASK
#define WM8903_IM_MICSHRT_EINT_SHIFT
#define WM8903_IM_MICSHRT_EINT_WIDTH
#define WM8903_IM_MICDET_EINT
#define WM8903_IM_MICDET_EINT_MASK
#define WM8903_IM_MICDET_EINT_SHIFT
#define WM8903_IM_MICDET_EINT_WIDTH
#define WM8903_IM_WSEQ_BUSY_EINT
#define WM8903_IM_WSEQ_BUSY_EINT_MASK
#define WM8903_IM_WSEQ_BUSY_EINT_SHIFT
#define WM8903_IM_WSEQ_BUSY_EINT_WIDTH
#define WM8903_IM_GP5_EINT
#define WM8903_IM_GP5_EINT_MASK
#define WM8903_IM_GP5_EINT_SHIFT
#define WM8903_IM_GP5_EINT_WIDTH
#define WM8903_IM_GP4_EINT
#define WM8903_IM_GP4_EINT_MASK
#define WM8903_IM_GP4_EINT_SHIFT
#define WM8903_IM_GP4_EINT_WIDTH
#define WM8903_IM_GP3_EINT
#define WM8903_IM_GP3_EINT_MASK
#define WM8903_IM_GP3_EINT_SHIFT
#define WM8903_IM_GP3_EINT_WIDTH
#define WM8903_IM_GP2_EINT
#define WM8903_IM_GP2_EINT_MASK
#define WM8903_IM_GP2_EINT_SHIFT
#define WM8903_IM_GP2_EINT_WIDTH
#define WM8903_IM_GP1_EINT
#define WM8903_IM_GP1_EINT_MASK
#define WM8903_IM_GP1_EINT_SHIFT
#define WM8903_IM_GP1_EINT_WIDTH

/*
 * R123 (0x7B) - Interrupt Polarity 1
 */
#define WM8903_MICSHRT_INV
#define WM8903_MICSHRT_INV_MASK
#define WM8903_MICSHRT_INV_SHIFT
#define WM8903_MICSHRT_INV_WIDTH
#define WM8903_MICDET_INV
#define WM8903_MICDET_INV_MASK
#define WM8903_MICDET_INV_SHIFT
#define WM8903_MICDET_INV_WIDTH

/*
 * R126 (0x7E) - Interrupt Control
 */
#define WM8903_IRQ_POL
#define WM8903_IRQ_POL_MASK
#define WM8903_IRQ_POL_SHIFT
#define WM8903_IRQ_POL_WIDTH

/*
 * R164 (0xA4) - Clock Rate Test 4
 */
#define WM8903_ADC_DIG_MIC
#define WM8903_ADC_DIG_MIC_MASK
#define WM8903_ADC_DIG_MIC_SHIFT
#define WM8903_ADC_DIG_MIC_WIDTH

/*
 * R172 (0xAC) - Analogue Output Bias 0
 */
#define WM8903_PGA_BIAS_MASK
#define WM8903_PGA_BIAS_SHIFT
#define WM8903_PGA_BIAS_WIDTH

#endif