linux/include/dt-bindings/clock/qcom,sm8450-videocc.h

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8450_H
#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8450_H

/* VIDEO_CC clocks */
#define VIDEO_CC_MVS0_CLK …
#define VIDEO_CC_MVS0_CLK_SRC …
#define VIDEO_CC_MVS0_DIV_CLK_SRC …
#define VIDEO_CC_MVS0C_CLK …
#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC …
#define VIDEO_CC_MVS1_CLK …
#define VIDEO_CC_MVS1_CLK_SRC …
#define VIDEO_CC_MVS1_DIV_CLK_SRC …
#define VIDEO_CC_MVS1C_CLK …
#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC …
#define VIDEO_CC_PLL0 …
#define VIDEO_CC_PLL1 …

/* VIDEO_CC power domains */
#define VIDEO_CC_MVS0C_GDSC …
#define VIDEO_CC_MVS0_GDSC …
#define VIDEO_CC_MVS1C_GDSC …
#define VIDEO_CC_MVS1_GDSC …

/* VIDEO_CC resets */
#define CVP_VIDEO_CC_INTERFACE_BCR …
#define CVP_VIDEO_CC_MVS0_BCR …
#define CVP_VIDEO_CC_MVS0C_BCR …
#define CVP_VIDEO_CC_MVS1_BCR …
#define CVP_VIDEO_CC_MVS1C_BCR …
#define VIDEO_CC_MVS0C_CLK_ARES …
#define VIDEO_CC_MVS1C_CLK_ARES …

#endif