/* SPDX-License-Identifier: GPL-2.0-only */ /* * wm8961.h -- WM8961 Soc Audio driver */ #ifndef _WM8961_H #define _WM8961_H #include <sound/soc.h> #define WM8961_BCLK … #define WM8961_LRCLK … #define WM8961_BCLK_DIV_1 … #define WM8961_BCLK_DIV_1_5 … #define WM8961_BCLK_DIV_2 … #define WM8961_BCLK_DIV_3 … #define WM8961_BCLK_DIV_4 … #define WM8961_BCLK_DIV_5_5 … #define WM8961_BCLK_DIV_6 … #define WM8961_BCLK_DIV_8 … #define WM8961_BCLK_DIV_11 … #define WM8961_BCLK_DIV_12 … #define WM8961_BCLK_DIV_16 … #define WM8961_BCLK_DIV_24 … #define WM8961_BCLK_DIV_32 … /* * Register values. */ #define WM8961_LEFT_INPUT_VOLUME … #define WM8961_RIGHT_INPUT_VOLUME … #define WM8961_LOUT1_VOLUME … #define WM8961_ROUT1_VOLUME … #define WM8961_CLOCKING1 … #define WM8961_ADC_DAC_CONTROL_1 … #define WM8961_ADC_DAC_CONTROL_2 … #define WM8961_AUDIO_INTERFACE_0 … #define WM8961_CLOCKING2 … #define WM8961_AUDIO_INTERFACE_1 … #define WM8961_LEFT_DAC_VOLUME … #define WM8961_RIGHT_DAC_VOLUME … #define WM8961_AUDIO_INTERFACE_2 … #define WM8961_SOFTWARE_RESET … #define WM8961_ALC1 … #define WM8961_ALC2 … #define WM8961_ALC3 … #define WM8961_NOISE_GATE … #define WM8961_LEFT_ADC_VOLUME … #define WM8961_RIGHT_ADC_VOLUME … #define WM8961_ADDITIONAL_CONTROL_1 … #define WM8961_ADDITIONAL_CONTROL_2 … #define WM8961_PWR_MGMT_1 … #define WM8961_PWR_MGMT_2 … #define WM8961_ADDITIONAL_CONTROL_3 … #define WM8961_ANTI_POP … #define WM8961_CLOCKING_3 … #define WM8961_ADCL_SIGNAL_PATH … #define WM8961_ADCR_SIGNAL_PATH … #define WM8961_LOUT2_VOLUME … #define WM8961_ROUT2_VOLUME … #define WM8961_PWR_MGMT_3 … #define WM8961_ADDITIONAL_CONTROL_4 … #define WM8961_CLASS_D_CONTROL_1 … #define WM8961_CLASS_D_CONTROL_2 … #define WM8961_CLOCKING_4 … #define WM8961_DSP_SIDETONE_0 … #define WM8961_DSP_SIDETONE_1 … #define WM8961_DC_SERVO_0 … #define WM8961_DC_SERVO_1 … #define WM8961_DC_SERVO_3 … #define WM8961_DC_SERVO_5 … #define WM8961_ANALOGUE_PGA_BIAS … #define WM8961_ANALOGUE_HP_0 … #define WM8961_ANALOGUE_HP_2 … #define WM8961_CHARGE_PUMP_1 … #define WM8961_CHARGE_PUMP_B … #define WM8961_WRITE_SEQUENCER_1 … #define WM8961_WRITE_SEQUENCER_2 … #define WM8961_WRITE_SEQUENCER_3 … #define WM8961_WRITE_SEQUENCER_4 … #define WM8961_WRITE_SEQUENCER_5 … #define WM8961_WRITE_SEQUENCER_6 … #define WM8961_WRITE_SEQUENCER_7 … #define WM8961_GENERAL_TEST_1 … /* * Field Definitions. */ /* * R0 (0x00) - Left Input volume */ #define WM8961_IPVU … #define WM8961_IPVU_MASK … #define WM8961_IPVU_SHIFT … #define WM8961_IPVU_WIDTH … #define WM8961_LINMUTE … #define WM8961_LINMUTE_MASK … #define WM8961_LINMUTE_SHIFT … #define WM8961_LINMUTE_WIDTH … #define WM8961_LIZC … #define WM8961_LIZC_MASK … #define WM8961_LIZC_SHIFT … #define WM8961_LIZC_WIDTH … #define WM8961_LINVOL_MASK … #define WM8961_LINVOL_SHIFT … #define WM8961_LINVOL_WIDTH … /* * R1 (0x01) - Right Input volume */ #define WM8961_DEVICE_ID_MASK … #define WM8961_DEVICE_ID_SHIFT … #define WM8961_DEVICE_ID_WIDTH … #define WM8961_CHIP_REV_MASK … #define WM8961_CHIP_REV_SHIFT … #define WM8961_CHIP_REV_WIDTH … #define WM8961_IPVU … #define WM8961_IPVU_MASK … #define WM8961_IPVU_SHIFT … #define WM8961_IPVU_WIDTH … #define WM8961_RINMUTE … #define WM8961_RINMUTE_MASK … #define WM8961_RINMUTE_SHIFT … #define WM8961_RINMUTE_WIDTH … #define WM8961_RIZC … #define WM8961_RIZC_MASK … #define WM8961_RIZC_SHIFT … #define WM8961_RIZC_WIDTH … #define WM8961_RINVOL_MASK … #define WM8961_RINVOL_SHIFT … #define WM8961_RINVOL_WIDTH … /* * R2 (0x02) - LOUT1 volume */ #define WM8961_OUT1VU … #define WM8961_OUT1VU_MASK … #define WM8961_OUT1VU_SHIFT … #define WM8961_OUT1VU_WIDTH … #define WM8961_LO1ZC … #define WM8961_LO1ZC_MASK … #define WM8961_LO1ZC_SHIFT … #define WM8961_LO1ZC_WIDTH … #define WM8961_LOUT1VOL_MASK … #define WM8961_LOUT1VOL_SHIFT … #define WM8961_LOUT1VOL_WIDTH … /* * R3 (0x03) - ROUT1 volume */ #define WM8961_OUT1VU … #define WM8961_OUT1VU_MASK … #define WM8961_OUT1VU_SHIFT … #define WM8961_OUT1VU_WIDTH … #define WM8961_RO1ZC … #define WM8961_RO1ZC_MASK … #define WM8961_RO1ZC_SHIFT … #define WM8961_RO1ZC_WIDTH … #define WM8961_ROUT1VOL_MASK … #define WM8961_ROUT1VOL_SHIFT … #define WM8961_ROUT1VOL_WIDTH … /* * R4 (0x04) - Clocking1 */ #define WM8961_ADCDIV_MASK … #define WM8961_ADCDIV_SHIFT … #define WM8961_ADCDIV_WIDTH … #define WM8961_DACDIV_MASK … #define WM8961_DACDIV_SHIFT … #define WM8961_DACDIV_WIDTH … #define WM8961_MCLKDIV … #define WM8961_MCLKDIV_MASK … #define WM8961_MCLKDIV_SHIFT … #define WM8961_MCLKDIV_WIDTH … /* * R5 (0x05) - ADC & DAC Control 1 */ #define WM8961_ADCPOL_MASK … #define WM8961_ADCPOL_SHIFT … #define WM8961_ADCPOL_WIDTH … #define WM8961_DACMU … #define WM8961_DACMU_MASK … #define WM8961_DACMU_SHIFT … #define WM8961_DACMU_WIDTH … #define WM8961_DEEMPH_MASK … #define WM8961_DEEMPH_SHIFT … #define WM8961_DEEMPH_WIDTH … #define WM8961_ADCHPD … #define WM8961_ADCHPD_MASK … #define WM8961_ADCHPD_SHIFT … #define WM8961_ADCHPD_WIDTH … /* * R6 (0x06) - ADC & DAC Control 2 */ #define WM8961_ADC_HPF_CUT_MASK … #define WM8961_ADC_HPF_CUT_SHIFT … #define WM8961_ADC_HPF_CUT_WIDTH … #define WM8961_DACPOL_MASK … #define WM8961_DACPOL_SHIFT … #define WM8961_DACPOL_WIDTH … #define WM8961_DACSMM … #define WM8961_DACSMM_MASK … #define WM8961_DACSMM_SHIFT … #define WM8961_DACSMM_WIDTH … #define WM8961_DACMR … #define WM8961_DACMR_MASK … #define WM8961_DACMR_SHIFT … #define WM8961_DACMR_WIDTH … #define WM8961_DACSLOPE … #define WM8961_DACSLOPE_MASK … #define WM8961_DACSLOPE_SHIFT … #define WM8961_DACSLOPE_WIDTH … #define WM8961_DAC_OSR128 … #define WM8961_DAC_OSR128_MASK … #define WM8961_DAC_OSR128_SHIFT … #define WM8961_DAC_OSR128_WIDTH … /* * R7 (0x07) - Audio Interface 0 */ #define WM8961_ALRSWAP … #define WM8961_ALRSWAP_MASK … #define WM8961_ALRSWAP_SHIFT … #define WM8961_ALRSWAP_WIDTH … #define WM8961_BCLKINV … #define WM8961_BCLKINV_MASK … #define WM8961_BCLKINV_SHIFT … #define WM8961_BCLKINV_WIDTH … #define WM8961_MS … #define WM8961_MS_MASK … #define WM8961_MS_SHIFT … #define WM8961_MS_WIDTH … #define WM8961_DLRSWAP … #define WM8961_DLRSWAP_MASK … #define WM8961_DLRSWAP_SHIFT … #define WM8961_DLRSWAP_WIDTH … #define WM8961_LRP … #define WM8961_LRP_MASK … #define WM8961_LRP_SHIFT … #define WM8961_LRP_WIDTH … #define WM8961_WL_MASK … #define WM8961_WL_SHIFT … #define WM8961_WL_WIDTH … #define WM8961_FORMAT_MASK … #define WM8961_FORMAT_SHIFT … #define WM8961_FORMAT_WIDTH … /* * R8 (0x08) - Clocking2 */ #define WM8961_DCLKDIV_MASK … #define WM8961_DCLKDIV_SHIFT … #define WM8961_DCLKDIV_WIDTH … #define WM8961_CLK_SYS_ENA … #define WM8961_CLK_SYS_ENA_MASK … #define WM8961_CLK_SYS_ENA_SHIFT … #define WM8961_CLK_SYS_ENA_WIDTH … #define WM8961_CLK_DSP_ENA … #define WM8961_CLK_DSP_ENA_MASK … #define WM8961_CLK_DSP_ENA_SHIFT … #define WM8961_CLK_DSP_ENA_WIDTH … #define WM8961_BCLKDIV_MASK … #define WM8961_BCLKDIV_SHIFT … #define WM8961_BCLKDIV_WIDTH … /* * R9 (0x09) - Audio Interface 1 */ #define WM8961_DACCOMP_MASK … #define WM8961_DACCOMP_SHIFT … #define WM8961_DACCOMP_WIDTH … #define WM8961_ADCCOMP_MASK … #define WM8961_ADCCOMP_SHIFT … #define WM8961_ADCCOMP_WIDTH … #define WM8961_LOOPBACK … #define WM8961_LOOPBACK_MASK … #define WM8961_LOOPBACK_SHIFT … #define WM8961_LOOPBACK_WIDTH … /* * R10 (0x0A) - Left DAC volume */ #define WM8961_DACVU … #define WM8961_DACVU_MASK … #define WM8961_DACVU_SHIFT … #define WM8961_DACVU_WIDTH … #define WM8961_LDACVOL_MASK … #define WM8961_LDACVOL_SHIFT … #define WM8961_LDACVOL_WIDTH … /* * R11 (0x0B) - Right DAC volume */ #define WM8961_DACVU … #define WM8961_DACVU_MASK … #define WM8961_DACVU_SHIFT … #define WM8961_DACVU_WIDTH … #define WM8961_RDACVOL_MASK … #define WM8961_RDACVOL_SHIFT … #define WM8961_RDACVOL_WIDTH … /* * R14 (0x0E) - Audio Interface 2 */ #define WM8961_LRCLK_RATE_MASK … #define WM8961_LRCLK_RATE_SHIFT … #define WM8961_LRCLK_RATE_WIDTH … /* * R15 (0x0F) - Software Reset */ #define WM8961_SW_RST_DEV_ID1_MASK … #define WM8961_SW_RST_DEV_ID1_SHIFT … #define WM8961_SW_RST_DEV_ID1_WIDTH … /* * R17 (0x11) - ALC1 */ #define WM8961_ALCSEL_MASK … #define WM8961_ALCSEL_SHIFT … #define WM8961_ALCSEL_WIDTH … #define WM8961_MAXGAIN_MASK … #define WM8961_MAXGAIN_SHIFT … #define WM8961_MAXGAIN_WIDTH … #define WM8961_ALCL_MASK … #define WM8961_ALCL_SHIFT … #define WM8961_ALCL_WIDTH … /* * R18 (0x12) - ALC2 */ #define WM8961_ALCZC … #define WM8961_ALCZC_MASK … #define WM8961_ALCZC_SHIFT … #define WM8961_ALCZC_WIDTH … #define WM8961_MINGAIN_MASK … #define WM8961_MINGAIN_SHIFT … #define WM8961_MINGAIN_WIDTH … #define WM8961_HLD_MASK … #define WM8961_HLD_SHIFT … #define WM8961_HLD_WIDTH … /* * R19 (0x13) - ALC3 */ #define WM8961_ALCMODE … #define WM8961_ALCMODE_MASK … #define WM8961_ALCMODE_SHIFT … #define WM8961_ALCMODE_WIDTH … #define WM8961_DCY_MASK … #define WM8961_DCY_SHIFT … #define WM8961_DCY_WIDTH … #define WM8961_ATK_MASK … #define WM8961_ATK_SHIFT … #define WM8961_ATK_WIDTH … /* * R20 (0x14) - Noise Gate */ #define WM8961_NGTH_MASK … #define WM8961_NGTH_SHIFT … #define WM8961_NGTH_WIDTH … #define WM8961_NGG … #define WM8961_NGG_MASK … #define WM8961_NGG_SHIFT … #define WM8961_NGG_WIDTH … #define WM8961_NGAT … #define WM8961_NGAT_MASK … #define WM8961_NGAT_SHIFT … #define WM8961_NGAT_WIDTH … /* * R21 (0x15) - Left ADC volume */ #define WM8961_ADCVU … #define WM8961_ADCVU_MASK … #define WM8961_ADCVU_SHIFT … #define WM8961_ADCVU_WIDTH … #define WM8961_LADCVOL_MASK … #define WM8961_LADCVOL_SHIFT … #define WM8961_LADCVOL_WIDTH … /* * R22 (0x16) - Right ADC volume */ #define WM8961_ADCVU … #define WM8961_ADCVU_MASK … #define WM8961_ADCVU_SHIFT … #define WM8961_ADCVU_WIDTH … #define WM8961_RADCVOL_MASK … #define WM8961_RADCVOL_SHIFT … #define WM8961_RADCVOL_WIDTH … /* * R23 (0x17) - Additional control(1) */ #define WM8961_TSDEN … #define WM8961_TSDEN_MASK … #define WM8961_TSDEN_SHIFT … #define WM8961_TSDEN_WIDTH … #define WM8961_DMONOMIX … #define WM8961_DMONOMIX_MASK … #define WM8961_DMONOMIX_SHIFT … #define WM8961_DMONOMIX_WIDTH … #define WM8961_TOEN … #define WM8961_TOEN_MASK … #define WM8961_TOEN_SHIFT … #define WM8961_TOEN_WIDTH … /* * R24 (0x18) - Additional control(2) */ #define WM8961_TRIS … #define WM8961_TRIS_MASK … #define WM8961_TRIS_SHIFT … #define WM8961_TRIS_WIDTH … /* * R25 (0x19) - Pwr Mgmt (1) */ #define WM8961_VMIDSEL_MASK … #define WM8961_VMIDSEL_SHIFT … #define WM8961_VMIDSEL_WIDTH … #define WM8961_VREF … #define WM8961_VREF_MASK … #define WM8961_VREF_SHIFT … #define WM8961_VREF_WIDTH … #define WM8961_AINL … #define WM8961_AINL_MASK … #define WM8961_AINL_SHIFT … #define WM8961_AINL_WIDTH … #define WM8961_AINR … #define WM8961_AINR_MASK … #define WM8961_AINR_SHIFT … #define WM8961_AINR_WIDTH … #define WM8961_ADCL … #define WM8961_ADCL_MASK … #define WM8961_ADCL_SHIFT … #define WM8961_ADCL_WIDTH … #define WM8961_ADCR … #define WM8961_ADCR_MASK … #define WM8961_ADCR_SHIFT … #define WM8961_ADCR_WIDTH … #define WM8961_MICB … #define WM8961_MICB_MASK … #define WM8961_MICB_SHIFT … #define WM8961_MICB_WIDTH … /* * R26 (0x1A) - Pwr Mgmt (2) */ #define WM8961_DACL … #define WM8961_DACL_MASK … #define WM8961_DACL_SHIFT … #define WM8961_DACL_WIDTH … #define WM8961_DACR … #define WM8961_DACR_MASK … #define WM8961_DACR_SHIFT … #define WM8961_DACR_WIDTH … #define WM8961_LOUT1_PGA … #define WM8961_LOUT1_PGA_MASK … #define WM8961_LOUT1_PGA_SHIFT … #define WM8961_LOUT1_PGA_WIDTH … #define WM8961_ROUT1_PGA … #define WM8961_ROUT1_PGA_MASK … #define WM8961_ROUT1_PGA_SHIFT … #define WM8961_ROUT1_PGA_WIDTH … #define WM8961_SPKL_PGA … #define WM8961_SPKL_PGA_MASK … #define WM8961_SPKL_PGA_SHIFT … #define WM8961_SPKL_PGA_WIDTH … #define WM8961_SPKR_PGA … #define WM8961_SPKR_PGA_MASK … #define WM8961_SPKR_PGA_SHIFT … #define WM8961_SPKR_PGA_WIDTH … /* * R27 (0x1B) - Additional Control (3) */ #define WM8961_SAMPLE_RATE_MASK … #define WM8961_SAMPLE_RATE_SHIFT … #define WM8961_SAMPLE_RATE_WIDTH … /* * R28 (0x1C) - Anti-pop */ #define WM8961_BUFDCOPEN … #define WM8961_BUFDCOPEN_MASK … #define WM8961_BUFDCOPEN_SHIFT … #define WM8961_BUFDCOPEN_WIDTH … #define WM8961_BUFIOEN … #define WM8961_BUFIOEN_MASK … #define WM8961_BUFIOEN_SHIFT … #define WM8961_BUFIOEN_WIDTH … #define WM8961_SOFT_ST … #define WM8961_SOFT_ST_MASK … #define WM8961_SOFT_ST_SHIFT … #define WM8961_SOFT_ST_WIDTH … /* * R30 (0x1E) - Clocking 3 */ #define WM8961_CLK_TO_DIV_MASK … #define WM8961_CLK_TO_DIV_SHIFT … #define WM8961_CLK_TO_DIV_WIDTH … #define WM8961_CLK_256K_DIV_MASK … #define WM8961_CLK_256K_DIV_SHIFT … #define WM8961_CLK_256K_DIV_WIDTH … #define WM8961_MANUAL_MODE … #define WM8961_MANUAL_MODE_MASK … #define WM8961_MANUAL_MODE_SHIFT … #define WM8961_MANUAL_MODE_WIDTH … /* * R32 (0x20) - ADCL signal path */ #define WM8961_LMICBOOST_MASK … #define WM8961_LMICBOOST_SHIFT … #define WM8961_LMICBOOST_WIDTH … /* * R33 (0x21) - ADCR signal path */ #define WM8961_RMICBOOST_MASK … #define WM8961_RMICBOOST_SHIFT … #define WM8961_RMICBOOST_WIDTH … /* * R40 (0x28) - LOUT2 volume */ #define WM8961_SPKVU … #define WM8961_SPKVU_MASK … #define WM8961_SPKVU_SHIFT … #define WM8961_SPKVU_WIDTH … #define WM8961_SPKLZC … #define WM8961_SPKLZC_MASK … #define WM8961_SPKLZC_SHIFT … #define WM8961_SPKLZC_WIDTH … #define WM8961_SPKLVOL_MASK … #define WM8961_SPKLVOL_SHIFT … #define WM8961_SPKLVOL_WIDTH … /* * R41 (0x29) - ROUT2 volume */ #define WM8961_SPKVU … #define WM8961_SPKVU_MASK … #define WM8961_SPKVU_SHIFT … #define WM8961_SPKVU_WIDTH … #define WM8961_SPKRZC … #define WM8961_SPKRZC_MASK … #define WM8961_SPKRZC_SHIFT … #define WM8961_SPKRZC_WIDTH … #define WM8961_SPKRVOL_MASK … #define WM8961_SPKRVOL_SHIFT … #define WM8961_SPKRVOL_WIDTH … /* * R47 (0x2F) - Pwr Mgmt (3) */ #define WM8961_TEMP_SHUT … #define WM8961_TEMP_SHUT_MASK … #define WM8961_TEMP_SHUT_SHIFT … #define WM8961_TEMP_SHUT_WIDTH … #define WM8961_TEMP_WARN … #define WM8961_TEMP_WARN_MASK … #define WM8961_TEMP_WARN_SHIFT … #define WM8961_TEMP_WARN_WIDTH … /* * R48 (0x30) - Additional Control (4) */ #define WM8961_TSENSEN … #define WM8961_TSENSEN_MASK … #define WM8961_TSENSEN_SHIFT … #define WM8961_TSENSEN_WIDTH … #define WM8961_MBSEL … #define WM8961_MBSEL_MASK … #define WM8961_MBSEL_SHIFT … #define WM8961_MBSEL_WIDTH … /* * R49 (0x31) - Class D Control 1 */ #define WM8961_SPKR_ENA … #define WM8961_SPKR_ENA_MASK … #define WM8961_SPKR_ENA_SHIFT … #define WM8961_SPKR_ENA_WIDTH … #define WM8961_SPKL_ENA … #define WM8961_SPKL_ENA_MASK … #define WM8961_SPKL_ENA_SHIFT … #define WM8961_SPKL_ENA_WIDTH … /* * R51 (0x33) - Class D Control 2 */ #define WM8961_CLASSD_ACGAIN_MASK … #define WM8961_CLASSD_ACGAIN_SHIFT … #define WM8961_CLASSD_ACGAIN_WIDTH … /* * R56 (0x38) - Clocking 4 */ #define WM8961_CLK_DCS_DIV_MASK … #define WM8961_CLK_DCS_DIV_SHIFT … #define WM8961_CLK_DCS_DIV_WIDTH … #define WM8961_CLK_SYS_RATE_MASK … #define WM8961_CLK_SYS_RATE_SHIFT … #define WM8961_CLK_SYS_RATE_WIDTH … /* * R57 (0x39) - DSP Sidetone 0 */ #define WM8961_ADCR_DAC_SVOL_MASK … #define WM8961_ADCR_DAC_SVOL_SHIFT … #define WM8961_ADCR_DAC_SVOL_WIDTH … #define WM8961_ADC_TO_DACR_MASK … #define WM8961_ADC_TO_DACR_SHIFT … #define WM8961_ADC_TO_DACR_WIDTH … /* * R58 (0x3A) - DSP Sidetone 1 */ #define WM8961_ADCL_DAC_SVOL_MASK … #define WM8961_ADCL_DAC_SVOL_SHIFT … #define WM8961_ADCL_DAC_SVOL_WIDTH … #define WM8961_ADC_TO_DACL_MASK … #define WM8961_ADC_TO_DACL_SHIFT … #define WM8961_ADC_TO_DACL_WIDTH … /* * R60 (0x3C) - DC Servo 0 */ #define WM8961_DCS_ENA_CHAN_INL … #define WM8961_DCS_ENA_CHAN_INL_MASK … #define WM8961_DCS_ENA_CHAN_INL_SHIFT … #define WM8961_DCS_ENA_CHAN_INL_WIDTH … #define WM8961_DCS_TRIG_STARTUP_INL … #define WM8961_DCS_TRIG_STARTUP_INL_MASK … #define WM8961_DCS_TRIG_STARTUP_INL_SHIFT … #define WM8961_DCS_TRIG_STARTUP_INL_WIDTH … #define WM8961_DCS_TRIG_SERIES_INL … #define WM8961_DCS_TRIG_SERIES_INL_MASK … #define WM8961_DCS_TRIG_SERIES_INL_SHIFT … #define WM8961_DCS_TRIG_SERIES_INL_WIDTH … #define WM8961_DCS_ENA_CHAN_INR … #define WM8961_DCS_ENA_CHAN_INR_MASK … #define WM8961_DCS_ENA_CHAN_INR_SHIFT … #define WM8961_DCS_ENA_CHAN_INR_WIDTH … #define WM8961_DCS_TRIG_STARTUP_INR … #define WM8961_DCS_TRIG_STARTUP_INR_MASK … #define WM8961_DCS_TRIG_STARTUP_INR_SHIFT … #define WM8961_DCS_TRIG_STARTUP_INR_WIDTH … #define WM8961_DCS_TRIG_SERIES_INR … #define WM8961_DCS_TRIG_SERIES_INR_MASK … #define WM8961_DCS_TRIG_SERIES_INR_SHIFT … #define WM8961_DCS_TRIG_SERIES_INR_WIDTH … /* * R61 (0x3D) - DC Servo 1 */ #define WM8961_DCS_ENA_CHAN_HPL … #define WM8961_DCS_ENA_CHAN_HPL_MASK … #define WM8961_DCS_ENA_CHAN_HPL_SHIFT … #define WM8961_DCS_ENA_CHAN_HPL_WIDTH … #define WM8961_DCS_TRIG_STARTUP_HPL … #define WM8961_DCS_TRIG_STARTUP_HPL_MASK … #define WM8961_DCS_TRIG_STARTUP_HPL_SHIFT … #define WM8961_DCS_TRIG_STARTUP_HPL_WIDTH … #define WM8961_DCS_TRIG_SERIES_HPL … #define WM8961_DCS_TRIG_SERIES_HPL_MASK … #define WM8961_DCS_TRIG_SERIES_HPL_SHIFT … #define WM8961_DCS_TRIG_SERIES_HPL_WIDTH … #define WM8961_DCS_ENA_CHAN_HPR … #define WM8961_DCS_ENA_CHAN_HPR_MASK … #define WM8961_DCS_ENA_CHAN_HPR_SHIFT … #define WM8961_DCS_ENA_CHAN_HPR_WIDTH … #define WM8961_DCS_TRIG_STARTUP_HPR … #define WM8961_DCS_TRIG_STARTUP_HPR_MASK … #define WM8961_DCS_TRIG_STARTUP_HPR_SHIFT … #define WM8961_DCS_TRIG_STARTUP_HPR_WIDTH … #define WM8961_DCS_TRIG_SERIES_HPR … #define WM8961_DCS_TRIG_SERIES_HPR_MASK … #define WM8961_DCS_TRIG_SERIES_HPR_SHIFT … #define WM8961_DCS_TRIG_SERIES_HPR_WIDTH … /* * R63 (0x3F) - DC Servo 3 */ #define WM8961_DCS_FILT_BW_SERIES_MASK … #define WM8961_DCS_FILT_BW_SERIES_SHIFT … #define WM8961_DCS_FILT_BW_SERIES_WIDTH … /* * R65 (0x41) - DC Servo 5 */ #define WM8961_DCS_SERIES_NO_HP_MASK … #define WM8961_DCS_SERIES_NO_HP_SHIFT … #define WM8961_DCS_SERIES_NO_HP_WIDTH … /* * R68 (0x44) - Analogue PGA Bias */ #define WM8961_HP_PGAS_BIAS_MASK … #define WM8961_HP_PGAS_BIAS_SHIFT … #define WM8961_HP_PGAS_BIAS_WIDTH … /* * R69 (0x45) - Analogue HP 0 */ #define WM8961_HPL_RMV_SHORT … #define WM8961_HPL_RMV_SHORT_MASK … #define WM8961_HPL_RMV_SHORT_SHIFT … #define WM8961_HPL_RMV_SHORT_WIDTH … #define WM8961_HPL_ENA_OUTP … #define WM8961_HPL_ENA_OUTP_MASK … #define WM8961_HPL_ENA_OUTP_SHIFT … #define WM8961_HPL_ENA_OUTP_WIDTH … #define WM8961_HPL_ENA_DLY … #define WM8961_HPL_ENA_DLY_MASK … #define WM8961_HPL_ENA_DLY_SHIFT … #define WM8961_HPL_ENA_DLY_WIDTH … #define WM8961_HPL_ENA … #define WM8961_HPL_ENA_MASK … #define WM8961_HPL_ENA_SHIFT … #define WM8961_HPL_ENA_WIDTH … #define WM8961_HPR_RMV_SHORT … #define WM8961_HPR_RMV_SHORT_MASK … #define WM8961_HPR_RMV_SHORT_SHIFT … #define WM8961_HPR_RMV_SHORT_WIDTH … #define WM8961_HPR_ENA_OUTP … #define WM8961_HPR_ENA_OUTP_MASK … #define WM8961_HPR_ENA_OUTP_SHIFT … #define WM8961_HPR_ENA_OUTP_WIDTH … #define WM8961_HPR_ENA_DLY … #define WM8961_HPR_ENA_DLY_MASK … #define WM8961_HPR_ENA_DLY_SHIFT … #define WM8961_HPR_ENA_DLY_WIDTH … #define WM8961_HPR_ENA … #define WM8961_HPR_ENA_MASK … #define WM8961_HPR_ENA_SHIFT … #define WM8961_HPR_ENA_WIDTH … /* * R71 (0x47) - Analogue HP 2 */ #define WM8961_HPL_VOL_MASK … #define WM8961_HPL_VOL_SHIFT … #define WM8961_HPL_VOL_WIDTH … #define WM8961_HPR_VOL_MASK … #define WM8961_HPR_VOL_SHIFT … #define WM8961_HPR_VOL_WIDTH … #define WM8961_HP_BIAS_BOOST_MASK … #define WM8961_HP_BIAS_BOOST_SHIFT … #define WM8961_HP_BIAS_BOOST_WIDTH … /* * R72 (0x48) - Charge Pump 1 */ #define WM8961_CP_ENA … #define WM8961_CP_ENA_MASK … #define WM8961_CP_ENA_SHIFT … #define WM8961_CP_ENA_WIDTH … /* * R82 (0x52) - Charge Pump B */ #define WM8961_CP_DYN_PWR_MASK … #define WM8961_CP_DYN_PWR_SHIFT … #define WM8961_CP_DYN_PWR_WIDTH … /* * R87 (0x57) - Write Sequencer 1 */ #define WM8961_WSEQ_ENA … #define WM8961_WSEQ_ENA_MASK … #define WM8961_WSEQ_ENA_SHIFT … #define WM8961_WSEQ_ENA_WIDTH … #define WM8961_WSEQ_WRITE_INDEX_MASK … #define WM8961_WSEQ_WRITE_INDEX_SHIFT … #define WM8961_WSEQ_WRITE_INDEX_WIDTH … /* * R88 (0x58) - Write Sequencer 2 */ #define WM8961_WSEQ_EOS … #define WM8961_WSEQ_EOS_MASK … #define WM8961_WSEQ_EOS_SHIFT … #define WM8961_WSEQ_EOS_WIDTH … #define WM8961_WSEQ_ADDR_MASK … #define WM8961_WSEQ_ADDR_SHIFT … #define WM8961_WSEQ_ADDR_WIDTH … /* * R89 (0x59) - Write Sequencer 3 */ #define WM8961_WSEQ_DATA_MASK … #define WM8961_WSEQ_DATA_SHIFT … #define WM8961_WSEQ_DATA_WIDTH … /* * R90 (0x5A) - Write Sequencer 4 */ #define WM8961_WSEQ_ABORT … #define WM8961_WSEQ_ABORT_MASK … #define WM8961_WSEQ_ABORT_SHIFT … #define WM8961_WSEQ_ABORT_WIDTH … #define WM8961_WSEQ_START … #define WM8961_WSEQ_START_MASK … #define WM8961_WSEQ_START_SHIFT … #define WM8961_WSEQ_START_WIDTH … #define WM8961_WSEQ_START_INDEX_MASK … #define WM8961_WSEQ_START_INDEX_SHIFT … #define WM8961_WSEQ_START_INDEX_WIDTH … /* * R91 (0x5B) - Write Sequencer 5 */ #define WM8961_WSEQ_DATA_WIDTH_MASK … #define WM8961_WSEQ_DATA_WIDTH_SHIFT … #define WM8961_WSEQ_DATA_WIDTH_WIDTH … #define WM8961_WSEQ_DATA_START_MASK … #define WM8961_WSEQ_DATA_START_SHIFT … #define WM8961_WSEQ_DATA_START_WIDTH … /* * R92 (0x5C) - Write Sequencer 6 */ #define WM8961_WSEQ_DELAY_MASK … #define WM8961_WSEQ_DELAY_SHIFT … #define WM8961_WSEQ_DELAY_WIDTH … /* * R93 (0x5D) - Write Sequencer 7 */ #define WM8961_WSEQ_BUSY … #define WM8961_WSEQ_BUSY_MASK … #define WM8961_WSEQ_BUSY_SHIFT … #define WM8961_WSEQ_BUSY_WIDTH … /* * R252 (0xFC) - General test 1 */ #define WM8961_ARA_ENA … #define WM8961_ARA_ENA_MASK … #define WM8961_ARA_ENA_SHIFT … #define WM8961_ARA_ENA_WIDTH … #define WM8961_AUTO_INC … #define WM8961_AUTO_INC_MASK … #define WM8961_AUTO_INC_SHIFT … #define WM8961_AUTO_INC_WIDTH … #endif
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