linux/sound/soc/codecs/wm8962.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * wm8962.h  --  WM8962 ASoC driver
 *
 * Copyright 2010 Wolfson Microelectronics, plc
 *
 * Author: Mark Brown <[email protected]>
 */

#ifndef _WM8962_H
#define _WM8962_H

#include <asm/types.h>
#include <sound/soc.h>

#define WM8962_SYSCLK_MCLK
#define WM8962_SYSCLK_FLL
#define WM8962_SYSCLK_PLL3

#define WM8962_FLL

#define WM8962_FLL_MCLK
#define WM8962_FLL_BCLK
#define WM8962_FLL_OSC
#define WM8962_FLL_INT

/*
 * Register values.
 */
#define WM8962_LEFT_INPUT_VOLUME
#define WM8962_RIGHT_INPUT_VOLUME
#define WM8962_HPOUTL_VOLUME
#define WM8962_HPOUTR_VOLUME
#define WM8962_CLOCKING1
#define WM8962_ADC_DAC_CONTROL_1
#define WM8962_ADC_DAC_CONTROL_2
#define WM8962_AUDIO_INTERFACE_0
#define WM8962_CLOCKING2
#define WM8962_AUDIO_INTERFACE_1
#define WM8962_LEFT_DAC_VOLUME
#define WM8962_RIGHT_DAC_VOLUME
#define WM8962_AUDIO_INTERFACE_2
#define WM8962_SOFTWARE_RESET
#define WM8962_ALC1
#define WM8962_ALC2
#define WM8962_ALC3
#define WM8962_NOISE_GATE
#define WM8962_LEFT_ADC_VOLUME
#define WM8962_RIGHT_ADC_VOLUME
#define WM8962_ADDITIONAL_CONTROL_1
#define WM8962_ADDITIONAL_CONTROL_2
#define WM8962_PWR_MGMT_1
#define WM8962_PWR_MGMT_2
#define WM8962_ADDITIONAL_CONTROL_3
#define WM8962_ANTI_POP
#define WM8962_CLOCKING_3
#define WM8962_INPUT_MIXER_CONTROL_1
#define WM8962_LEFT_INPUT_MIXER_VOLUME
#define WM8962_RIGHT_INPUT_MIXER_VOLUME
#define WM8962_INPUT_MIXER_CONTROL_2
#define WM8962_INPUT_BIAS_CONTROL
#define WM8962_LEFT_INPUT_PGA_CONTROL
#define WM8962_RIGHT_INPUT_PGA_CONTROL
#define WM8962_SPKOUTL_VOLUME
#define WM8962_SPKOUTR_VOLUME
#define WM8962_THERMAL_SHUTDOWN_STATUS
#define WM8962_ADDITIONAL_CONTROL_4
#define WM8962_CLASS_D_CONTROL_1
#define WM8962_CLASS_D_CONTROL_2
#define WM8962_CLOCKING_4
#define WM8962_DAC_DSP_MIXING_1
#define WM8962_DAC_DSP_MIXING_2
#define WM8962_DC_SERVO_0
#define WM8962_DC_SERVO_1
#define WM8962_DC_SERVO_4
#define WM8962_DC_SERVO_6
#define WM8962_ANALOGUE_PGA_BIAS
#define WM8962_ANALOGUE_HP_0
#define WM8962_ANALOGUE_HP_2
#define WM8962_CHARGE_PUMP_1
#define WM8962_CHARGE_PUMP_B
#define WM8962_WRITE_SEQUENCER_CONTROL_1
#define WM8962_WRITE_SEQUENCER_CONTROL_2
#define WM8962_WRITE_SEQUENCER_CONTROL_3
#define WM8962_CONTROL_INTERFACE
#define WM8962_MIXER_ENABLES
#define WM8962_HEADPHONE_MIXER_1
#define WM8962_HEADPHONE_MIXER_2
#define WM8962_HEADPHONE_MIXER_3
#define WM8962_HEADPHONE_MIXER_4
#define WM8962_SPEAKER_MIXER_1
#define WM8962_SPEAKER_MIXER_2
#define WM8962_SPEAKER_MIXER_3
#define WM8962_SPEAKER_MIXER_4
#define WM8962_SPEAKER_MIXER_5
#define WM8962_BEEP_GENERATOR_1
#define WM8962_OSCILLATOR_TRIM_3
#define WM8962_OSCILLATOR_TRIM_4
#define WM8962_OSCILLATOR_TRIM_7
#define WM8962_ANALOGUE_CLOCKING1
#define WM8962_ANALOGUE_CLOCKING2
#define WM8962_ANALOGUE_CLOCKING3
#define WM8962_PLL_SOFTWARE_RESET
#define WM8962_PLL2
#define WM8962_PLL_4
#define WM8962_PLL_9
#define WM8962_PLL_10
#define WM8962_PLL_11
#define WM8962_PLL_12
#define WM8962_PLL_13
#define WM8962_PLL_14
#define WM8962_PLL_15
#define WM8962_PLL_16
#define WM8962_FLL_CONTROL_1
#define WM8962_FLL_CONTROL_2
#define WM8962_FLL_CONTROL_3
#define WM8962_FLL_CONTROL_5
#define WM8962_FLL_CONTROL_6
#define WM8962_FLL_CONTROL_7
#define WM8962_FLL_CONTROL_8
#define WM8962_GENERAL_TEST_1
#define WM8962_DF1
#define WM8962_DF2
#define WM8962_DF3
#define WM8962_DF4
#define WM8962_DF5
#define WM8962_DF6
#define WM8962_DF7
#define WM8962_LHPF1
#define WM8962_LHPF2
#define WM8962_THREED1
#define WM8962_THREED2
#define WM8962_THREED3
#define WM8962_THREED4
#define WM8962_DRC_1
#define WM8962_DRC_2
#define WM8962_DRC_3
#define WM8962_DRC_4
#define WM8962_DRC_5
#define WM8962_TLOOPBACK
#define WM8962_EQ1
#define WM8962_EQ2
#define WM8962_EQ3
#define WM8962_EQ4
#define WM8962_EQ5
#define WM8962_EQ6
#define WM8962_EQ7
#define WM8962_EQ8
#define WM8962_EQ9
#define WM8962_EQ10
#define WM8962_EQ11
#define WM8962_EQ12
#define WM8962_EQ13
#define WM8962_EQ14
#define WM8962_EQ15
#define WM8962_EQ16
#define WM8962_EQ17
#define WM8962_EQ18
#define WM8962_EQ19
#define WM8962_EQ20
#define WM8962_EQ21
#define WM8962_EQ22
#define WM8962_EQ23
#define WM8962_EQ24
#define WM8962_EQ25
#define WM8962_EQ26
#define WM8962_EQ27
#define WM8962_EQ28
#define WM8962_EQ29
#define WM8962_EQ30
#define WM8962_EQ31
#define WM8962_EQ32
#define WM8962_EQ33
#define WM8962_EQ34
#define WM8962_EQ35
#define WM8962_EQ36
#define WM8962_EQ37
#define WM8962_EQ38
#define WM8962_EQ39
#define WM8962_EQ40
#define WM8962_EQ41
#define WM8962_GPIO_BASE
#define WM8962_GPIO_2
#define WM8962_GPIO_3
#define WM8962_GPIO_5
#define WM8962_GPIO_6
#define WM8962_INTERRUPT_STATUS_1
#define WM8962_INTERRUPT_STATUS_2
#define WM8962_INTERRUPT_STATUS_1_MASK
#define WM8962_INTERRUPT_STATUS_2_MASK
#define WM8962_INTERRUPT_CONTROL
#define WM8962_IRQ_DEBOUNCE
#define WM8962_MICINT_SOURCE_POL
#define WM8962_DSP2_POWER_MANAGEMENT
#define WM8962_DSP2_EXECCONTROL
#define WM8962_WRITE_SEQUENCER_0
#define WM8962_WRITE_SEQUENCER_1
#define WM8962_WRITE_SEQUENCER_2
#define WM8962_WRITE_SEQUENCER_3
#define WM8962_WRITE_SEQUENCER_4
#define WM8962_WRITE_SEQUENCER_5
#define WM8962_WRITE_SEQUENCER_6
#define WM8962_WRITE_SEQUENCER_7
#define WM8962_WRITE_SEQUENCER_8
#define WM8962_WRITE_SEQUENCER_9
#define WM8962_WRITE_SEQUENCER_10
#define WM8962_WRITE_SEQUENCER_11
#define WM8962_WRITE_SEQUENCER_12
#define WM8962_WRITE_SEQUENCER_13
#define WM8962_WRITE_SEQUENCER_14
#define WM8962_WRITE_SEQUENCER_15
#define WM8962_WRITE_SEQUENCER_16
#define WM8962_WRITE_SEQUENCER_17
#define WM8962_WRITE_SEQUENCER_18
#define WM8962_WRITE_SEQUENCER_19
#define WM8962_WRITE_SEQUENCER_20
#define WM8962_WRITE_SEQUENCER_21
#define WM8962_WRITE_SEQUENCER_22
#define WM8962_WRITE_SEQUENCER_23
#define WM8962_WRITE_SEQUENCER_24
#define WM8962_WRITE_SEQUENCER_25
#define WM8962_WRITE_SEQUENCER_26
#define WM8962_WRITE_SEQUENCER_27
#define WM8962_WRITE_SEQUENCER_28
#define WM8962_WRITE_SEQUENCER_29
#define WM8962_WRITE_SEQUENCER_30
#define WM8962_WRITE_SEQUENCER_31
#define WM8962_WRITE_SEQUENCER_32
#define WM8962_WRITE_SEQUENCER_33
#define WM8962_WRITE_SEQUENCER_34
#define WM8962_WRITE_SEQUENCER_35
#define WM8962_WRITE_SEQUENCER_36
#define WM8962_WRITE_SEQUENCER_37
#define WM8962_WRITE_SEQUENCER_38
#define WM8962_WRITE_SEQUENCER_39
#define WM8962_WRITE_SEQUENCER_40
#define WM8962_WRITE_SEQUENCER_41
#define WM8962_WRITE_SEQUENCER_42
#define WM8962_WRITE_SEQUENCER_43
#define WM8962_WRITE_SEQUENCER_44
#define WM8962_WRITE_SEQUENCER_45
#define WM8962_WRITE_SEQUENCER_46
#define WM8962_WRITE_SEQUENCER_47
#define WM8962_WRITE_SEQUENCER_48
#define WM8962_WRITE_SEQUENCER_49
#define WM8962_WRITE_SEQUENCER_50
#define WM8962_WRITE_SEQUENCER_51
#define WM8962_WRITE_SEQUENCER_52
#define WM8962_WRITE_SEQUENCER_53
#define WM8962_WRITE_SEQUENCER_54
#define WM8962_WRITE_SEQUENCER_55
#define WM8962_WRITE_SEQUENCER_56
#define WM8962_WRITE_SEQUENCER_57
#define WM8962_WRITE_SEQUENCER_58
#define WM8962_WRITE_SEQUENCER_59
#define WM8962_WRITE_SEQUENCER_60
#define WM8962_WRITE_SEQUENCER_61
#define WM8962_WRITE_SEQUENCER_62
#define WM8962_WRITE_SEQUENCER_63
#define WM8962_WRITE_SEQUENCER_64
#define WM8962_WRITE_SEQUENCER_65
#define WM8962_WRITE_SEQUENCER_66
#define WM8962_WRITE_SEQUENCER_67
#define WM8962_WRITE_SEQUENCER_68
#define WM8962_WRITE_SEQUENCER_69
#define WM8962_WRITE_SEQUENCER_70
#define WM8962_WRITE_SEQUENCER_71
#define WM8962_WRITE_SEQUENCER_72
#define WM8962_WRITE_SEQUENCER_73
#define WM8962_WRITE_SEQUENCER_74
#define WM8962_WRITE_SEQUENCER_75
#define WM8962_WRITE_SEQUENCER_76
#define WM8962_WRITE_SEQUENCER_77
#define WM8962_WRITE_SEQUENCER_78
#define WM8962_WRITE_SEQUENCER_79
#define WM8962_WRITE_SEQUENCER_80
#define WM8962_WRITE_SEQUENCER_81
#define WM8962_WRITE_SEQUENCER_82
#define WM8962_WRITE_SEQUENCER_83
#define WM8962_WRITE_SEQUENCER_84
#define WM8962_WRITE_SEQUENCER_85
#define WM8962_WRITE_SEQUENCER_86
#define WM8962_WRITE_SEQUENCER_87
#define WM8962_WRITE_SEQUENCER_88
#define WM8962_WRITE_SEQUENCER_89
#define WM8962_WRITE_SEQUENCER_90
#define WM8962_WRITE_SEQUENCER_91
#define WM8962_WRITE_SEQUENCER_92
#define WM8962_WRITE_SEQUENCER_93
#define WM8962_WRITE_SEQUENCER_94
#define WM8962_WRITE_SEQUENCER_95
#define WM8962_WRITE_SEQUENCER_96
#define WM8962_WRITE_SEQUENCER_97
#define WM8962_WRITE_SEQUENCER_98
#define WM8962_WRITE_SEQUENCER_99
#define WM8962_WRITE_SEQUENCER_100
#define WM8962_WRITE_SEQUENCER_101
#define WM8962_WRITE_SEQUENCER_102
#define WM8962_WRITE_SEQUENCER_103
#define WM8962_WRITE_SEQUENCER_104
#define WM8962_WRITE_SEQUENCER_105
#define WM8962_WRITE_SEQUENCER_106
#define WM8962_WRITE_SEQUENCER_107
#define WM8962_WRITE_SEQUENCER_108
#define WM8962_WRITE_SEQUENCER_109
#define WM8962_WRITE_SEQUENCER_110
#define WM8962_WRITE_SEQUENCER_111
#define WM8962_WRITE_SEQUENCER_112
#define WM8962_WRITE_SEQUENCER_113
#define WM8962_WRITE_SEQUENCER_114
#define WM8962_WRITE_SEQUENCER_115
#define WM8962_WRITE_SEQUENCER_116
#define WM8962_WRITE_SEQUENCER_117
#define WM8962_WRITE_SEQUENCER_118
#define WM8962_WRITE_SEQUENCER_119
#define WM8962_WRITE_SEQUENCER_120
#define WM8962_WRITE_SEQUENCER_121
#define WM8962_WRITE_SEQUENCER_122
#define WM8962_WRITE_SEQUENCER_123
#define WM8962_WRITE_SEQUENCER_124
#define WM8962_WRITE_SEQUENCER_125
#define WM8962_WRITE_SEQUENCER_126
#define WM8962_WRITE_SEQUENCER_127
#define WM8962_WRITE_SEQUENCER_128
#define WM8962_WRITE_SEQUENCER_129
#define WM8962_WRITE_SEQUENCER_130
#define WM8962_WRITE_SEQUENCER_131
#define WM8962_WRITE_SEQUENCER_132
#define WM8962_WRITE_SEQUENCER_133
#define WM8962_WRITE_SEQUENCER_134
#define WM8962_WRITE_SEQUENCER_135
#define WM8962_WRITE_SEQUENCER_136
#define WM8962_WRITE_SEQUENCER_137
#define WM8962_WRITE_SEQUENCER_138
#define WM8962_WRITE_SEQUENCER_139
#define WM8962_WRITE_SEQUENCER_140
#define WM8962_WRITE_SEQUENCER_141
#define WM8962_WRITE_SEQUENCER_142
#define WM8962_WRITE_SEQUENCER_143
#define WM8962_WRITE_SEQUENCER_144
#define WM8962_WRITE_SEQUENCER_145
#define WM8962_WRITE_SEQUENCER_146
#define WM8962_WRITE_SEQUENCER_147
#define WM8962_WRITE_SEQUENCER_148
#define WM8962_WRITE_SEQUENCER_149
#define WM8962_WRITE_SEQUENCER_150
#define WM8962_WRITE_SEQUENCER_151
#define WM8962_WRITE_SEQUENCER_152
#define WM8962_WRITE_SEQUENCER_153
#define WM8962_WRITE_SEQUENCER_154
#define WM8962_WRITE_SEQUENCER_155
#define WM8962_WRITE_SEQUENCER_156
#define WM8962_WRITE_SEQUENCER_157
#define WM8962_WRITE_SEQUENCER_158
#define WM8962_WRITE_SEQUENCER_159
#define WM8962_WRITE_SEQUENCER_160
#define WM8962_WRITE_SEQUENCER_161
#define WM8962_WRITE_SEQUENCER_162
#define WM8962_WRITE_SEQUENCER_163
#define WM8962_WRITE_SEQUENCER_164
#define WM8962_WRITE_SEQUENCER_165
#define WM8962_WRITE_SEQUENCER_166
#define WM8962_WRITE_SEQUENCER_167
#define WM8962_WRITE_SEQUENCER_168
#define WM8962_WRITE_SEQUENCER_169
#define WM8962_WRITE_SEQUENCER_170
#define WM8962_WRITE_SEQUENCER_171
#define WM8962_WRITE_SEQUENCER_172
#define WM8962_WRITE_SEQUENCER_173
#define WM8962_WRITE_SEQUENCER_174
#define WM8962_WRITE_SEQUENCER_175
#define WM8962_WRITE_SEQUENCER_176
#define WM8962_WRITE_SEQUENCER_177
#define WM8962_WRITE_SEQUENCER_178
#define WM8962_WRITE_SEQUENCER_179
#define WM8962_WRITE_SEQUENCER_180
#define WM8962_WRITE_SEQUENCER_181
#define WM8962_WRITE_SEQUENCER_182
#define WM8962_WRITE_SEQUENCER_183
#define WM8962_WRITE_SEQUENCER_184
#define WM8962_WRITE_SEQUENCER_185
#define WM8962_WRITE_SEQUENCER_186
#define WM8962_WRITE_SEQUENCER_187
#define WM8962_WRITE_SEQUENCER_188
#define WM8962_WRITE_SEQUENCER_189
#define WM8962_WRITE_SEQUENCER_190
#define WM8962_WRITE_SEQUENCER_191
#define WM8962_WRITE_SEQUENCER_192
#define WM8962_WRITE_SEQUENCER_193
#define WM8962_WRITE_SEQUENCER_194
#define WM8962_WRITE_SEQUENCER_195
#define WM8962_WRITE_SEQUENCER_196
#define WM8962_WRITE_SEQUENCER_197
#define WM8962_WRITE_SEQUENCER_198
#define WM8962_WRITE_SEQUENCER_199
#define WM8962_WRITE_SEQUENCER_200
#define WM8962_WRITE_SEQUENCER_201
#define WM8962_WRITE_SEQUENCER_202
#define WM8962_WRITE_SEQUENCER_203
#define WM8962_WRITE_SEQUENCER_204
#define WM8962_WRITE_SEQUENCER_205
#define WM8962_WRITE_SEQUENCER_206
#define WM8962_WRITE_SEQUENCER_207
#define WM8962_WRITE_SEQUENCER_208
#define WM8962_WRITE_SEQUENCER_209
#define WM8962_WRITE_SEQUENCER_210
#define WM8962_WRITE_SEQUENCER_211
#define WM8962_WRITE_SEQUENCER_212
#define WM8962_WRITE_SEQUENCER_213
#define WM8962_WRITE_SEQUENCER_214
#define WM8962_WRITE_SEQUENCER_215
#define WM8962_WRITE_SEQUENCER_216
#define WM8962_WRITE_SEQUENCER_217
#define WM8962_WRITE_SEQUENCER_218
#define WM8962_WRITE_SEQUENCER_219
#define WM8962_WRITE_SEQUENCER_220
#define WM8962_WRITE_SEQUENCER_221
#define WM8962_WRITE_SEQUENCER_222
#define WM8962_WRITE_SEQUENCER_223
#define WM8962_WRITE_SEQUENCER_224
#define WM8962_WRITE_SEQUENCER_225
#define WM8962_WRITE_SEQUENCER_226
#define WM8962_WRITE_SEQUENCER_227
#define WM8962_WRITE_SEQUENCER_228
#define WM8962_WRITE_SEQUENCER_229
#define WM8962_WRITE_SEQUENCER_230
#define WM8962_WRITE_SEQUENCER_231
#define WM8962_WRITE_SEQUENCER_232
#define WM8962_WRITE_SEQUENCER_233
#define WM8962_WRITE_SEQUENCER_234
#define WM8962_WRITE_SEQUENCER_235
#define WM8962_WRITE_SEQUENCER_236
#define WM8962_WRITE_SEQUENCER_237
#define WM8962_WRITE_SEQUENCER_238
#define WM8962_WRITE_SEQUENCER_239
#define WM8962_WRITE_SEQUENCER_240
#define WM8962_WRITE_SEQUENCER_241
#define WM8962_WRITE_SEQUENCER_242
#define WM8962_WRITE_SEQUENCER_243
#define WM8962_WRITE_SEQUENCER_244
#define WM8962_WRITE_SEQUENCER_245
#define WM8962_WRITE_SEQUENCER_246
#define WM8962_WRITE_SEQUENCER_247
#define WM8962_WRITE_SEQUENCER_248
#define WM8962_WRITE_SEQUENCER_249
#define WM8962_WRITE_SEQUENCER_250
#define WM8962_WRITE_SEQUENCER_251
#define WM8962_WRITE_SEQUENCER_252
#define WM8962_WRITE_SEQUENCER_253
#define WM8962_WRITE_SEQUENCER_254
#define WM8962_WRITE_SEQUENCER_255
#define WM8962_WRITE_SEQUENCER_256
#define WM8962_WRITE_SEQUENCER_257
#define WM8962_WRITE_SEQUENCER_258
#define WM8962_WRITE_SEQUENCER_259
#define WM8962_WRITE_SEQUENCER_260
#define WM8962_WRITE_SEQUENCER_261
#define WM8962_WRITE_SEQUENCER_262
#define WM8962_WRITE_SEQUENCER_263
#define WM8962_WRITE_SEQUENCER_264
#define WM8962_WRITE_SEQUENCER_265
#define WM8962_WRITE_SEQUENCER_266
#define WM8962_WRITE_SEQUENCER_267
#define WM8962_WRITE_SEQUENCER_268
#define WM8962_WRITE_SEQUENCER_269
#define WM8962_WRITE_SEQUENCER_270
#define WM8962_WRITE_SEQUENCER_271
#define WM8962_WRITE_SEQUENCER_272
#define WM8962_WRITE_SEQUENCER_273
#define WM8962_WRITE_SEQUENCER_274
#define WM8962_WRITE_SEQUENCER_275
#define WM8962_WRITE_SEQUENCER_276
#define WM8962_WRITE_SEQUENCER_277
#define WM8962_WRITE_SEQUENCER_278
#define WM8962_WRITE_SEQUENCER_279
#define WM8962_WRITE_SEQUENCER_280
#define WM8962_WRITE_SEQUENCER_281
#define WM8962_WRITE_SEQUENCER_282
#define WM8962_WRITE_SEQUENCER_283
#define WM8962_WRITE_SEQUENCER_284
#define WM8962_WRITE_SEQUENCER_285
#define WM8962_WRITE_SEQUENCER_286
#define WM8962_WRITE_SEQUENCER_287
#define WM8962_WRITE_SEQUENCER_288
#define WM8962_WRITE_SEQUENCER_289
#define WM8962_WRITE_SEQUENCER_290
#define WM8962_WRITE_SEQUENCER_291
#define WM8962_WRITE_SEQUENCER_292
#define WM8962_WRITE_SEQUENCER_293
#define WM8962_WRITE_SEQUENCER_294
#define WM8962_WRITE_SEQUENCER_295
#define WM8962_WRITE_SEQUENCER_296
#define WM8962_WRITE_SEQUENCER_297
#define WM8962_WRITE_SEQUENCER_298
#define WM8962_WRITE_SEQUENCER_299
#define WM8962_WRITE_SEQUENCER_300
#define WM8962_WRITE_SEQUENCER_301
#define WM8962_WRITE_SEQUENCER_302
#define WM8962_WRITE_SEQUENCER_303
#define WM8962_WRITE_SEQUENCER_304
#define WM8962_WRITE_SEQUENCER_305
#define WM8962_WRITE_SEQUENCER_306
#define WM8962_WRITE_SEQUENCER_307
#define WM8962_WRITE_SEQUENCER_308
#define WM8962_WRITE_SEQUENCER_309
#define WM8962_WRITE_SEQUENCER_310
#define WM8962_WRITE_SEQUENCER_311
#define WM8962_WRITE_SEQUENCER_312
#define WM8962_WRITE_SEQUENCER_313
#define WM8962_WRITE_SEQUENCER_314
#define WM8962_WRITE_SEQUENCER_315
#define WM8962_WRITE_SEQUENCER_316
#define WM8962_WRITE_SEQUENCER_317
#define WM8962_WRITE_SEQUENCER_318
#define WM8962_WRITE_SEQUENCER_319
#define WM8962_WRITE_SEQUENCER_320
#define WM8962_WRITE_SEQUENCER_321
#define WM8962_WRITE_SEQUENCER_322
#define WM8962_WRITE_SEQUENCER_323
#define WM8962_WRITE_SEQUENCER_324
#define WM8962_WRITE_SEQUENCER_325
#define WM8962_WRITE_SEQUENCER_326
#define WM8962_WRITE_SEQUENCER_327
#define WM8962_WRITE_SEQUENCER_328
#define WM8962_WRITE_SEQUENCER_329
#define WM8962_WRITE_SEQUENCER_330
#define WM8962_WRITE_SEQUENCER_331
#define WM8962_WRITE_SEQUENCER_332
#define WM8962_WRITE_SEQUENCER_333
#define WM8962_WRITE_SEQUENCER_334
#define WM8962_WRITE_SEQUENCER_335
#define WM8962_WRITE_SEQUENCER_336
#define WM8962_WRITE_SEQUENCER_337
#define WM8962_WRITE_SEQUENCER_338
#define WM8962_WRITE_SEQUENCER_339
#define WM8962_WRITE_SEQUENCER_340
#define WM8962_WRITE_SEQUENCER_341
#define WM8962_WRITE_SEQUENCER_342
#define WM8962_WRITE_SEQUENCER_343
#define WM8962_WRITE_SEQUENCER_344
#define WM8962_WRITE_SEQUENCER_345
#define WM8962_WRITE_SEQUENCER_346
#define WM8962_WRITE_SEQUENCER_347
#define WM8962_WRITE_SEQUENCER_348
#define WM8962_WRITE_SEQUENCER_349
#define WM8962_WRITE_SEQUENCER_350
#define WM8962_WRITE_SEQUENCER_351
#define WM8962_WRITE_SEQUENCER_352
#define WM8962_WRITE_SEQUENCER_353
#define WM8962_WRITE_SEQUENCER_354
#define WM8962_WRITE_SEQUENCER_355
#define WM8962_WRITE_SEQUENCER_356
#define WM8962_WRITE_SEQUENCER_357
#define WM8962_WRITE_SEQUENCER_358
#define WM8962_WRITE_SEQUENCER_359
#define WM8962_WRITE_SEQUENCER_360
#define WM8962_WRITE_SEQUENCER_361
#define WM8962_WRITE_SEQUENCER_362
#define WM8962_WRITE_SEQUENCER_363
#define WM8962_WRITE_SEQUENCER_364
#define WM8962_WRITE_SEQUENCER_365
#define WM8962_WRITE_SEQUENCER_366
#define WM8962_WRITE_SEQUENCER_367
#define WM8962_WRITE_SEQUENCER_368
#define WM8962_WRITE_SEQUENCER_369
#define WM8962_WRITE_SEQUENCER_370
#define WM8962_WRITE_SEQUENCER_371
#define WM8962_WRITE_SEQUENCER_372
#define WM8962_WRITE_SEQUENCER_373
#define WM8962_WRITE_SEQUENCER_374
#define WM8962_WRITE_SEQUENCER_375
#define WM8962_WRITE_SEQUENCER_376
#define WM8962_WRITE_SEQUENCER_377
#define WM8962_WRITE_SEQUENCER_378
#define WM8962_WRITE_SEQUENCER_379
#define WM8962_WRITE_SEQUENCER_380
#define WM8962_WRITE_SEQUENCER_381
#define WM8962_WRITE_SEQUENCER_382
#define WM8962_WRITE_SEQUENCER_383
#define WM8962_WRITE_SEQUENCER_384
#define WM8962_WRITE_SEQUENCER_385
#define WM8962_WRITE_SEQUENCER_386
#define WM8962_WRITE_SEQUENCER_387
#define WM8962_WRITE_SEQUENCER_388
#define WM8962_WRITE_SEQUENCER_389
#define WM8962_WRITE_SEQUENCER_390
#define WM8962_WRITE_SEQUENCER_391
#define WM8962_WRITE_SEQUENCER_392
#define WM8962_WRITE_SEQUENCER_393
#define WM8962_WRITE_SEQUENCER_394
#define WM8962_WRITE_SEQUENCER_395
#define WM8962_WRITE_SEQUENCER_396
#define WM8962_WRITE_SEQUENCER_397
#define WM8962_WRITE_SEQUENCER_398
#define WM8962_WRITE_SEQUENCER_399
#define WM8962_WRITE_SEQUENCER_400
#define WM8962_WRITE_SEQUENCER_401
#define WM8962_WRITE_SEQUENCER_402
#define WM8962_WRITE_SEQUENCER_403
#define WM8962_WRITE_SEQUENCER_404
#define WM8962_WRITE_SEQUENCER_405
#define WM8962_WRITE_SEQUENCER_406
#define WM8962_WRITE_SEQUENCER_407
#define WM8962_WRITE_SEQUENCER_408
#define WM8962_WRITE_SEQUENCER_409
#define WM8962_WRITE_SEQUENCER_410
#define WM8962_WRITE_SEQUENCER_411
#define WM8962_WRITE_SEQUENCER_412
#define WM8962_WRITE_SEQUENCER_413
#define WM8962_WRITE_SEQUENCER_414
#define WM8962_WRITE_SEQUENCER_415
#define WM8962_WRITE_SEQUENCER_416
#define WM8962_WRITE_SEQUENCER_417
#define WM8962_WRITE_SEQUENCER_418
#define WM8962_WRITE_SEQUENCER_419
#define WM8962_WRITE_SEQUENCER_420
#define WM8962_WRITE_SEQUENCER_421
#define WM8962_WRITE_SEQUENCER_422
#define WM8962_WRITE_SEQUENCER_423
#define WM8962_WRITE_SEQUENCER_424
#define WM8962_WRITE_SEQUENCER_425
#define WM8962_WRITE_SEQUENCER_426
#define WM8962_WRITE_SEQUENCER_427
#define WM8962_WRITE_SEQUENCER_428
#define WM8962_WRITE_SEQUENCER_429
#define WM8962_WRITE_SEQUENCER_430
#define WM8962_WRITE_SEQUENCER_431
#define WM8962_WRITE_SEQUENCER_432
#define WM8962_WRITE_SEQUENCER_433
#define WM8962_WRITE_SEQUENCER_434
#define WM8962_WRITE_SEQUENCER_435
#define WM8962_WRITE_SEQUENCER_436
#define WM8962_WRITE_SEQUENCER_437
#define WM8962_WRITE_SEQUENCER_438
#define WM8962_WRITE_SEQUENCER_439
#define WM8962_WRITE_SEQUENCER_440
#define WM8962_WRITE_SEQUENCER_441
#define WM8962_WRITE_SEQUENCER_442
#define WM8962_WRITE_SEQUENCER_443
#define WM8962_WRITE_SEQUENCER_444
#define WM8962_WRITE_SEQUENCER_445
#define WM8962_WRITE_SEQUENCER_446
#define WM8962_WRITE_SEQUENCER_447
#define WM8962_WRITE_SEQUENCER_448
#define WM8962_WRITE_SEQUENCER_449
#define WM8962_WRITE_SEQUENCER_450
#define WM8962_WRITE_SEQUENCER_451
#define WM8962_WRITE_SEQUENCER_452
#define WM8962_WRITE_SEQUENCER_453
#define WM8962_WRITE_SEQUENCER_454
#define WM8962_WRITE_SEQUENCER_455
#define WM8962_WRITE_SEQUENCER_456
#define WM8962_WRITE_SEQUENCER_457
#define WM8962_WRITE_SEQUENCER_458
#define WM8962_WRITE_SEQUENCER_459
#define WM8962_WRITE_SEQUENCER_460
#define WM8962_WRITE_SEQUENCER_461
#define WM8962_WRITE_SEQUENCER_462
#define WM8962_WRITE_SEQUENCER_463
#define WM8962_WRITE_SEQUENCER_464
#define WM8962_WRITE_SEQUENCER_465
#define WM8962_WRITE_SEQUENCER_466
#define WM8962_WRITE_SEQUENCER_467
#define WM8962_WRITE_SEQUENCER_468
#define WM8962_WRITE_SEQUENCER_469
#define WM8962_WRITE_SEQUENCER_470
#define WM8962_WRITE_SEQUENCER_471
#define WM8962_WRITE_SEQUENCER_472
#define WM8962_WRITE_SEQUENCER_473
#define WM8962_WRITE_SEQUENCER_474
#define WM8962_WRITE_SEQUENCER_475
#define WM8962_WRITE_SEQUENCER_476
#define WM8962_WRITE_SEQUENCER_477
#define WM8962_WRITE_SEQUENCER_478
#define WM8962_WRITE_SEQUENCER_479
#define WM8962_WRITE_SEQUENCER_480
#define WM8962_WRITE_SEQUENCER_481
#define WM8962_WRITE_SEQUENCER_482
#define WM8962_WRITE_SEQUENCER_483
#define WM8962_WRITE_SEQUENCER_484
#define WM8962_WRITE_SEQUENCER_485
#define WM8962_WRITE_SEQUENCER_486
#define WM8962_WRITE_SEQUENCER_487
#define WM8962_WRITE_SEQUENCER_488
#define WM8962_WRITE_SEQUENCER_489
#define WM8962_WRITE_SEQUENCER_490
#define WM8962_WRITE_SEQUENCER_491
#define WM8962_WRITE_SEQUENCER_492
#define WM8962_WRITE_SEQUENCER_493
#define WM8962_WRITE_SEQUENCER_494
#define WM8962_WRITE_SEQUENCER_495
#define WM8962_WRITE_SEQUENCER_496
#define WM8962_WRITE_SEQUENCER_497
#define WM8962_WRITE_SEQUENCER_498
#define WM8962_WRITE_SEQUENCER_499
#define WM8962_WRITE_SEQUENCER_500
#define WM8962_WRITE_SEQUENCER_501
#define WM8962_WRITE_SEQUENCER_502
#define WM8962_WRITE_SEQUENCER_503
#define WM8962_WRITE_SEQUENCER_504
#define WM8962_WRITE_SEQUENCER_505
#define WM8962_WRITE_SEQUENCER_506
#define WM8962_WRITE_SEQUENCER_507
#define WM8962_WRITE_SEQUENCER_508
#define WM8962_WRITE_SEQUENCER_509
#define WM8962_WRITE_SEQUENCER_510
#define WM8962_WRITE_SEQUENCER_511
#define WM8962_DSP2_INSTRUCTION_RAM_0
#define WM8962_DSP2_ADDRESS_RAM_2
#define WM8962_DSP2_ADDRESS_RAM_1
#define WM8962_DSP2_ADDRESS_RAM_0
#define WM8962_DSP2_DATA1_RAM_1
#define WM8962_DSP2_DATA1_RAM_0
#define WM8962_DSP2_DATA2_RAM_1
#define WM8962_DSP2_DATA2_RAM_0
#define WM8962_DSP2_DATA3_RAM_1
#define WM8962_DSP2_DATA3_RAM_0
#define WM8962_DSP2_COEFF_RAM_0
#define WM8962_RETUNEADC_SHARED_COEFF_1
#define WM8962_RETUNEADC_SHARED_COEFF_0
#define WM8962_RETUNEDAC_SHARED_COEFF_1
#define WM8962_RETUNEDAC_SHARED_COEFF_0
#define WM8962_SOUNDSTAGE_ENABLES_1
#define WM8962_SOUNDSTAGE_ENABLES_0
#define WM8962_HDBASS_AI_1
#define WM8962_HDBASS_AI_0
#define WM8962_HDBASS_AR_1
#define WM8962_HDBASS_AR_0
#define WM8962_HDBASS_B_1
#define WM8962_HDBASS_B_0
#define WM8962_HDBASS_K_1
#define WM8962_HDBASS_K_0
#define WM8962_HDBASS_N1_1
#define WM8962_HDBASS_N1_0
#define WM8962_HDBASS_N2_1
#define WM8962_HDBASS_N2_0
#define WM8962_HDBASS_N3_1
#define WM8962_HDBASS_N3_0
#define WM8962_HDBASS_N4_1
#define WM8962_HDBASS_N4_0
#define WM8962_HDBASS_N5_1
#define WM8962_HDBASS_N5_0
#define WM8962_HDBASS_X1_1
#define WM8962_HDBASS_X1_0
#define WM8962_HDBASS_X2_1
#define WM8962_HDBASS_X2_0
#define WM8962_HDBASS_X3_1
#define WM8962_HDBASS_X3_0
#define WM8962_HDBASS_ATK_1
#define WM8962_HDBASS_ATK_0
#define WM8962_HDBASS_DCY_1
#define WM8962_HDBASS_DCY_0
#define WM8962_HDBASS_PG_1
#define WM8962_HDBASS_PG_0
#define WM8962_HPF_C_1
#define WM8962_HPF_C_0
#define WM8962_ADCL_RETUNE_C1_1
#define WM8962_ADCL_RETUNE_C1_0
#define WM8962_ADCL_RETUNE_C2_1
#define WM8962_ADCL_RETUNE_C2_0
#define WM8962_ADCL_RETUNE_C3_1
#define WM8962_ADCL_RETUNE_C3_0
#define WM8962_ADCL_RETUNE_C4_1
#define WM8962_ADCL_RETUNE_C4_0
#define WM8962_ADCL_RETUNE_C5_1
#define WM8962_ADCL_RETUNE_C5_0
#define WM8962_ADCL_RETUNE_C6_1
#define WM8962_ADCL_RETUNE_C6_0
#define WM8962_ADCL_RETUNE_C7_1
#define WM8962_ADCL_RETUNE_C7_0
#define WM8962_ADCL_RETUNE_C8_1
#define WM8962_ADCL_RETUNE_C8_0
#define WM8962_ADCL_RETUNE_C9_1
#define WM8962_ADCL_RETUNE_C9_0
#define WM8962_ADCL_RETUNE_C10_1
#define WM8962_ADCL_RETUNE_C10_0
#define WM8962_ADCL_RETUNE_C11_1
#define WM8962_ADCL_RETUNE_C11_0
#define WM8962_ADCL_RETUNE_C12_1
#define WM8962_ADCL_RETUNE_C12_0
#define WM8962_ADCL_RETUNE_C13_1
#define WM8962_ADCL_RETUNE_C13_0
#define WM8962_ADCL_RETUNE_C14_1
#define WM8962_ADCL_RETUNE_C14_0
#define WM8962_ADCL_RETUNE_C15_1
#define WM8962_ADCL_RETUNE_C15_0
#define WM8962_ADCL_RETUNE_C16_1
#define WM8962_ADCL_RETUNE_C16_0
#define WM8962_ADCL_RETUNE_C17_1
#define WM8962_ADCL_RETUNE_C17_0
#define WM8962_ADCL_RETUNE_C18_1
#define WM8962_ADCL_RETUNE_C18_0
#define WM8962_ADCL_RETUNE_C19_1
#define WM8962_ADCL_RETUNE_C19_0
#define WM8962_ADCL_RETUNE_C20_1
#define WM8962_ADCL_RETUNE_C20_0
#define WM8962_ADCL_RETUNE_C21_1
#define WM8962_ADCL_RETUNE_C21_0
#define WM8962_ADCL_RETUNE_C22_1
#define WM8962_ADCL_RETUNE_C22_0
#define WM8962_ADCL_RETUNE_C23_1
#define WM8962_ADCL_RETUNE_C23_0
#define WM8962_ADCL_RETUNE_C24_1
#define WM8962_ADCL_RETUNE_C24_0
#define WM8962_ADCL_RETUNE_C25_1
#define WM8962_ADCL_RETUNE_C25_0
#define WM8962_ADCL_RETUNE_C26_1
#define WM8962_ADCL_RETUNE_C26_0
#define WM8962_ADCL_RETUNE_C27_1
#define WM8962_ADCL_RETUNE_C27_0
#define WM8962_ADCL_RETUNE_C28_1
#define WM8962_ADCL_RETUNE_C28_0
#define WM8962_ADCL_RETUNE_C29_1
#define WM8962_ADCL_RETUNE_C29_0
#define WM8962_ADCL_RETUNE_C30_1
#define WM8962_ADCL_RETUNE_C30_0
#define WM8962_ADCL_RETUNE_C31_1
#define WM8962_ADCL_RETUNE_C31_0
#define WM8962_ADCL_RETUNE_C32_1
#define WM8962_ADCL_RETUNE_C32_0
#define WM8962_RETUNEADC_PG2_1
#define WM8962_RETUNEADC_PG2_0
#define WM8962_RETUNEADC_PG_1
#define WM8962_RETUNEADC_PG_0
#define WM8962_ADCR_RETUNE_C1_1
#define WM8962_ADCR_RETUNE_C1_0
#define WM8962_ADCR_RETUNE_C2_1
#define WM8962_ADCR_RETUNE_C2_0
#define WM8962_ADCR_RETUNE_C3_1
#define WM8962_ADCR_RETUNE_C3_0
#define WM8962_ADCR_RETUNE_C4_1
#define WM8962_ADCR_RETUNE_C4_0
#define WM8962_ADCR_RETUNE_C5_1
#define WM8962_ADCR_RETUNE_C5_0
#define WM8962_ADCR_RETUNE_C6_1
#define WM8962_ADCR_RETUNE_C6_0
#define WM8962_ADCR_RETUNE_C7_1
#define WM8962_ADCR_RETUNE_C7_0
#define WM8962_ADCR_RETUNE_C8_1
#define WM8962_ADCR_RETUNE_C8_0
#define WM8962_ADCR_RETUNE_C9_1
#define WM8962_ADCR_RETUNE_C9_0
#define WM8962_ADCR_RETUNE_C10_1
#define WM8962_ADCR_RETUNE_C10_0
#define WM8962_ADCR_RETUNE_C11_1
#define WM8962_ADCR_RETUNE_C11_0
#define WM8962_ADCR_RETUNE_C12_1
#define WM8962_ADCR_RETUNE_C12_0
#define WM8962_ADCR_RETUNE_C13_1
#define WM8962_ADCR_RETUNE_C13_0
#define WM8962_ADCR_RETUNE_C14_1
#define WM8962_ADCR_RETUNE_C14_0
#define WM8962_ADCR_RETUNE_C15_1
#define WM8962_ADCR_RETUNE_C15_0
#define WM8962_ADCR_RETUNE_C16_1
#define WM8962_ADCR_RETUNE_C16_0
#define WM8962_ADCR_RETUNE_C17_1
#define WM8962_ADCR_RETUNE_C17_0
#define WM8962_ADCR_RETUNE_C18_1
#define WM8962_ADCR_RETUNE_C18_0
#define WM8962_ADCR_RETUNE_C19_1
#define WM8962_ADCR_RETUNE_C19_0
#define WM8962_ADCR_RETUNE_C20_1
#define WM8962_ADCR_RETUNE_C20_0
#define WM8962_ADCR_RETUNE_C21_1
#define WM8962_ADCR_RETUNE_C21_0
#define WM8962_ADCR_RETUNE_C22_1
#define WM8962_ADCR_RETUNE_C22_0
#define WM8962_ADCR_RETUNE_C23_1
#define WM8962_ADCR_RETUNE_C23_0
#define WM8962_ADCR_RETUNE_C24_1
#define WM8962_ADCR_RETUNE_C24_0
#define WM8962_ADCR_RETUNE_C25_1
#define WM8962_ADCR_RETUNE_C25_0
#define WM8962_ADCR_RETUNE_C26_1
#define WM8962_ADCR_RETUNE_C26_0
#define WM8962_ADCR_RETUNE_C27_1
#define WM8962_ADCR_RETUNE_C27_0
#define WM8962_ADCR_RETUNE_C28_1
#define WM8962_ADCR_RETUNE_C28_0
#define WM8962_ADCR_RETUNE_C29_1
#define WM8962_ADCR_RETUNE_C29_0
#define WM8962_ADCR_RETUNE_C30_1
#define WM8962_ADCR_RETUNE_C30_0
#define WM8962_ADCR_RETUNE_C31_1
#define WM8962_ADCR_RETUNE_C31_0
#define WM8962_ADCR_RETUNE_C32_1
#define WM8962_ADCR_RETUNE_C32_0
#define WM8962_DACL_RETUNE_C1_1
#define WM8962_DACL_RETUNE_C1_0
#define WM8962_DACL_RETUNE_C2_1
#define WM8962_DACL_RETUNE_C2_0
#define WM8962_DACL_RETUNE_C3_1
#define WM8962_DACL_RETUNE_C3_0
#define WM8962_DACL_RETUNE_C4_1
#define WM8962_DACL_RETUNE_C4_0
#define WM8962_DACL_RETUNE_C5_1
#define WM8962_DACL_RETUNE_C5_0
#define WM8962_DACL_RETUNE_C6_1
#define WM8962_DACL_RETUNE_C6_0
#define WM8962_DACL_RETUNE_C7_1
#define WM8962_DACL_RETUNE_C7_0
#define WM8962_DACL_RETUNE_C8_1
#define WM8962_DACL_RETUNE_C8_0
#define WM8962_DACL_RETUNE_C9_1
#define WM8962_DACL_RETUNE_C9_0
#define WM8962_DACL_RETUNE_C10_1
#define WM8962_DACL_RETUNE_C10_0
#define WM8962_DACL_RETUNE_C11_1
#define WM8962_DACL_RETUNE_C11_0
#define WM8962_DACL_RETUNE_C12_1
#define WM8962_DACL_RETUNE_C12_0
#define WM8962_DACL_RETUNE_C13_1
#define WM8962_DACL_RETUNE_C13_0
#define WM8962_DACL_RETUNE_C14_1
#define WM8962_DACL_RETUNE_C14_0
#define WM8962_DACL_RETUNE_C15_1
#define WM8962_DACL_RETUNE_C15_0
#define WM8962_DACL_RETUNE_C16_1
#define WM8962_DACL_RETUNE_C16_0
#define WM8962_DACL_RETUNE_C17_1
#define WM8962_DACL_RETUNE_C17_0
#define WM8962_DACL_RETUNE_C18_1
#define WM8962_DACL_RETUNE_C18_0
#define WM8962_DACL_RETUNE_C19_1
#define WM8962_DACL_RETUNE_C19_0
#define WM8962_DACL_RETUNE_C20_1
#define WM8962_DACL_RETUNE_C20_0
#define WM8962_DACL_RETUNE_C21_1
#define WM8962_DACL_RETUNE_C21_0
#define WM8962_DACL_RETUNE_C22_1
#define WM8962_DACL_RETUNE_C22_0
#define WM8962_DACL_RETUNE_C23_1
#define WM8962_DACL_RETUNE_C23_0
#define WM8962_DACL_RETUNE_C24_1
#define WM8962_DACL_RETUNE_C24_0
#define WM8962_DACL_RETUNE_C25_1
#define WM8962_DACL_RETUNE_C25_0
#define WM8962_DACL_RETUNE_C26_1
#define WM8962_DACL_RETUNE_C26_0
#define WM8962_DACL_RETUNE_C27_1
#define WM8962_DACL_RETUNE_C27_0
#define WM8962_DACL_RETUNE_C28_1
#define WM8962_DACL_RETUNE_C28_0
#define WM8962_DACL_RETUNE_C29_1
#define WM8962_DACL_RETUNE_C29_0
#define WM8962_DACL_RETUNE_C30_1
#define WM8962_DACL_RETUNE_C30_0
#define WM8962_DACL_RETUNE_C31_1
#define WM8962_DACL_RETUNE_C31_0
#define WM8962_DACL_RETUNE_C32_1
#define WM8962_DACL_RETUNE_C32_0
#define WM8962_RETUNEDAC_PG2_1
#define WM8962_RETUNEDAC_PG2_0
#define WM8962_RETUNEDAC_PG_1
#define WM8962_RETUNEDAC_PG_0
#define WM8962_DACR_RETUNE_C1_1
#define WM8962_DACR_RETUNE_C1_0
#define WM8962_DACR_RETUNE_C2_1
#define WM8962_DACR_RETUNE_C2_0
#define WM8962_DACR_RETUNE_C3_1
#define WM8962_DACR_RETUNE_C3_0
#define WM8962_DACR_RETUNE_C4_1
#define WM8962_DACR_RETUNE_C4_0
#define WM8962_DACR_RETUNE_C5_1
#define WM8962_DACR_RETUNE_C5_0
#define WM8962_DACR_RETUNE_C6_1
#define WM8962_DACR_RETUNE_C6_0
#define WM8962_DACR_RETUNE_C7_1
#define WM8962_DACR_RETUNE_C7_0
#define WM8962_DACR_RETUNE_C8_1
#define WM8962_DACR_RETUNE_C8_0
#define WM8962_DACR_RETUNE_C9_1
#define WM8962_DACR_RETUNE_C9_0
#define WM8962_DACR_RETUNE_C10_1
#define WM8962_DACR_RETUNE_C10_0
#define WM8962_DACR_RETUNE_C11_1
#define WM8962_DACR_RETUNE_C11_0
#define WM8962_DACR_RETUNE_C12_1
#define WM8962_DACR_RETUNE_C12_0
#define WM8962_DACR_RETUNE_C13_1
#define WM8962_DACR_RETUNE_C13_0
#define WM8962_DACR_RETUNE_C14_1
#define WM8962_DACR_RETUNE_C14_0
#define WM8962_DACR_RETUNE_C15_1
#define WM8962_DACR_RETUNE_C15_0
#define WM8962_DACR_RETUNE_C16_1
#define WM8962_DACR_RETUNE_C16_0
#define WM8962_DACR_RETUNE_C17_1
#define WM8962_DACR_RETUNE_C17_0
#define WM8962_DACR_RETUNE_C18_1
#define WM8962_DACR_RETUNE_C18_0
#define WM8962_DACR_RETUNE_C19_1
#define WM8962_DACR_RETUNE_C19_0
#define WM8962_DACR_RETUNE_C20_1
#define WM8962_DACR_RETUNE_C20_0
#define WM8962_DACR_RETUNE_C21_1
#define WM8962_DACR_RETUNE_C21_0
#define WM8962_DACR_RETUNE_C22_1
#define WM8962_DACR_RETUNE_C22_0
#define WM8962_DACR_RETUNE_C23_1
#define WM8962_DACR_RETUNE_C23_0
#define WM8962_DACR_RETUNE_C24_1
#define WM8962_DACR_RETUNE_C24_0
#define WM8962_DACR_RETUNE_C25_1
#define WM8962_DACR_RETUNE_C25_0
#define WM8962_DACR_RETUNE_C26_1
#define WM8962_DACR_RETUNE_C26_0
#define WM8962_DACR_RETUNE_C27_1
#define WM8962_DACR_RETUNE_C27_0
#define WM8962_DACR_RETUNE_C28_1
#define WM8962_DACR_RETUNE_C28_0
#define WM8962_DACR_RETUNE_C29_1
#define WM8962_DACR_RETUNE_C29_0
#define WM8962_DACR_RETUNE_C30_1
#define WM8962_DACR_RETUNE_C30_0
#define WM8962_DACR_RETUNE_C31_1
#define WM8962_DACR_RETUNE_C31_0
#define WM8962_DACR_RETUNE_C32_1
#define WM8962_DACR_RETUNE_C32_0
#define WM8962_VSS_XHD2_1
#define WM8962_VSS_XHD2_0
#define WM8962_VSS_XHD3_1
#define WM8962_VSS_XHD3_0
#define WM8962_VSS_XHN1_1
#define WM8962_VSS_XHN1_0
#define WM8962_VSS_XHN2_1
#define WM8962_VSS_XHN2_0
#define WM8962_VSS_XHN3_1
#define WM8962_VSS_XHN3_0
#define WM8962_VSS_XLA_1
#define WM8962_VSS_XLA_0
#define WM8962_VSS_XLB_1
#define WM8962_VSS_XLB_0
#define WM8962_VSS_XLG_1
#define WM8962_VSS_XLG_0
#define WM8962_VSS_PG2_1
#define WM8962_VSS_PG2_0
#define WM8962_VSS_PG_1
#define WM8962_VSS_PG_0
#define WM8962_VSS_XTD1_1
#define WM8962_VSS_XTD1_0
#define WM8962_VSS_XTD2_1
#define WM8962_VSS_XTD2_0
#define WM8962_VSS_XTD3_1
#define WM8962_VSS_XTD3_0
#define WM8962_VSS_XTD4_1
#define WM8962_VSS_XTD4_0
#define WM8962_VSS_XTD5_1
#define WM8962_VSS_XTD5_0
#define WM8962_VSS_XTD6_1
#define WM8962_VSS_XTD6_0
#define WM8962_VSS_XTD7_1
#define WM8962_VSS_XTD7_0
#define WM8962_VSS_XTD8_1
#define WM8962_VSS_XTD8_0
#define WM8962_VSS_XTD9_1
#define WM8962_VSS_XTD9_0
#define WM8962_VSS_XTD10_1
#define WM8962_VSS_XTD10_0
#define WM8962_VSS_XTD11_1
#define WM8962_VSS_XTD11_0
#define WM8962_VSS_XTD12_1
#define WM8962_VSS_XTD12_0
#define WM8962_VSS_XTD13_1
#define WM8962_VSS_XTD13_0
#define WM8962_VSS_XTD14_1
#define WM8962_VSS_XTD14_0
#define WM8962_VSS_XTD15_1
#define WM8962_VSS_XTD15_0
#define WM8962_VSS_XTD16_1
#define WM8962_VSS_XTD16_0
#define WM8962_VSS_XTD17_1
#define WM8962_VSS_XTD17_0
#define WM8962_VSS_XTD18_1
#define WM8962_VSS_XTD18_0
#define WM8962_VSS_XTD19_1
#define WM8962_VSS_XTD19_0
#define WM8962_VSS_XTD20_1
#define WM8962_VSS_XTD20_0
#define WM8962_VSS_XTD21_1
#define WM8962_VSS_XTD21_0
#define WM8962_VSS_XTD22_1
#define WM8962_VSS_XTD22_0
#define WM8962_VSS_XTD23_1
#define WM8962_VSS_XTD23_0
#define WM8962_VSS_XTD24_1
#define WM8962_VSS_XTD24_0
#define WM8962_VSS_XTD25_1
#define WM8962_VSS_XTD25_0
#define WM8962_VSS_XTD26_1
#define WM8962_VSS_XTD26_0
#define WM8962_VSS_XTD27_1
#define WM8962_VSS_XTD27_0
#define WM8962_VSS_XTD28_1
#define WM8962_VSS_XTD28_0
#define WM8962_VSS_XTD29_1
#define WM8962_VSS_XTD29_0
#define WM8962_VSS_XTD30_1
#define WM8962_VSS_XTD30_0
#define WM8962_VSS_XTD31_1
#define WM8962_VSS_XTD31_0
#define WM8962_VSS_XTD32_1
#define WM8962_VSS_XTD32_0
#define WM8962_VSS_XTS1_1
#define WM8962_VSS_XTS1_0
#define WM8962_VSS_XTS2_1
#define WM8962_VSS_XTS2_0
#define WM8962_VSS_XTS3_1
#define WM8962_VSS_XTS3_0
#define WM8962_VSS_XTS4_1
#define WM8962_VSS_XTS4_0
#define WM8962_VSS_XTS5_1
#define WM8962_VSS_XTS5_0
#define WM8962_VSS_XTS6_1
#define WM8962_VSS_XTS6_0
#define WM8962_VSS_XTS7_1
#define WM8962_VSS_XTS7_0
#define WM8962_VSS_XTS8_1
#define WM8962_VSS_XTS8_0
#define WM8962_VSS_XTS9_1
#define WM8962_VSS_XTS9_0
#define WM8962_VSS_XTS10_1
#define WM8962_VSS_XTS10_0
#define WM8962_VSS_XTS11_1
#define WM8962_VSS_XTS11_0
#define WM8962_VSS_XTS12_1
#define WM8962_VSS_XTS12_0
#define WM8962_VSS_XTS13_1
#define WM8962_VSS_XTS13_0
#define WM8962_VSS_XTS14_1
#define WM8962_VSS_XTS14_0
#define WM8962_VSS_XTS15_1
#define WM8962_VSS_XTS15_0
#define WM8962_VSS_XTS16_1
#define WM8962_VSS_XTS16_0
#define WM8962_VSS_XTS17_1
#define WM8962_VSS_XTS17_0
#define WM8962_VSS_XTS18_1
#define WM8962_VSS_XTS18_0
#define WM8962_VSS_XTS19_1
#define WM8962_VSS_XTS19_0
#define WM8962_VSS_XTS20_1
#define WM8962_VSS_XTS20_0
#define WM8962_VSS_XTS21_1
#define WM8962_VSS_XTS21_0
#define WM8962_VSS_XTS22_1
#define WM8962_VSS_XTS22_0
#define WM8962_VSS_XTS23_1
#define WM8962_VSS_XTS23_0
#define WM8962_VSS_XTS24_1
#define WM8962_VSS_XTS24_0
#define WM8962_VSS_XTS25_1
#define WM8962_VSS_XTS25_0
#define WM8962_VSS_XTS26_1
#define WM8962_VSS_XTS26_0
#define WM8962_VSS_XTS27_1
#define WM8962_VSS_XTS27_0
#define WM8962_VSS_XTS28_1
#define WM8962_VSS_XTS28_0
#define WM8962_VSS_XTS29_1
#define WM8962_VSS_XTS29_0
#define WM8962_VSS_XTS30_1
#define WM8962_VSS_XTS30_0
#define WM8962_VSS_XTS31_1
#define WM8962_VSS_XTS31_0
#define WM8962_VSS_XTS32_1
#define WM8962_VSS_XTS32_0

#define WM8962_REGISTER_COUNT
#define WM8962_MAX_REGISTER

/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - Left Input volume
 */
#define WM8962_IN_VU
#define WM8962_IN_VU_MASK
#define WM8962_IN_VU_SHIFT
#define WM8962_IN_VU_WIDTH
#define WM8962_INPGAL_MUTE
#define WM8962_INPGAL_MUTE_MASK
#define WM8962_INPGAL_MUTE_SHIFT
#define WM8962_INPGAL_MUTE_WIDTH
#define WM8962_INL_ZC
#define WM8962_INL_ZC_MASK
#define WM8962_INL_ZC_SHIFT
#define WM8962_INL_ZC_WIDTH
#define WM8962_INL_VOL_MASK
#define WM8962_INL_VOL_SHIFT
#define WM8962_INL_VOL_WIDTH

/*
 * R1 (0x01) - Right Input volume
 */
#define WM8962_CUST_ID_MASK
#define WM8962_CUST_ID_SHIFT
#define WM8962_CUST_ID_WIDTH
#define WM8962_CHIP_REV_MASK
#define WM8962_CHIP_REV_SHIFT
#define WM8962_CHIP_REV_WIDTH
#define WM8962_IN_VU
#define WM8962_IN_VU_MASK
#define WM8962_IN_VU_SHIFT
#define WM8962_IN_VU_WIDTH
#define WM8962_INPGAR_MUTE
#define WM8962_INPGAR_MUTE_MASK
#define WM8962_INPGAR_MUTE_SHIFT
#define WM8962_INPGAR_MUTE_WIDTH
#define WM8962_INR_ZC
#define WM8962_INR_ZC_MASK
#define WM8962_INR_ZC_SHIFT
#define WM8962_INR_ZC_WIDTH
#define WM8962_INR_VOL_MASK
#define WM8962_INR_VOL_SHIFT
#define WM8962_INR_VOL_WIDTH

/*
 * R2 (0x02) - HPOUTL volume
 */
#define WM8962_HPOUT_VU
#define WM8962_HPOUT_VU_MASK
#define WM8962_HPOUT_VU_SHIFT
#define WM8962_HPOUT_VU_WIDTH
#define WM8962_HPOUTL_ZC
#define WM8962_HPOUTL_ZC_MASK
#define WM8962_HPOUTL_ZC_SHIFT
#define WM8962_HPOUTL_ZC_WIDTH
#define WM8962_HPOUTL_VOL_MASK
#define WM8962_HPOUTL_VOL_SHIFT
#define WM8962_HPOUTL_VOL_WIDTH

/*
 * R3 (0x03) - HPOUTR volume
 */
#define WM8962_HPOUT_VU
#define WM8962_HPOUT_VU_MASK
#define WM8962_HPOUT_VU_SHIFT
#define WM8962_HPOUT_VU_WIDTH
#define WM8962_HPOUTR_ZC
#define WM8962_HPOUTR_ZC_MASK
#define WM8962_HPOUTR_ZC_SHIFT
#define WM8962_HPOUTR_ZC_WIDTH
#define WM8962_HPOUTR_VOL_MASK
#define WM8962_HPOUTR_VOL_SHIFT
#define WM8962_HPOUTR_VOL_WIDTH

/*
 * R4 (0x04) - Clocking1
 */
#define WM8962_DSPCLK_DIV_MASK
#define WM8962_DSPCLK_DIV_SHIFT
#define WM8962_DSPCLK_DIV_WIDTH
#define WM8962_ADCSYS_CLK_DIV_MASK
#define WM8962_ADCSYS_CLK_DIV_SHIFT
#define WM8962_ADCSYS_CLK_DIV_WIDTH
#define WM8962_DACSYS_CLK_DIV_MASK
#define WM8962_DACSYS_CLK_DIV_SHIFT
#define WM8962_DACSYS_CLK_DIV_WIDTH
#define WM8962_MCLKDIV_MASK
#define WM8962_MCLKDIV_SHIFT
#define WM8962_MCLKDIV_WIDTH

/*
 * R5 (0x05) - ADC & DAC Control 1
 */
#define WM8962_ADCR_DAT_INV
#define WM8962_ADCR_DAT_INV_MASK
#define WM8962_ADCR_DAT_INV_SHIFT
#define WM8962_ADCR_DAT_INV_WIDTH
#define WM8962_ADCL_DAT_INV
#define WM8962_ADCL_DAT_INV_MASK
#define WM8962_ADCL_DAT_INV_SHIFT
#define WM8962_ADCL_DAT_INV_WIDTH
#define WM8962_DAC_MUTE_RAMP
#define WM8962_DAC_MUTE_RAMP_MASK
#define WM8962_DAC_MUTE_RAMP_SHIFT
#define WM8962_DAC_MUTE_RAMP_WIDTH
#define WM8962_DAC_MUTE
#define WM8962_DAC_MUTE_MASK
#define WM8962_DAC_MUTE_SHIFT
#define WM8962_DAC_MUTE_WIDTH
#define WM8962_DAC_DEEMP_MASK
#define WM8962_DAC_DEEMP_SHIFT
#define WM8962_DAC_DEEMP_WIDTH
#define WM8962_ADC_HPF_DIS
#define WM8962_ADC_HPF_DIS_MASK
#define WM8962_ADC_HPF_DIS_SHIFT
#define WM8962_ADC_HPF_DIS_WIDTH

/*
 * R6 (0x06) - ADC & DAC Control 2
 */
#define WM8962_ADC_HPF_SR_MASK
#define WM8962_ADC_HPF_SR_SHIFT
#define WM8962_ADC_HPF_SR_WIDTH
#define WM8962_ADC_HPF_MODE
#define WM8962_ADC_HPF_MODE_MASK
#define WM8962_ADC_HPF_MODE_SHIFT
#define WM8962_ADC_HPF_MODE_WIDTH
#define WM8962_ADC_HPF_CUT_MASK
#define WM8962_ADC_HPF_CUT_SHIFT
#define WM8962_ADC_HPF_CUT_WIDTH
#define WM8962_DACR_DAT_INV
#define WM8962_DACR_DAT_INV_MASK
#define WM8962_DACR_DAT_INV_SHIFT
#define WM8962_DACR_DAT_INV_WIDTH
#define WM8962_DACL_DAT_INV
#define WM8962_DACL_DAT_INV_MASK
#define WM8962_DACL_DAT_INV_SHIFT
#define WM8962_DACL_DAT_INV_WIDTH
#define WM8962_DAC_UNMUTE_RAMP
#define WM8962_DAC_UNMUTE_RAMP_MASK
#define WM8962_DAC_UNMUTE_RAMP_SHIFT
#define WM8962_DAC_UNMUTE_RAMP_WIDTH
#define WM8962_DAC_MUTERATE
#define WM8962_DAC_MUTERATE_MASK
#define WM8962_DAC_MUTERATE_SHIFT
#define WM8962_DAC_MUTERATE_WIDTH
#define WM8962_DAC_HP
#define WM8962_DAC_HP_MASK
#define WM8962_DAC_HP_SHIFT
#define WM8962_DAC_HP_WIDTH

/*
 * R7 (0x07) - Audio Interface 0
 */
#define WM8962_AIFDAC_TDM_MODE
#define WM8962_AIFDAC_TDM_MODE_MASK
#define WM8962_AIFDAC_TDM_MODE_SHIFT
#define WM8962_AIFDAC_TDM_MODE_WIDTH
#define WM8962_AIFDAC_TDM_SLOT
#define WM8962_AIFDAC_TDM_SLOT_MASK
#define WM8962_AIFDAC_TDM_SLOT_SHIFT
#define WM8962_AIFDAC_TDM_SLOT_WIDTH
#define WM8962_AIFADC_TDM_MODE
#define WM8962_AIFADC_TDM_MODE_MASK
#define WM8962_AIFADC_TDM_MODE_SHIFT
#define WM8962_AIFADC_TDM_MODE_WIDTH
#define WM8962_AIFADC_TDM_SLOT
#define WM8962_AIFADC_TDM_SLOT_MASK
#define WM8962_AIFADC_TDM_SLOT_SHIFT
#define WM8962_AIFADC_TDM_SLOT_WIDTH
#define WM8962_ADC_LRSWAP
#define WM8962_ADC_LRSWAP_MASK
#define WM8962_ADC_LRSWAP_SHIFT
#define WM8962_ADC_LRSWAP_WIDTH
#define WM8962_BCLK_INV
#define WM8962_BCLK_INV_MASK
#define WM8962_BCLK_INV_SHIFT
#define WM8962_BCLK_INV_WIDTH
#define WM8962_MSTR
#define WM8962_MSTR_MASK
#define WM8962_MSTR_SHIFT
#define WM8962_MSTR_WIDTH
#define WM8962_DAC_LRSWAP
#define WM8962_DAC_LRSWAP_MASK
#define WM8962_DAC_LRSWAP_SHIFT
#define WM8962_DAC_LRSWAP_WIDTH
#define WM8962_LRCLK_INV
#define WM8962_LRCLK_INV_MASK
#define WM8962_LRCLK_INV_SHIFT
#define WM8962_LRCLK_INV_WIDTH
#define WM8962_WL_MASK
#define WM8962_WL_SHIFT
#define WM8962_WL_WIDTH
#define WM8962_FMT_MASK
#define WM8962_FMT_SHIFT
#define WM8962_FMT_WIDTH

/*
 * R8 (0x08) - Clocking2
 */
#define WM8962_CLKREG_OVD
#define WM8962_CLKREG_OVD_MASK
#define WM8962_CLKREG_OVD_SHIFT
#define WM8962_CLKREG_OVD_WIDTH
#define WM8962_SYSCLK_SRC_MASK
#define WM8962_SYSCLK_SRC_SHIFT
#define WM8962_SYSCLK_SRC_WIDTH
#define WM8962_CLASSD_CLK_DIV_MASK
#define WM8962_CLASSD_CLK_DIV_SHIFT
#define WM8962_CLASSD_CLK_DIV_WIDTH
#define WM8962_SYSCLK_ENA
#define WM8962_SYSCLK_ENA_MASK
#define WM8962_SYSCLK_ENA_SHIFT
#define WM8962_SYSCLK_ENA_WIDTH
#define WM8962_BCLK_DIV_MASK
#define WM8962_BCLK_DIV_SHIFT
#define WM8962_BCLK_DIV_WIDTH

/*
 * R9 (0x09) - Audio Interface 1
 */
#define WM8962_AUTOMUTE_STS
#define WM8962_AUTOMUTE_STS_MASK
#define WM8962_AUTOMUTE_STS_SHIFT
#define WM8962_AUTOMUTE_STS_WIDTH
#define WM8962_DAC_AUTOMUTE_SAMPLES_MASK
#define WM8962_DAC_AUTOMUTE_SAMPLES_SHIFT
#define WM8962_DAC_AUTOMUTE_SAMPLES_WIDTH
#define WM8962_DAC_AUTOMUTE
#define WM8962_DAC_AUTOMUTE_MASK
#define WM8962_DAC_AUTOMUTE_SHIFT
#define WM8962_DAC_AUTOMUTE_WIDTH
#define WM8962_DAC_COMP
#define WM8962_DAC_COMP_MASK
#define WM8962_DAC_COMP_SHIFT
#define WM8962_DAC_COMP_WIDTH
#define WM8962_DAC_COMPMODE
#define WM8962_DAC_COMPMODE_MASK
#define WM8962_DAC_COMPMODE_SHIFT
#define WM8962_DAC_COMPMODE_WIDTH
#define WM8962_ADC_COMP
#define WM8962_ADC_COMP_MASK
#define WM8962_ADC_COMP_SHIFT
#define WM8962_ADC_COMP_WIDTH
#define WM8962_ADC_COMPMODE
#define WM8962_ADC_COMPMODE_MASK
#define WM8962_ADC_COMPMODE_SHIFT
#define WM8962_ADC_COMPMODE_WIDTH
#define WM8962_LOOPBACK
#define WM8962_LOOPBACK_MASK
#define WM8962_LOOPBACK_SHIFT
#define WM8962_LOOPBACK_WIDTH

/*
 * R10 (0x0A) - Left DAC volume
 */
#define WM8962_DAC_VU
#define WM8962_DAC_VU_MASK
#define WM8962_DAC_VU_SHIFT
#define WM8962_DAC_VU_WIDTH
#define WM8962_DACL_VOL_MASK
#define WM8962_DACL_VOL_SHIFT
#define WM8962_DACL_VOL_WIDTH

/*
 * R11 (0x0B) - Right DAC volume
 */
#define WM8962_DAC_VU
#define WM8962_DAC_VU_MASK
#define WM8962_DAC_VU_SHIFT
#define WM8962_DAC_VU_WIDTH
#define WM8962_DACR_VOL_MASK
#define WM8962_DACR_VOL_SHIFT
#define WM8962_DACR_VOL_WIDTH

/*
 * R14 (0x0E) - Audio Interface 2
 */
#define WM8962_AIF_RATE_MASK
#define WM8962_AIF_RATE_SHIFT
#define WM8962_AIF_RATE_WIDTH

/*
 * R15 (0x0F) - Software Reset
 */
#define WM8962_SW_RESET_MASK
#define WM8962_SW_RESET_SHIFT
#define WM8962_SW_RESET_WIDTH

/*
 * R17 (0x11) - ALC1
 */
#define WM8962_ALC_INACTIVE_ENA
#define WM8962_ALC_INACTIVE_ENA_MASK
#define WM8962_ALC_INACTIVE_ENA_SHIFT
#define WM8962_ALC_INACTIVE_ENA_WIDTH
#define WM8962_ALC_LVL_MODE
#define WM8962_ALC_LVL_MODE_MASK
#define WM8962_ALC_LVL_MODE_SHIFT
#define WM8962_ALC_LVL_MODE_WIDTH
#define WM8962_ALCL_ENA
#define WM8962_ALCL_ENA_MASK
#define WM8962_ALCL_ENA_SHIFT
#define WM8962_ALCL_ENA_WIDTH
#define WM8962_ALCR_ENA
#define WM8962_ALCR_ENA_MASK
#define WM8962_ALCR_ENA_SHIFT
#define WM8962_ALCR_ENA_WIDTH
#define WM8962_ALC_MAXGAIN_MASK
#define WM8962_ALC_MAXGAIN_SHIFT
#define WM8962_ALC_MAXGAIN_WIDTH
#define WM8962_ALC_LVL_MASK
#define WM8962_ALC_LVL_SHIFT
#define WM8962_ALC_LVL_WIDTH

/*
 * R18 (0x12) - ALC2
 */
#define WM8962_ALC_LOCK_STS
#define WM8962_ALC_LOCK_STS_MASK
#define WM8962_ALC_LOCK_STS_SHIFT
#define WM8962_ALC_LOCK_STS_WIDTH
#define WM8962_ALC_THRESH_STS
#define WM8962_ALC_THRESH_STS_MASK
#define WM8962_ALC_THRESH_STS_SHIFT
#define WM8962_ALC_THRESH_STS_WIDTH
#define WM8962_ALC_SAT_STS
#define WM8962_ALC_SAT_STS_MASK
#define WM8962_ALC_SAT_STS_SHIFT
#define WM8962_ALC_SAT_STS_WIDTH
#define WM8962_ALC_PKOVR_STS
#define WM8962_ALC_PKOVR_STS_MASK
#define WM8962_ALC_PKOVR_STS_SHIFT
#define WM8962_ALC_PKOVR_STS_WIDTH
#define WM8962_ALC_NGATE_STS
#define WM8962_ALC_NGATE_STS_MASK
#define WM8962_ALC_NGATE_STS_SHIFT
#define WM8962_ALC_NGATE_STS_WIDTH
#define WM8962_ALC_ZC
#define WM8962_ALC_ZC_MASK
#define WM8962_ALC_ZC_SHIFT
#define WM8962_ALC_ZC_WIDTH
#define WM8962_ALC_MINGAIN_MASK
#define WM8962_ALC_MINGAIN_SHIFT
#define WM8962_ALC_MINGAIN_WIDTH
#define WM8962_ALC_HLD_MASK
#define WM8962_ALC_HLD_SHIFT
#define WM8962_ALC_HLD_WIDTH

/*
 * R19 (0x13) - ALC3
 */
#define WM8962_ALC_NGATE_GAIN_MASK
#define WM8962_ALC_NGATE_GAIN_SHIFT
#define WM8962_ALC_NGATE_GAIN_WIDTH
#define WM8962_ALC_MODE
#define WM8962_ALC_MODE_MASK
#define WM8962_ALC_MODE_SHIFT
#define WM8962_ALC_MODE_WIDTH
#define WM8962_ALC_DCY_MASK
#define WM8962_ALC_DCY_SHIFT
#define WM8962_ALC_DCY_WIDTH
#define WM8962_ALC_ATK_MASK
#define WM8962_ALC_ATK_SHIFT
#define WM8962_ALC_ATK_WIDTH

/*
 * R20 (0x14) - Noise Gate
 */
#define WM8962_ALC_NGATE_DCY_MASK
#define WM8962_ALC_NGATE_DCY_SHIFT
#define WM8962_ALC_NGATE_DCY_WIDTH
#define WM8962_ALC_NGATE_ATK_MASK
#define WM8962_ALC_NGATE_ATK_SHIFT
#define WM8962_ALC_NGATE_ATK_WIDTH
#define WM8962_ALC_NGATE_THR_MASK
#define WM8962_ALC_NGATE_THR_SHIFT
#define WM8962_ALC_NGATE_THR_WIDTH
#define WM8962_ALC_NGATE_MODE_MASK
#define WM8962_ALC_NGATE_MODE_SHIFT
#define WM8962_ALC_NGATE_MODE_WIDTH
#define WM8962_ALC_NGATE_ENA
#define WM8962_ALC_NGATE_ENA_MASK
#define WM8962_ALC_NGATE_ENA_SHIFT
#define WM8962_ALC_NGATE_ENA_WIDTH

/*
 * R21 (0x15) - Left ADC volume
 */
#define WM8962_ADC_VU
#define WM8962_ADC_VU_MASK
#define WM8962_ADC_VU_SHIFT
#define WM8962_ADC_VU_WIDTH
#define WM8962_ADCL_VOL_MASK
#define WM8962_ADCL_VOL_SHIFT
#define WM8962_ADCL_VOL_WIDTH

/*
 * R22 (0x16) - Right ADC volume
 */
#define WM8962_ADC_VU
#define WM8962_ADC_VU_MASK
#define WM8962_ADC_VU_SHIFT
#define WM8962_ADC_VU_WIDTH
#define WM8962_ADCR_VOL_MASK
#define WM8962_ADCR_VOL_SHIFT
#define WM8962_ADCR_VOL_WIDTH

/*
 * R23 (0x17) - Additional control(1)
 */
#define WM8962_THERR_ACT
#define WM8962_THERR_ACT_MASK
#define WM8962_THERR_ACT_SHIFT
#define WM8962_THERR_ACT_WIDTH
#define WM8962_ADC_BIAS
#define WM8962_ADC_BIAS_MASK
#define WM8962_ADC_BIAS_SHIFT
#define WM8962_ADC_BIAS_WIDTH
#define WM8962_ADC_HP
#define WM8962_ADC_HP_MASK
#define WM8962_ADC_HP_SHIFT
#define WM8962_ADC_HP_WIDTH
#define WM8962_TOCLK_ENA
#define WM8962_TOCLK_ENA_MASK
#define WM8962_TOCLK_ENA_SHIFT
#define WM8962_TOCLK_ENA_WIDTH

/*
 * R24 (0x18) - Additional control(2)
 */
#define WM8962_AIF_TRI
#define WM8962_AIF_TRI_MASK
#define WM8962_AIF_TRI_SHIFT
#define WM8962_AIF_TRI_WIDTH

/*
 * R25 (0x19) - Pwr Mgmt (1)
 */
#define WM8962_DMIC_ENA
#define WM8962_DMIC_ENA_MASK
#define WM8962_DMIC_ENA_SHIFT
#define WM8962_DMIC_ENA_WIDTH
#define WM8962_OPCLK_ENA
#define WM8962_OPCLK_ENA_MASK
#define WM8962_OPCLK_ENA_SHIFT
#define WM8962_OPCLK_ENA_WIDTH
#define WM8962_VMID_SEL_MASK
#define WM8962_VMID_SEL_SHIFT
#define WM8962_VMID_SEL_WIDTH
#define WM8962_BIAS_ENA
#define WM8962_BIAS_ENA_MASK
#define WM8962_BIAS_ENA_SHIFT
#define WM8962_BIAS_ENA_WIDTH
#define WM8962_INL_ENA
#define WM8962_INL_ENA_MASK
#define WM8962_INL_ENA_SHIFT
#define WM8962_INL_ENA_WIDTH
#define WM8962_INR_ENA
#define WM8962_INR_ENA_MASK
#define WM8962_INR_ENA_SHIFT
#define WM8962_INR_ENA_WIDTH
#define WM8962_ADCL_ENA
#define WM8962_ADCL_ENA_MASK
#define WM8962_ADCL_ENA_SHIFT
#define WM8962_ADCL_ENA_WIDTH
#define WM8962_ADCR_ENA
#define WM8962_ADCR_ENA_MASK
#define WM8962_ADCR_ENA_SHIFT
#define WM8962_ADCR_ENA_WIDTH
#define WM8962_MICBIAS_ENA
#define WM8962_MICBIAS_ENA_MASK
#define WM8962_MICBIAS_ENA_SHIFT
#define WM8962_MICBIAS_ENA_WIDTH

/*
 * R26 (0x1A) - Pwr Mgmt (2)
 */
#define WM8962_DACL_ENA
#define WM8962_DACL_ENA_MASK
#define WM8962_DACL_ENA_SHIFT
#define WM8962_DACL_ENA_WIDTH
#define WM8962_DACR_ENA
#define WM8962_DACR_ENA_MASK
#define WM8962_DACR_ENA_SHIFT
#define WM8962_DACR_ENA_WIDTH
#define WM8962_HPOUTL_PGA_ENA
#define WM8962_HPOUTL_PGA_ENA_MASK
#define WM8962_HPOUTL_PGA_ENA_SHIFT
#define WM8962_HPOUTL_PGA_ENA_WIDTH
#define WM8962_HPOUTR_PGA_ENA
#define WM8962_HPOUTR_PGA_ENA_MASK
#define WM8962_HPOUTR_PGA_ENA_SHIFT
#define WM8962_HPOUTR_PGA_ENA_WIDTH
#define WM8962_SPKOUTL_PGA_ENA
#define WM8962_SPKOUTL_PGA_ENA_MASK
#define WM8962_SPKOUTL_PGA_ENA_SHIFT
#define WM8962_SPKOUTL_PGA_ENA_WIDTH
#define WM8962_SPKOUTR_PGA_ENA
#define WM8962_SPKOUTR_PGA_ENA_MASK
#define WM8962_SPKOUTR_PGA_ENA_SHIFT
#define WM8962_SPKOUTR_PGA_ENA_WIDTH
#define WM8962_HPOUTL_PGA_MUTE
#define WM8962_HPOUTL_PGA_MUTE_MASK
#define WM8962_HPOUTL_PGA_MUTE_SHIFT
#define WM8962_HPOUTL_PGA_MUTE_WIDTH
#define WM8962_HPOUTR_PGA_MUTE
#define WM8962_HPOUTR_PGA_MUTE_MASK
#define WM8962_HPOUTR_PGA_MUTE_SHIFT
#define WM8962_HPOUTR_PGA_MUTE_WIDTH

/*
 * R27 (0x1B) - Additional Control (3)
 */
#define WM8962_SAMPLE_RATE_INT_MODE
#define WM8962_SAMPLE_RATE_INT_MODE_MASK
#define WM8962_SAMPLE_RATE_INT_MODE_SHIFT
#define WM8962_SAMPLE_RATE_INT_MODE_WIDTH
#define WM8962_SAMPLE_RATE_MASK
#define WM8962_SAMPLE_RATE_SHIFT
#define WM8962_SAMPLE_RATE_WIDTH

/*
 * R28 (0x1C) - Anti-pop
 */
#define WM8962_STARTUP_BIAS_ENA
#define WM8962_STARTUP_BIAS_ENA_MASK
#define WM8962_STARTUP_BIAS_ENA_SHIFT
#define WM8962_STARTUP_BIAS_ENA_WIDTH
#define WM8962_VMID_BUF_ENA
#define WM8962_VMID_BUF_ENA_MASK
#define WM8962_VMID_BUF_ENA_SHIFT
#define WM8962_VMID_BUF_ENA_WIDTH
#define WM8962_VMID_RAMP
#define WM8962_VMID_RAMP_MASK
#define WM8962_VMID_RAMP_SHIFT
#define WM8962_VMID_RAMP_WIDTH

/*
 * R30 (0x1E) - Clocking 3
 */
#define WM8962_DBCLK_DIV_MASK
#define WM8962_DBCLK_DIV_SHIFT
#define WM8962_DBCLK_DIV_WIDTH
#define WM8962_OPCLK_DIV_MASK
#define WM8962_OPCLK_DIV_SHIFT
#define WM8962_OPCLK_DIV_WIDTH
#define WM8962_TOCLK_DIV_MASK
#define WM8962_TOCLK_DIV_SHIFT
#define WM8962_TOCLK_DIV_WIDTH
#define WM8962_F256KCLK_DIV_MASK
#define WM8962_F256KCLK_DIV_SHIFT
#define WM8962_F256KCLK_DIV_WIDTH

/*
 * R31 (0x1F) - Input mixer control (1)
 */
#define WM8962_MIXINL_MUTE
#define WM8962_MIXINL_MUTE_MASK
#define WM8962_MIXINL_MUTE_SHIFT
#define WM8962_MIXINL_MUTE_WIDTH
#define WM8962_MIXINR_MUTE
#define WM8962_MIXINR_MUTE_MASK
#define WM8962_MIXINR_MUTE_SHIFT
#define WM8962_MIXINR_MUTE_WIDTH
#define WM8962_MIXINL_ENA
#define WM8962_MIXINL_ENA_MASK
#define WM8962_MIXINL_ENA_SHIFT
#define WM8962_MIXINL_ENA_WIDTH
#define WM8962_MIXINR_ENA
#define WM8962_MIXINR_ENA_MASK
#define WM8962_MIXINR_ENA_SHIFT
#define WM8962_MIXINR_ENA_WIDTH

/*
 * R32 (0x20) - Left input mixer volume
 */
#define WM8962_IN2L_MIXINL_VOL_MASK
#define WM8962_IN2L_MIXINL_VOL_SHIFT
#define WM8962_IN2L_MIXINL_VOL_WIDTH
#define WM8962_INPGAL_MIXINL_VOL_MASK
#define WM8962_INPGAL_MIXINL_VOL_SHIFT
#define WM8962_INPGAL_MIXINL_VOL_WIDTH
#define WM8962_IN3L_MIXINL_VOL_MASK
#define WM8962_IN3L_MIXINL_VOL_SHIFT
#define WM8962_IN3L_MIXINL_VOL_WIDTH

/*
 * R33 (0x21) - Right input mixer volume
 */
#define WM8962_IN2R_MIXINR_VOL_MASK
#define WM8962_IN2R_MIXINR_VOL_SHIFT
#define WM8962_IN2R_MIXINR_VOL_WIDTH
#define WM8962_INPGAR_MIXINR_VOL_MASK
#define WM8962_INPGAR_MIXINR_VOL_SHIFT
#define WM8962_INPGAR_MIXINR_VOL_WIDTH
#define WM8962_IN3R_MIXINR_VOL_MASK
#define WM8962_IN3R_MIXINR_VOL_SHIFT
#define WM8962_IN3R_MIXINR_VOL_WIDTH

/*
 * R34 (0x22) - Input mixer control (2)
 */
#define WM8962_IN2L_TO_MIXINL
#define WM8962_IN2L_TO_MIXINL_MASK
#define WM8962_IN2L_TO_MIXINL_SHIFT
#define WM8962_IN2L_TO_MIXINL_WIDTH
#define WM8962_IN3L_TO_MIXINL
#define WM8962_IN3L_TO_MIXINL_MASK
#define WM8962_IN3L_TO_MIXINL_SHIFT
#define WM8962_IN3L_TO_MIXINL_WIDTH
#define WM8962_INPGAL_TO_MIXINL
#define WM8962_INPGAL_TO_MIXINL_MASK
#define WM8962_INPGAL_TO_MIXINL_SHIFT
#define WM8962_INPGAL_TO_MIXINL_WIDTH
#define WM8962_IN2R_TO_MIXINR
#define WM8962_IN2R_TO_MIXINR_MASK
#define WM8962_IN2R_TO_MIXINR_SHIFT
#define WM8962_IN2R_TO_MIXINR_WIDTH
#define WM8962_IN3R_TO_MIXINR
#define WM8962_IN3R_TO_MIXINR_MASK
#define WM8962_IN3R_TO_MIXINR_SHIFT
#define WM8962_IN3R_TO_MIXINR_WIDTH
#define WM8962_INPGAR_TO_MIXINR
#define WM8962_INPGAR_TO_MIXINR_MASK
#define WM8962_INPGAR_TO_MIXINR_SHIFT
#define WM8962_INPGAR_TO_MIXINR_WIDTH

/*
 * R35 (0x23) - Input bias control
 */
#define WM8962_MIXIN_BIAS_MASK
#define WM8962_MIXIN_BIAS_SHIFT
#define WM8962_MIXIN_BIAS_WIDTH
#define WM8962_INPGA_BIAS_MASK
#define WM8962_INPGA_BIAS_SHIFT
#define WM8962_INPGA_BIAS_WIDTH

/*
 * R37 (0x25) - Left input PGA control
 */
#define WM8962_INPGAL_ENA
#define WM8962_INPGAL_ENA_MASK
#define WM8962_INPGAL_ENA_SHIFT
#define WM8962_INPGAL_ENA_WIDTH
#define WM8962_IN1L_TO_INPGAL
#define WM8962_IN1L_TO_INPGAL_MASK
#define WM8962_IN1L_TO_INPGAL_SHIFT
#define WM8962_IN1L_TO_INPGAL_WIDTH
#define WM8962_IN2L_TO_INPGAL
#define WM8962_IN2L_TO_INPGAL_MASK
#define WM8962_IN2L_TO_INPGAL_SHIFT
#define WM8962_IN2L_TO_INPGAL_WIDTH
#define WM8962_IN3L_TO_INPGAL
#define WM8962_IN3L_TO_INPGAL_MASK
#define WM8962_IN3L_TO_INPGAL_SHIFT
#define WM8962_IN3L_TO_INPGAL_WIDTH
#define WM8962_IN4L_TO_INPGAL
#define WM8962_IN4L_TO_INPGAL_MASK
#define WM8962_IN4L_TO_INPGAL_SHIFT
#define WM8962_IN4L_TO_INPGAL_WIDTH

/*
 * R38 (0x26) - Right input PGA control
 */
#define WM8962_INPGAR_ENA
#define WM8962_INPGAR_ENA_MASK
#define WM8962_INPGAR_ENA_SHIFT
#define WM8962_INPGAR_ENA_WIDTH
#define WM8962_IN1R_TO_INPGAR
#define WM8962_IN1R_TO_INPGAR_MASK
#define WM8962_IN1R_TO_INPGAR_SHIFT
#define WM8962_IN1R_TO_INPGAR_WIDTH
#define WM8962_IN2R_TO_INPGAR
#define WM8962_IN2R_TO_INPGAR_MASK
#define WM8962_IN2R_TO_INPGAR_SHIFT
#define WM8962_IN2R_TO_INPGAR_WIDTH
#define WM8962_IN3R_TO_INPGAR
#define WM8962_IN3R_TO_INPGAR_MASK
#define WM8962_IN3R_TO_INPGAR_SHIFT
#define WM8962_IN3R_TO_INPGAR_WIDTH
#define WM8962_IN4R_TO_INPGAR
#define WM8962_IN4R_TO_INPGAR_MASK
#define WM8962_IN4R_TO_INPGAR_SHIFT
#define WM8962_IN4R_TO_INPGAR_WIDTH

/*
 * R40 (0x28) - SPKOUTL volume
 */
#define WM8962_SPKOUT_VU
#define WM8962_SPKOUT_VU_MASK
#define WM8962_SPKOUT_VU_SHIFT
#define WM8962_SPKOUT_VU_WIDTH
#define WM8962_SPKOUTL_ZC
#define WM8962_SPKOUTL_ZC_MASK
#define WM8962_SPKOUTL_ZC_SHIFT
#define WM8962_SPKOUTL_ZC_WIDTH
#define WM8962_SPKOUTL_VOL_MASK
#define WM8962_SPKOUTL_VOL_SHIFT
#define WM8962_SPKOUTL_VOL_WIDTH

/*
 * R41 (0x29) - SPKOUTR volume
 */
#define WM8962_SPKOUTR_ZC
#define WM8962_SPKOUTR_ZC_MASK
#define WM8962_SPKOUTR_ZC_SHIFT
#define WM8962_SPKOUTR_ZC_WIDTH
#define WM8962_SPKOUTR_VOL_MASK
#define WM8962_SPKOUTR_VOL_SHIFT
#define WM8962_SPKOUTR_VOL_WIDTH

/*
 * R47 (0x2F) - Thermal Shutdown Status
 */
#define WM8962_TEMP_ERR_HP
#define WM8962_TEMP_ERR_HP_MASK
#define WM8962_TEMP_ERR_HP_SHIFT
#define WM8962_TEMP_ERR_HP_WIDTH
#define WM8962_TEMP_WARN_HP
#define WM8962_TEMP_WARN_HP_MASK
#define WM8962_TEMP_WARN_HP_SHIFT
#define WM8962_TEMP_WARN_HP_WIDTH
#define WM8962_TEMP_ERR_SPK
#define WM8962_TEMP_ERR_SPK_MASK
#define WM8962_TEMP_ERR_SPK_SHIFT
#define WM8962_TEMP_ERR_SPK_WIDTH
#define WM8962_TEMP_WARN_SPK
#define WM8962_TEMP_WARN_SPK_MASK
#define WM8962_TEMP_WARN_SPK_SHIFT
#define WM8962_TEMP_WARN_SPK_WIDTH

/*
 * R48 (0x30) - Additional Control (4)
 */
#define WM8962_MICDET_THR_MASK
#define WM8962_MICDET_THR_SHIFT
#define WM8962_MICDET_THR_WIDTH
#define WM8962_MICSHORT_THR_MASK
#define WM8962_MICSHORT_THR_SHIFT
#define WM8962_MICSHORT_THR_WIDTH
#define WM8962_MICDET_ENA
#define WM8962_MICDET_ENA_MASK
#define WM8962_MICDET_ENA_SHIFT
#define WM8962_MICDET_ENA_WIDTH
#define WM8962_MICDET_STS
#define WM8962_MICDET_STS_MASK
#define WM8962_MICDET_STS_SHIFT
#define WM8962_MICDET_STS_WIDTH
#define WM8962_MICSHORT_STS
#define WM8962_MICSHORT_STS_MASK
#define WM8962_MICSHORT_STS_SHIFT
#define WM8962_MICSHORT_STS_WIDTH
#define WM8962_TEMP_ENA_HP
#define WM8962_TEMP_ENA_HP_MASK
#define WM8962_TEMP_ENA_HP_SHIFT
#define WM8962_TEMP_ENA_HP_WIDTH
#define WM8962_TEMP_ENA_SPK
#define WM8962_TEMP_ENA_SPK_MASK
#define WM8962_TEMP_ENA_SPK_SHIFT
#define WM8962_TEMP_ENA_SPK_WIDTH
#define WM8962_MICBIAS_LVL
#define WM8962_MICBIAS_LVL_MASK
#define WM8962_MICBIAS_LVL_SHIFT
#define WM8962_MICBIAS_LVL_WIDTH

/*
 * R49 (0x31) - Class D Control 1
 */
#define WM8962_SPKOUTR_ENA
#define WM8962_SPKOUTR_ENA_MASK
#define WM8962_SPKOUTR_ENA_SHIFT
#define WM8962_SPKOUTR_ENA_WIDTH
#define WM8962_SPKOUTL_ENA
#define WM8962_SPKOUTL_ENA_MASK
#define WM8962_SPKOUTL_ENA_SHIFT
#define WM8962_SPKOUTL_ENA_WIDTH
#define WM8962_DAC_MUTE_ALT
#define WM8962_DAC_MUTE_ALT_MASK
#define WM8962_DAC_MUTE_ALT_SHIFT
#define WM8962_DAC_MUTE_ALT_WIDTH
#define WM8962_SPKOUTL_PGA_MUTE
#define WM8962_SPKOUTL_PGA_MUTE_MASK
#define WM8962_SPKOUTL_PGA_MUTE_SHIFT
#define WM8962_SPKOUTL_PGA_MUTE_WIDTH
#define WM8962_SPKOUTR_PGA_MUTE
#define WM8962_SPKOUTR_PGA_MUTE_MASK
#define WM8962_SPKOUTR_PGA_MUTE_SHIFT
#define WM8962_SPKOUTR_PGA_MUTE_WIDTH

/*
 * R51 (0x33) - Class D Control 2
 */
#define WM8962_SPK_MONO
#define WM8962_SPK_MONO_MASK
#define WM8962_SPK_MONO_SHIFT
#define WM8962_SPK_MONO_WIDTH
#define WM8962_CLASSD_VOL_MASK
#define WM8962_CLASSD_VOL_SHIFT
#define WM8962_CLASSD_VOL_WIDTH

/*
 * R56 (0x38) - Clocking 4
 */
#define WM8962_SYSCLK_RATE_MASK
#define WM8962_SYSCLK_RATE_SHIFT
#define WM8962_SYSCLK_RATE_WIDTH

/*
 * R57 (0x39) - DAC DSP Mixing (1)
 */
#define WM8962_DAC_MONOMIX
#define WM8962_DAC_MONOMIX_MASK
#define WM8962_DAC_MONOMIX_SHIFT
#define WM8962_DAC_MONOMIX_WIDTH
#define WM8962_ADCR_DAC_SVOL_MASK
#define WM8962_ADCR_DAC_SVOL_SHIFT
#define WM8962_ADCR_DAC_SVOL_WIDTH
#define WM8962_ADC_TO_DACR_MASK
#define WM8962_ADC_TO_DACR_SHIFT
#define WM8962_ADC_TO_DACR_WIDTH

/*
 * R58 (0x3A) - DAC DSP Mixing (2)
 */
#define WM8962_ADCL_DAC_SVOL_MASK
#define WM8962_ADCL_DAC_SVOL_SHIFT
#define WM8962_ADCL_DAC_SVOL_WIDTH
#define WM8962_ADC_TO_DACL_MASK
#define WM8962_ADC_TO_DACL_SHIFT
#define WM8962_ADC_TO_DACL_WIDTH

/*
 * R60 (0x3C) - DC Servo 0
 */
#define WM8962_INL_DCS_ENA
#define WM8962_INL_DCS_ENA_MASK
#define WM8962_INL_DCS_ENA_SHIFT
#define WM8962_INL_DCS_ENA_WIDTH
#define WM8962_INL_DCS_STARTUP
#define WM8962_INL_DCS_STARTUP_MASK
#define WM8962_INL_DCS_STARTUP_SHIFT
#define WM8962_INL_DCS_STARTUP_WIDTH
#define WM8962_INR_DCS_ENA
#define WM8962_INR_DCS_ENA_MASK
#define WM8962_INR_DCS_ENA_SHIFT
#define WM8962_INR_DCS_ENA_WIDTH
#define WM8962_INR_DCS_STARTUP
#define WM8962_INR_DCS_STARTUP_MASK
#define WM8962_INR_DCS_STARTUP_SHIFT
#define WM8962_INR_DCS_STARTUP_WIDTH

/*
 * R61 (0x3D) - DC Servo 1
 */
#define WM8962_HP1L_DCS_ENA
#define WM8962_HP1L_DCS_ENA_MASK
#define WM8962_HP1L_DCS_ENA_SHIFT
#define WM8962_HP1L_DCS_ENA_WIDTH
#define WM8962_HP1L_DCS_STARTUP
#define WM8962_HP1L_DCS_STARTUP_MASK
#define WM8962_HP1L_DCS_STARTUP_SHIFT
#define WM8962_HP1L_DCS_STARTUP_WIDTH
#define WM8962_HP1L_DCS_SYNC
#define WM8962_HP1L_DCS_SYNC_MASK
#define WM8962_HP1L_DCS_SYNC_SHIFT
#define WM8962_HP1L_DCS_SYNC_WIDTH
#define WM8962_HP1R_DCS_ENA
#define WM8962_HP1R_DCS_ENA_MASK
#define WM8962_HP1R_DCS_ENA_SHIFT
#define WM8962_HP1R_DCS_ENA_WIDTH
#define WM8962_HP1R_DCS_STARTUP
#define WM8962_HP1R_DCS_STARTUP_MASK
#define WM8962_HP1R_DCS_STARTUP_SHIFT
#define WM8962_HP1R_DCS_STARTUP_WIDTH
#define WM8962_HP1R_DCS_SYNC
#define WM8962_HP1R_DCS_SYNC_MASK
#define WM8962_HP1R_DCS_SYNC_SHIFT
#define WM8962_HP1R_DCS_SYNC_WIDTH

/*
 * R64 (0x40) - DC Servo 4
 */
#define WM8962_HP1_DCS_SYNC_STEPS_MASK
#define WM8962_HP1_DCS_SYNC_STEPS_SHIFT
#define WM8962_HP1_DCS_SYNC_STEPS_WIDTH

/*
 * R66 (0x42) - DC Servo 6
 */
#define WM8962_DCS_STARTUP_DONE_INL
#define WM8962_DCS_STARTUP_DONE_INL_MASK
#define WM8962_DCS_STARTUP_DONE_INL_SHIFT
#define WM8962_DCS_STARTUP_DONE_INL_WIDTH
#define WM8962_DCS_STARTUP_DONE_INR
#define WM8962_DCS_STARTUP_DONE_INR_MASK
#define WM8962_DCS_STARTUP_DONE_INR_SHIFT
#define WM8962_DCS_STARTUP_DONE_INR_WIDTH
#define WM8962_DCS_STARTUP_DONE_HP1L
#define WM8962_DCS_STARTUP_DONE_HP1L_MASK
#define WM8962_DCS_STARTUP_DONE_HP1L_SHIFT
#define WM8962_DCS_STARTUP_DONE_HP1L_WIDTH
#define WM8962_DCS_STARTUP_DONE_HP1R
#define WM8962_DCS_STARTUP_DONE_HP1R_MASK
#define WM8962_DCS_STARTUP_DONE_HP1R_SHIFT
#define WM8962_DCS_STARTUP_DONE_HP1R_WIDTH

/*
 * R68 (0x44) - Analogue PGA Bias
 */
#define WM8962_HP_PGAS_BIAS_MASK
#define WM8962_HP_PGAS_BIAS_SHIFT
#define WM8962_HP_PGAS_BIAS_WIDTH

/*
 * R69 (0x45) - Analogue HP 0
 */
#define WM8962_HP1L_RMV_SHORT
#define WM8962_HP1L_RMV_SHORT_MASK
#define WM8962_HP1L_RMV_SHORT_SHIFT
#define WM8962_HP1L_RMV_SHORT_WIDTH
#define WM8962_HP1L_ENA_OUTP
#define WM8962_HP1L_ENA_OUTP_MASK
#define WM8962_HP1L_ENA_OUTP_SHIFT
#define WM8962_HP1L_ENA_OUTP_WIDTH
#define WM8962_HP1L_ENA_DLY
#define WM8962_HP1L_ENA_DLY_MASK
#define WM8962_HP1L_ENA_DLY_SHIFT
#define WM8962_HP1L_ENA_DLY_WIDTH
#define WM8962_HP1L_ENA
#define WM8962_HP1L_ENA_MASK
#define WM8962_HP1L_ENA_SHIFT
#define WM8962_HP1L_ENA_WIDTH
#define WM8962_HP1R_RMV_SHORT
#define WM8962_HP1R_RMV_SHORT_MASK
#define WM8962_HP1R_RMV_SHORT_SHIFT
#define WM8962_HP1R_RMV_SHORT_WIDTH
#define WM8962_HP1R_ENA_OUTP
#define WM8962_HP1R_ENA_OUTP_MASK
#define WM8962_HP1R_ENA_OUTP_SHIFT
#define WM8962_HP1R_ENA_OUTP_WIDTH
#define WM8962_HP1R_ENA_DLY
#define WM8962_HP1R_ENA_DLY_MASK
#define WM8962_HP1R_ENA_DLY_SHIFT
#define WM8962_HP1R_ENA_DLY_WIDTH
#define WM8962_HP1R_ENA
#define WM8962_HP1R_ENA_MASK
#define WM8962_HP1R_ENA_SHIFT
#define WM8962_HP1R_ENA_WIDTH

/*
 * R71 (0x47) - Analogue HP 2
 */
#define WM8962_HP1L_VOL_MASK
#define WM8962_HP1L_VOL_SHIFT
#define WM8962_HP1L_VOL_WIDTH
#define WM8962_HP1R_VOL_MASK
#define WM8962_HP1R_VOL_SHIFT
#define WM8962_HP1R_VOL_WIDTH
#define WM8962_HP_BIAS_BOOST_MASK
#define WM8962_HP_BIAS_BOOST_SHIFT
#define WM8962_HP_BIAS_BOOST_WIDTH

/*
 * R72 (0x48) - Charge Pump 1
 */
#define WM8962_CP_ENA
#define WM8962_CP_ENA_MASK
#define WM8962_CP_ENA_SHIFT
#define WM8962_CP_ENA_WIDTH

/*
 * R82 (0x52) - Charge Pump B
 */
#define WM8962_CP_DYN_PWR
#define WM8962_CP_DYN_PWR_MASK
#define WM8962_CP_DYN_PWR_SHIFT
#define WM8962_CP_DYN_PWR_WIDTH

/*
 * R87 (0x57) - Write Sequencer Control 1
 */
#define WM8962_WSEQ_AUTOSEQ_ENA
#define WM8962_WSEQ_AUTOSEQ_ENA_MASK
#define WM8962_WSEQ_AUTOSEQ_ENA_SHIFT
#define WM8962_WSEQ_AUTOSEQ_ENA_WIDTH
#define WM8962_WSEQ_ENA
#define WM8962_WSEQ_ENA_MASK
#define WM8962_WSEQ_ENA_SHIFT
#define WM8962_WSEQ_ENA_WIDTH

/*
 * R90 (0x5A) - Write Sequencer Control 2
 */
#define WM8962_WSEQ_ABORT
#define WM8962_WSEQ_ABORT_MASK
#define WM8962_WSEQ_ABORT_SHIFT
#define WM8962_WSEQ_ABORT_WIDTH
#define WM8962_WSEQ_START
#define WM8962_WSEQ_START_MASK
#define WM8962_WSEQ_START_SHIFT
#define WM8962_WSEQ_START_WIDTH
#define WM8962_WSEQ_START_INDEX_MASK
#define WM8962_WSEQ_START_INDEX_SHIFT
#define WM8962_WSEQ_START_INDEX_WIDTH

/*
 * R93 (0x5D) - Write Sequencer Control 3
 */
#define WM8962_WSEQ_CURRENT_INDEX_MASK
#define WM8962_WSEQ_CURRENT_INDEX_SHIFT
#define WM8962_WSEQ_CURRENT_INDEX_WIDTH
#define WM8962_WSEQ_BUSY
#define WM8962_WSEQ_BUSY_MASK
#define WM8962_WSEQ_BUSY_SHIFT
#define WM8962_WSEQ_BUSY_WIDTH

/*
 * R94 (0x5E) - Control Interface
 */
#define WM8962_SPI_CONTRD
#define WM8962_SPI_CONTRD_MASK
#define WM8962_SPI_CONTRD_SHIFT
#define WM8962_SPI_CONTRD_WIDTH
#define WM8962_SPI_4WIRE
#define WM8962_SPI_4WIRE_MASK
#define WM8962_SPI_4WIRE_SHIFT
#define WM8962_SPI_4WIRE_WIDTH
#define WM8962_SPI_CFG
#define WM8962_SPI_CFG_MASK
#define WM8962_SPI_CFG_SHIFT
#define WM8962_SPI_CFG_WIDTH

/*
 * R99 (0x63) - Mixer Enables
 */
#define WM8962_HPMIXL_ENA
#define WM8962_HPMIXL_ENA_MASK
#define WM8962_HPMIXL_ENA_SHIFT
#define WM8962_HPMIXL_ENA_WIDTH
#define WM8962_HPMIXR_ENA
#define WM8962_HPMIXR_ENA_MASK
#define WM8962_HPMIXR_ENA_SHIFT
#define WM8962_HPMIXR_ENA_WIDTH
#define WM8962_SPKMIXL_ENA
#define WM8962_SPKMIXL_ENA_MASK
#define WM8962_SPKMIXL_ENA_SHIFT
#define WM8962_SPKMIXL_ENA_WIDTH
#define WM8962_SPKMIXR_ENA
#define WM8962_SPKMIXR_ENA_MASK
#define WM8962_SPKMIXR_ENA_SHIFT
#define WM8962_SPKMIXR_ENA_WIDTH

/*
 * R100 (0x64) - Headphone Mixer (1)
 */
#define WM8962_HPMIXL_TO_HPOUTL_PGA
#define WM8962_HPMIXL_TO_HPOUTL_PGA_MASK
#define WM8962_HPMIXL_TO_HPOUTL_PGA_SHIFT
#define WM8962_HPMIXL_TO_HPOUTL_PGA_WIDTH
#define WM8962_DACL_TO_HPMIXL
#define WM8962_DACL_TO_HPMIXL_MASK
#define WM8962_DACL_TO_HPMIXL_SHIFT
#define WM8962_DACL_TO_HPMIXL_WIDTH
#define WM8962_DACR_TO_HPMIXL
#define WM8962_DACR_TO_HPMIXL_MASK
#define WM8962_DACR_TO_HPMIXL_SHIFT
#define WM8962_DACR_TO_HPMIXL_WIDTH
#define WM8962_MIXINL_TO_HPMIXL
#define WM8962_MIXINL_TO_HPMIXL_MASK
#define WM8962_MIXINL_TO_HPMIXL_SHIFT
#define WM8962_MIXINL_TO_HPMIXL_WIDTH
#define WM8962_MIXINR_TO_HPMIXL
#define WM8962_MIXINR_TO_HPMIXL_MASK
#define WM8962_MIXINR_TO_HPMIXL_SHIFT
#define WM8962_MIXINR_TO_HPMIXL_WIDTH
#define WM8962_IN4L_TO_HPMIXL
#define WM8962_IN4L_TO_HPMIXL_MASK
#define WM8962_IN4L_TO_HPMIXL_SHIFT
#define WM8962_IN4L_TO_HPMIXL_WIDTH
#define WM8962_IN4R_TO_HPMIXL
#define WM8962_IN4R_TO_HPMIXL_MASK
#define WM8962_IN4R_TO_HPMIXL_SHIFT
#define WM8962_IN4R_TO_HPMIXL_WIDTH

/*
 * R101 (0x65) - Headphone Mixer (2)
 */
#define WM8962_HPMIXR_TO_HPOUTR_PGA
#define WM8962_HPMIXR_TO_HPOUTR_PGA_MASK
#define WM8962_HPMIXR_TO_HPOUTR_PGA_SHIFT
#define WM8962_HPMIXR_TO_HPOUTR_PGA_WIDTH
#define WM8962_DACL_TO_HPMIXR
#define WM8962_DACL_TO_HPMIXR_MASK
#define WM8962_DACL_TO_HPMIXR_SHIFT
#define WM8962_DACL_TO_HPMIXR_WIDTH
#define WM8962_DACR_TO_HPMIXR
#define WM8962_DACR_TO_HPMIXR_MASK
#define WM8962_DACR_TO_HPMIXR_SHIFT
#define WM8962_DACR_TO_HPMIXR_WIDTH
#define WM8962_MIXINL_TO_HPMIXR
#define WM8962_MIXINL_TO_HPMIXR_MASK
#define WM8962_MIXINL_TO_HPMIXR_SHIFT
#define WM8962_MIXINL_TO_HPMIXR_WIDTH
#define WM8962_MIXINR_TO_HPMIXR
#define WM8962_MIXINR_TO_HPMIXR_MASK
#define WM8962_MIXINR_TO_HPMIXR_SHIFT
#define WM8962_MIXINR_TO_HPMIXR_WIDTH
#define WM8962_IN4L_TO_HPMIXR
#define WM8962_IN4L_TO_HPMIXR_MASK
#define WM8962_IN4L_TO_HPMIXR_SHIFT
#define WM8962_IN4L_TO_HPMIXR_WIDTH
#define WM8962_IN4R_TO_HPMIXR
#define WM8962_IN4R_TO_HPMIXR_MASK
#define WM8962_IN4R_TO_HPMIXR_SHIFT
#define WM8962_IN4R_TO_HPMIXR_WIDTH

/*
 * R102 (0x66) - Headphone Mixer (3)
 */
#define WM8962_HPMIXL_MUTE
#define WM8962_HPMIXL_MUTE_MASK
#define WM8962_HPMIXL_MUTE_SHIFT
#define WM8962_HPMIXL_MUTE_WIDTH
#define WM8962_MIXINL_HPMIXL_VOL
#define WM8962_MIXINL_HPMIXL_VOL_MASK
#define WM8962_MIXINL_HPMIXL_VOL_SHIFT
#define WM8962_MIXINL_HPMIXL_VOL_WIDTH
#define WM8962_MIXINR_HPMIXL_VOL
#define WM8962_MIXINR_HPMIXL_VOL_MASK
#define WM8962_MIXINR_HPMIXL_VOL_SHIFT
#define WM8962_MIXINR_HPMIXL_VOL_WIDTH
#define WM8962_IN4L_HPMIXL_VOL_MASK
#define WM8962_IN4L_HPMIXL_VOL_SHIFT
#define WM8962_IN4L_HPMIXL_VOL_WIDTH
#define WM8962_IN4R_HPMIXL_VOL_MASK
#define WM8962_IN4R_HPMIXL_VOL_SHIFT
#define WM8962_IN4R_HPMIXL_VOL_WIDTH

/*
 * R103 (0x67) - Headphone Mixer (4)
 */
#define WM8962_HPMIXR_MUTE
#define WM8962_HPMIXR_MUTE_MASK
#define WM8962_HPMIXR_MUTE_SHIFT
#define WM8962_HPMIXR_MUTE_WIDTH
#define WM8962_MIXINL_HPMIXR_VOL
#define WM8962_MIXINL_HPMIXR_VOL_MASK
#define WM8962_MIXINL_HPMIXR_VOL_SHIFT
#define WM8962_MIXINL_HPMIXR_VOL_WIDTH
#define WM8962_MIXINR_HPMIXR_VOL
#define WM8962_MIXINR_HPMIXR_VOL_MASK
#define WM8962_MIXINR_HPMIXR_VOL_SHIFT
#define WM8962_MIXINR_HPMIXR_VOL_WIDTH
#define WM8962_IN4L_HPMIXR_VOL_MASK
#define WM8962_IN4L_HPMIXR_VOL_SHIFT
#define WM8962_IN4L_HPMIXR_VOL_WIDTH
#define WM8962_IN4R_HPMIXR_VOL_MASK
#define WM8962_IN4R_HPMIXR_VOL_SHIFT
#define WM8962_IN4R_HPMIXR_VOL_WIDTH

/*
 * R105 (0x69) - Speaker Mixer (1)
 */
#define WM8962_SPKMIXL_TO_SPKOUTL_PGA
#define WM8962_SPKMIXL_TO_SPKOUTL_PGA_MASK
#define WM8962_SPKMIXL_TO_SPKOUTL_PGA_SHIFT
#define WM8962_SPKMIXL_TO_SPKOUTL_PGA_WIDTH
#define WM8962_DACL_TO_SPKMIXL
#define WM8962_DACL_TO_SPKMIXL_MASK
#define WM8962_DACL_TO_SPKMIXL_SHIFT
#define WM8962_DACL_TO_SPKMIXL_WIDTH
#define WM8962_DACR_TO_SPKMIXL
#define WM8962_DACR_TO_SPKMIXL_MASK
#define WM8962_DACR_TO_SPKMIXL_SHIFT
#define WM8962_DACR_TO_SPKMIXL_WIDTH
#define WM8962_MIXINL_TO_SPKMIXL
#define WM8962_MIXINL_TO_SPKMIXL_MASK
#define WM8962_MIXINL_TO_SPKMIXL_SHIFT
#define WM8962_MIXINL_TO_SPKMIXL_WIDTH
#define WM8962_MIXINR_TO_SPKMIXL
#define WM8962_MIXINR_TO_SPKMIXL_MASK
#define WM8962_MIXINR_TO_SPKMIXL_SHIFT
#define WM8962_MIXINR_TO_SPKMIXL_WIDTH
#define WM8962_IN4L_TO_SPKMIXL
#define WM8962_IN4L_TO_SPKMIXL_MASK
#define WM8962_IN4L_TO_SPKMIXL_SHIFT
#define WM8962_IN4L_TO_SPKMIXL_WIDTH
#define WM8962_IN4R_TO_SPKMIXL
#define WM8962_IN4R_TO_SPKMIXL_MASK
#define WM8962_IN4R_TO_SPKMIXL_SHIFT
#define WM8962_IN4R_TO_SPKMIXL_WIDTH

/*
 * R106 (0x6A) - Speaker Mixer (2)
 */
#define WM8962_SPKMIXR_TO_SPKOUTR_PGA
#define WM8962_SPKMIXR_TO_SPKOUTR_PGA_MASK
#define WM8962_SPKMIXR_TO_SPKOUTR_PGA_SHIFT
#define WM8962_SPKMIXR_TO_SPKOUTR_PGA_WIDTH
#define WM8962_DACL_TO_SPKMIXR
#define WM8962_DACL_TO_SPKMIXR_MASK
#define WM8962_DACL_TO_SPKMIXR_SHIFT
#define WM8962_DACL_TO_SPKMIXR_WIDTH
#define WM8962_DACR_TO_SPKMIXR
#define WM8962_DACR_TO_SPKMIXR_MASK
#define WM8962_DACR_TO_SPKMIXR_SHIFT
#define WM8962_DACR_TO_SPKMIXR_WIDTH
#define WM8962_MIXINL_TO_SPKMIXR
#define WM8962_MIXINL_TO_SPKMIXR_MASK
#define WM8962_MIXINL_TO_SPKMIXR_SHIFT
#define WM8962_MIXINL_TO_SPKMIXR_WIDTH
#define WM8962_MIXINR_TO_SPKMIXR
#define WM8962_MIXINR_TO_SPKMIXR_MASK
#define WM8962_MIXINR_TO_SPKMIXR_SHIFT
#define WM8962_MIXINR_TO_SPKMIXR_WIDTH
#define WM8962_IN4L_TO_SPKMIXR
#define WM8962_IN4L_TO_SPKMIXR_MASK
#define WM8962_IN4L_TO_SPKMIXR_SHIFT
#define WM8962_IN4L_TO_SPKMIXR_WIDTH
#define WM8962_IN4R_TO_SPKMIXR
#define WM8962_IN4R_TO_SPKMIXR_MASK
#define WM8962_IN4R_TO_SPKMIXR_SHIFT
#define WM8962_IN4R_TO_SPKMIXR_WIDTH

/*
 * R107 (0x6B) - Speaker Mixer (3)
 */
#define WM8962_SPKMIXL_MUTE
#define WM8962_SPKMIXL_MUTE_MASK
#define WM8962_SPKMIXL_MUTE_SHIFT
#define WM8962_SPKMIXL_MUTE_WIDTH
#define WM8962_MIXINL_SPKMIXL_VOL
#define WM8962_MIXINL_SPKMIXL_VOL_MASK
#define WM8962_MIXINL_SPKMIXL_VOL_SHIFT
#define WM8962_MIXINL_SPKMIXL_VOL_WIDTH
#define WM8962_MIXINR_SPKMIXL_VOL
#define WM8962_MIXINR_SPKMIXL_VOL_MASK
#define WM8962_MIXINR_SPKMIXL_VOL_SHIFT
#define WM8962_MIXINR_SPKMIXL_VOL_WIDTH
#define WM8962_IN4L_SPKMIXL_VOL_MASK
#define WM8962_IN4L_SPKMIXL_VOL_SHIFT
#define WM8962_IN4L_SPKMIXL_VOL_WIDTH
#define WM8962_IN4R_SPKMIXL_VOL_MASK
#define WM8962_IN4R_SPKMIXL_VOL_SHIFT
#define WM8962_IN4R_SPKMIXL_VOL_WIDTH

/*
 * R108 (0x6C) - Speaker Mixer (4)
 */
#define WM8962_SPKMIXR_MUTE
#define WM8962_SPKMIXR_MUTE_MASK
#define WM8962_SPKMIXR_MUTE_SHIFT
#define WM8962_SPKMIXR_MUTE_WIDTH
#define WM8962_MIXINL_SPKMIXR_VOL
#define WM8962_MIXINL_SPKMIXR_VOL_MASK
#define WM8962_MIXINL_SPKMIXR_VOL_SHIFT
#define WM8962_MIXINL_SPKMIXR_VOL_WIDTH
#define WM8962_MIXINR_SPKMIXR_VOL
#define WM8962_MIXINR_SPKMIXR_VOL_MASK
#define WM8962_MIXINR_SPKMIXR_VOL_SHIFT
#define WM8962_MIXINR_SPKMIXR_VOL_WIDTH
#define WM8962_IN4L_SPKMIXR_VOL_MASK
#define WM8962_IN4L_SPKMIXR_VOL_SHIFT
#define WM8962_IN4L_SPKMIXR_VOL_WIDTH
#define WM8962_IN4R_SPKMIXR_VOL_MASK
#define WM8962_IN4R_SPKMIXR_VOL_SHIFT
#define WM8962_IN4R_SPKMIXR_VOL_WIDTH

/*
 * R109 (0x6D) - Speaker Mixer (5)
 */
#define WM8962_DACL_SPKMIXL_VOL
#define WM8962_DACL_SPKMIXL_VOL_MASK
#define WM8962_DACL_SPKMIXL_VOL_SHIFT
#define WM8962_DACL_SPKMIXL_VOL_WIDTH
#define WM8962_DACR_SPKMIXL_VOL
#define WM8962_DACR_SPKMIXL_VOL_MASK
#define WM8962_DACR_SPKMIXL_VOL_SHIFT
#define WM8962_DACR_SPKMIXL_VOL_WIDTH
#define WM8962_DACL_SPKMIXR_VOL
#define WM8962_DACL_SPKMIXR_VOL_MASK
#define WM8962_DACL_SPKMIXR_VOL_SHIFT
#define WM8962_DACL_SPKMIXR_VOL_WIDTH
#define WM8962_DACR_SPKMIXR_VOL
#define WM8962_DACR_SPKMIXR_VOL_MASK
#define WM8962_DACR_SPKMIXR_VOL_SHIFT
#define WM8962_DACR_SPKMIXR_VOL_WIDTH

/*
 * R110 (0x6E) - Beep Generator (1)
 */
#define WM8962_BEEP_GAIN_MASK
#define WM8962_BEEP_GAIN_SHIFT
#define WM8962_BEEP_GAIN_WIDTH
#define WM8962_BEEP_RATE_MASK
#define WM8962_BEEP_RATE_SHIFT
#define WM8962_BEEP_RATE_WIDTH
#define WM8962_BEEP_ENA
#define WM8962_BEEP_ENA_MASK
#define WM8962_BEEP_ENA_SHIFT
#define WM8962_BEEP_ENA_WIDTH

/*
 * R115 (0x73) - Oscillator Trim (3)
 */
#define WM8962_OSC_TRIM_XTI_MASK
#define WM8962_OSC_TRIM_XTI_SHIFT
#define WM8962_OSC_TRIM_XTI_WIDTH

/*
 * R116 (0x74) - Oscillator Trim (4)
 */
#define WM8962_OSC_TRIM_XTO_MASK
#define WM8962_OSC_TRIM_XTO_SHIFT
#define WM8962_OSC_TRIM_XTO_WIDTH

/*
 * R119 (0x77) - Oscillator Trim (7)
 */
#define WM8962_XTO_CAP_SEL_MASK
#define WM8962_XTO_CAP_SEL_SHIFT
#define WM8962_XTO_CAP_SEL_WIDTH
#define WM8962_XTI_CAP_SEL_MASK
#define WM8962_XTI_CAP_SEL_SHIFT
#define WM8962_XTI_CAP_SEL_WIDTH

/*
 * R124 (0x7C) - Analogue Clocking1
 */
#define WM8962_CLKOUT2_SEL_MASK
#define WM8962_CLKOUT2_SEL_SHIFT
#define WM8962_CLKOUT2_SEL_WIDTH
#define WM8962_CLKOUT3_SEL_MASK
#define WM8962_CLKOUT3_SEL_SHIFT
#define WM8962_CLKOUT3_SEL_WIDTH
#define WM8962_CLKOUT5_SEL
#define WM8962_CLKOUT5_SEL_MASK
#define WM8962_CLKOUT5_SEL_SHIFT
#define WM8962_CLKOUT5_SEL_WIDTH

/*
 * R125 (0x7D) - Analogue Clocking2
 */
#define WM8962_PLL2_OUTDIV
#define WM8962_PLL2_OUTDIV_MASK
#define WM8962_PLL2_OUTDIV_SHIFT
#define WM8962_PLL2_OUTDIV_WIDTH
#define WM8962_PLL3_OUTDIV
#define WM8962_PLL3_OUTDIV_MASK
#define WM8962_PLL3_OUTDIV_SHIFT
#define WM8962_PLL3_OUTDIV_WIDTH
#define WM8962_PLL_SYSCLK_DIV_MASK
#define WM8962_PLL_SYSCLK_DIV_SHIFT
#define WM8962_PLL_SYSCLK_DIV_WIDTH
#define WM8962_CLKOUT3_DIV
#define WM8962_CLKOUT3_DIV_MASK
#define WM8962_CLKOUT3_DIV_SHIFT
#define WM8962_CLKOUT3_DIV_WIDTH
#define WM8962_CLKOUT2_DIV
#define WM8962_CLKOUT2_DIV_MASK
#define WM8962_CLKOUT2_DIV_SHIFT
#define WM8962_CLKOUT2_DIV_WIDTH
#define WM8962_CLKOUT5_DIV
#define WM8962_CLKOUT5_DIV_MASK
#define WM8962_CLKOUT5_DIV_SHIFT
#define WM8962_CLKOUT5_DIV_WIDTH

/*
 * R126 (0x7E) - Analogue Clocking3
 */
#define WM8962_CLKOUT2_OE
#define WM8962_CLKOUT2_OE_MASK
#define WM8962_CLKOUT2_OE_SHIFT
#define WM8962_CLKOUT2_OE_WIDTH
#define WM8962_CLKOUT3_OE
#define WM8962_CLKOUT3_OE_MASK
#define WM8962_CLKOUT3_OE_SHIFT
#define WM8962_CLKOUT3_OE_WIDTH
#define WM8962_CLKOUT5_OE
#define WM8962_CLKOUT5_OE_MASK
#define WM8962_CLKOUT5_OE_SHIFT
#define WM8962_CLKOUT5_OE_WIDTH

/*
 * R127 (0x7F) - PLL Software Reset
 */
#define WM8962_SW_RESET_PLL_MASK
#define WM8962_SW_RESET_PLL_SHIFT
#define WM8962_SW_RESET_PLL_WIDTH

/*
 * R129 (0x81) - PLL2
 */
#define WM8962_OSC_ENA
#define WM8962_OSC_ENA_MASK
#define WM8962_OSC_ENA_SHIFT
#define WM8962_OSC_ENA_WIDTH
#define WM8962_PLL2_ENA
#define WM8962_PLL2_ENA_MASK
#define WM8962_PLL2_ENA_SHIFT
#define WM8962_PLL2_ENA_WIDTH
#define WM8962_PLL3_ENA
#define WM8962_PLL3_ENA_MASK
#define WM8962_PLL3_ENA_SHIFT
#define WM8962_PLL3_ENA_WIDTH

/*
 * R131 (0x83) - PLL 4
 */
#define WM8962_PLL_CLK_SRC
#define WM8962_PLL_CLK_SRC_MASK
#define WM8962_PLL_CLK_SRC_SHIFT
#define WM8962_PLL_CLK_SRC_WIDTH
#define WM8962_FLL_TO_PLL3
#define WM8962_FLL_TO_PLL3_MASK
#define WM8962_FLL_TO_PLL3_SHIFT
#define WM8962_FLL_TO_PLL3_WIDTH

/*
 * R136 (0x88) - PLL 9
 */
#define WM8962_PLL2_FRAC
#define WM8962_PLL2_FRAC_MASK
#define WM8962_PLL2_FRAC_SHIFT
#define WM8962_PLL2_FRAC_WIDTH
#define WM8962_PLL2_N_MASK
#define WM8962_PLL2_N_SHIFT
#define WM8962_PLL2_N_WIDTH

/*
 * R137 (0x89) - PLL 10
 */
#define WM8962_PLL2_K_MASK
#define WM8962_PLL2_K_SHIFT
#define WM8962_PLL2_K_WIDTH

/*
 * R138 (0x8A) - PLL 11
 */
#define WM8962_PLL2_K_MASK
#define WM8962_PLL2_K_SHIFT
#define WM8962_PLL2_K_WIDTH

/*
 * R139 (0x8B) - PLL 12
 */
#define WM8962_PLL2_K_MASK
#define WM8962_PLL2_K_SHIFT
#define WM8962_PLL2_K_WIDTH

/*
 * R140 (0x8C) - PLL 13
 */
#define WM8962_PLL3_FRAC
#define WM8962_PLL3_FRAC_MASK
#define WM8962_PLL3_FRAC_SHIFT
#define WM8962_PLL3_FRAC_WIDTH
#define WM8962_PLL3_N_MASK
#define WM8962_PLL3_N_SHIFT
#define WM8962_PLL3_N_WIDTH

/*
 * R141 (0x8D) - PLL 14
 */
#define WM8962_PLL3_K_MASK
#define WM8962_PLL3_K_SHIFT
#define WM8962_PLL3_K_WIDTH

/*
 * R142 (0x8E) - PLL 15
 */
#define WM8962_PLL3_K_MASK
#define WM8962_PLL3_K_SHIFT
#define WM8962_PLL3_K_WIDTH

/*
 * R143 (0x8F) - PLL 16
 */
#define WM8962_PLL3_K_MASK
#define WM8962_PLL3_K_SHIFT
#define WM8962_PLL3_K_WIDTH

/*
 * R155 (0x9B) - FLL Control (1)
 */
#define WM8962_FLL_REFCLK_SRC_MASK
#define WM8962_FLL_REFCLK_SRC_SHIFT
#define WM8962_FLL_REFCLK_SRC_WIDTH
#define WM8962_FLL_FRAC
#define WM8962_FLL_FRAC_MASK
#define WM8962_FLL_FRAC_SHIFT
#define WM8962_FLL_FRAC_WIDTH
#define WM8962_FLL_OSC_ENA
#define WM8962_FLL_OSC_ENA_MASK
#define WM8962_FLL_OSC_ENA_SHIFT
#define WM8962_FLL_OSC_ENA_WIDTH
#define WM8962_FLL_ENA
#define WM8962_FLL_ENA_MASK
#define WM8962_FLL_ENA_SHIFT
#define WM8962_FLL_ENA_WIDTH

/*
 * R156 (0x9C) - FLL Control (2)
 */
#define WM8962_FLL_OUTDIV_MASK
#define WM8962_FLL_OUTDIV_SHIFT
#define WM8962_FLL_OUTDIV_WIDTH
#define WM8962_FLL_REFCLK_DIV_MASK
#define WM8962_FLL_REFCLK_DIV_SHIFT
#define WM8962_FLL_REFCLK_DIV_WIDTH

/*
 * R157 (0x9D) - FLL Control (3)
 */
#define WM8962_FLL_FRATIO_MASK
#define WM8962_FLL_FRATIO_SHIFT
#define WM8962_FLL_FRATIO_WIDTH

/*
 * R159 (0x9F) - FLL Control (5)
 */
#define WM8962_FLL_FRC_NCO_VAL_MASK
#define WM8962_FLL_FRC_NCO_VAL_SHIFT
#define WM8962_FLL_FRC_NCO_VAL_WIDTH
#define WM8962_FLL_FRC_NCO
#define WM8962_FLL_FRC_NCO_MASK
#define WM8962_FLL_FRC_NCO_SHIFT
#define WM8962_FLL_FRC_NCO_WIDTH

/*
 * R160 (0xA0) - FLL Control (6)
 */
#define WM8962_FLL_THETA_MASK
#define WM8962_FLL_THETA_SHIFT
#define WM8962_FLL_THETA_WIDTH

/*
 * R161 (0xA1) - FLL Control (7)
 */
#define WM8962_FLL_LAMBDA_MASK
#define WM8962_FLL_LAMBDA_SHIFT
#define WM8962_FLL_LAMBDA_WIDTH

/*
 * R162 (0xA2) - FLL Control (8)
 */
#define WM8962_FLL_N_MASK
#define WM8962_FLL_N_SHIFT
#define WM8962_FLL_N_WIDTH

/*
 * R252 (0xFC) - General test 1
 */
#define WM8962_REG_SYNC
#define WM8962_REG_SYNC_MASK
#define WM8962_REG_SYNC_SHIFT
#define WM8962_REG_SYNC_WIDTH
#define WM8962_AUTO_INC
#define WM8962_AUTO_INC_MASK
#define WM8962_AUTO_INC_SHIFT
#define WM8962_AUTO_INC_WIDTH

/*
 * R256 (0x100) - DF1
 */
#define WM8962_DRC_DF1_ENA
#define WM8962_DRC_DF1_ENA_MASK
#define WM8962_DRC_DF1_ENA_SHIFT
#define WM8962_DRC_DF1_ENA_WIDTH
#define WM8962_DF1_SHARED_COEFF
#define WM8962_DF1_SHARED_COEFF_MASK
#define WM8962_DF1_SHARED_COEFF_SHIFT
#define WM8962_DF1_SHARED_COEFF_WIDTH
#define WM8962_DF1_SHARED_COEFF_SEL
#define WM8962_DF1_SHARED_COEFF_SEL_MASK
#define WM8962_DF1_SHARED_COEFF_SEL_SHIFT
#define WM8962_DF1_SHARED_COEFF_SEL_WIDTH
#define WM8962_DF1_ENA
#define WM8962_DF1_ENA_MASK
#define WM8962_DF1_ENA_SHIFT
#define WM8962_DF1_ENA_WIDTH

/*
 * R257 (0x101) - DF2
 */
#define WM8962_DF1_COEFF_L0_MASK
#define WM8962_DF1_COEFF_L0_SHIFT
#define WM8962_DF1_COEFF_L0_WIDTH

/*
 * R258 (0x102) - DF3
 */
#define WM8962_DF1_COEFF_L1_MASK
#define WM8962_DF1_COEFF_L1_SHIFT
#define WM8962_DF1_COEFF_L1_WIDTH

/*
 * R259 (0x103) - DF4
 */
#define WM8962_DF1_COEFF_L2_MASK
#define WM8962_DF1_COEFF_L2_SHIFT
#define WM8962_DF1_COEFF_L2_WIDTH

/*
 * R260 (0x104) - DF5
 */
#define WM8962_DF1_COEFF_R0_MASK
#define WM8962_DF1_COEFF_R0_SHIFT
#define WM8962_DF1_COEFF_R0_WIDTH

/*
 * R261 (0x105) - DF6
 */
#define WM8962_DF1_COEFF_R1_MASK
#define WM8962_DF1_COEFF_R1_SHIFT
#define WM8962_DF1_COEFF_R1_WIDTH

/*
 * R262 (0x106) - DF7
 */
#define WM8962_DF1_COEFF_R2_MASK
#define WM8962_DF1_COEFF_R2_SHIFT
#define WM8962_DF1_COEFF_R2_WIDTH

/*
 * R264 (0x108) - LHPF1
 */
#define WM8962_LHPF_MODE
#define WM8962_LHPF_MODE_MASK
#define WM8962_LHPF_MODE_SHIFT
#define WM8962_LHPF_MODE_WIDTH
#define WM8962_LHPF_ENA
#define WM8962_LHPF_ENA_MASK
#define WM8962_LHPF_ENA_SHIFT
#define WM8962_LHPF_ENA_WIDTH

/*
 * R265 (0x109) - LHPF2
 */
#define WM8962_LHPF_COEFF_MASK
#define WM8962_LHPF_COEFF_SHIFT
#define WM8962_LHPF_COEFF_WIDTH

/*
 * R268 (0x10C) - THREED1
 */
#define WM8962_ADC_MONOMIX
#define WM8962_ADC_MONOMIX_MASK
#define WM8962_ADC_MONOMIX_SHIFT
#define WM8962_ADC_MONOMIX_WIDTH
#define WM8962_THREED_SIGN_L
#define WM8962_THREED_SIGN_L_MASK
#define WM8962_THREED_SIGN_L_SHIFT
#define WM8962_THREED_SIGN_L_WIDTH
#define WM8962_THREED_SIGN_R
#define WM8962_THREED_SIGN_R_MASK
#define WM8962_THREED_SIGN_R_SHIFT
#define WM8962_THREED_SIGN_R_WIDTH
#define WM8962_THREED_LHPF_MODE
#define WM8962_THREED_LHPF_MODE_MASK
#define WM8962_THREED_LHPF_MODE_SHIFT
#define WM8962_THREED_LHPF_MODE_WIDTH
#define WM8962_THREED_LHPF_ENA
#define WM8962_THREED_LHPF_ENA_MASK
#define WM8962_THREED_LHPF_ENA_SHIFT
#define WM8962_THREED_LHPF_ENA_WIDTH
#define WM8962_THREED_ENA
#define WM8962_THREED_ENA_MASK
#define WM8962_THREED_ENA_SHIFT
#define WM8962_THREED_ENA_WIDTH

/*
 * R269 (0x10D) - THREED2
 */
#define WM8962_THREED_FGAINL_MASK
#define WM8962_THREED_FGAINL_SHIFT
#define WM8962_THREED_FGAINL_WIDTH
#define WM8962_THREED_CGAINL_MASK
#define WM8962_THREED_CGAINL_SHIFT
#define WM8962_THREED_CGAINL_WIDTH
#define WM8962_THREED_DELAYL_MASK
#define WM8962_THREED_DELAYL_SHIFT
#define WM8962_THREED_DELAYL_WIDTH

/*
 * R270 (0x10E) - THREED3
 */
#define WM8962_THREED_LHPF_COEFF_MASK
#define WM8962_THREED_LHPF_COEFF_SHIFT
#define WM8962_THREED_LHPF_COEFF_WIDTH

/*
 * R271 (0x10F) - THREED4
 */
#define WM8962_THREED_FGAINR_MASK
#define WM8962_THREED_FGAINR_SHIFT
#define WM8962_THREED_FGAINR_WIDTH
#define WM8962_THREED_CGAINR_MASK
#define WM8962_THREED_CGAINR_SHIFT
#define WM8962_THREED_CGAINR_WIDTH
#define WM8962_THREED_DELAYR_MASK
#define WM8962_THREED_DELAYR_SHIFT
#define WM8962_THREED_DELAYR_WIDTH

/*
 * R276 (0x114) - DRC 1
 */
#define WM8962_DRC_SIG_DET_RMS_MASK
#define WM8962_DRC_SIG_DET_RMS_SHIFT
#define WM8962_DRC_SIG_DET_RMS_WIDTH
#define WM8962_DRC_SIG_DET_PK_MASK
#define WM8962_DRC_SIG_DET_PK_SHIFT
#define WM8962_DRC_SIG_DET_PK_WIDTH
#define WM8962_DRC_NG_ENA
#define WM8962_DRC_NG_ENA_MASK
#define WM8962_DRC_NG_ENA_SHIFT
#define WM8962_DRC_NG_ENA_WIDTH
#define WM8962_DRC_SIG_DET_MODE
#define WM8962_DRC_SIG_DET_MODE_MASK
#define WM8962_DRC_SIG_DET_MODE_SHIFT
#define WM8962_DRC_SIG_DET_MODE_WIDTH
#define WM8962_DRC_SIG_DET
#define WM8962_DRC_SIG_DET_MASK
#define WM8962_DRC_SIG_DET_SHIFT
#define WM8962_DRC_SIG_DET_WIDTH
#define WM8962_DRC_KNEE2_OP_ENA
#define WM8962_DRC_KNEE2_OP_ENA_MASK
#define WM8962_DRC_KNEE2_OP_ENA_SHIFT
#define WM8962_DRC_KNEE2_OP_ENA_WIDTH
#define WM8962_DRC_QR
#define WM8962_DRC_QR_MASK
#define WM8962_DRC_QR_SHIFT
#define WM8962_DRC_QR_WIDTH
#define WM8962_DRC_ANTICLIP
#define WM8962_DRC_ANTICLIP_MASK
#define WM8962_DRC_ANTICLIP_SHIFT
#define WM8962_DRC_ANTICLIP_WIDTH
#define WM8962_DRC_MODE
#define WM8962_DRC_MODE_MASK
#define WM8962_DRC_MODE_SHIFT
#define WM8962_DRC_MODE_WIDTH
#define WM8962_DRC_ENA
#define WM8962_DRC_ENA_MASK
#define WM8962_DRC_ENA_SHIFT
#define WM8962_DRC_ENA_WIDTH

/*
 * R277 (0x115) - DRC 2
 */
#define WM8962_DRC_ATK_MASK
#define WM8962_DRC_ATK_SHIFT
#define WM8962_DRC_ATK_WIDTH
#define WM8962_DRC_DCY_MASK
#define WM8962_DRC_DCY_SHIFT
#define WM8962_DRC_DCY_WIDTH
#define WM8962_DRC_MINGAIN_MASK
#define WM8962_DRC_MINGAIN_SHIFT
#define WM8962_DRC_MINGAIN_WIDTH
#define WM8962_DRC_MAXGAIN_MASK
#define WM8962_DRC_MAXGAIN_SHIFT
#define WM8962_DRC_MAXGAIN_WIDTH

/*
 * R278 (0x116) - DRC 3
 */
#define WM8962_DRC_NG_MINGAIN_MASK
#define WM8962_DRC_NG_MINGAIN_SHIFT
#define WM8962_DRC_NG_MINGAIN_WIDTH
#define WM8962_DRC_QR_THR_MASK
#define WM8962_DRC_QR_THR_SHIFT
#define WM8962_DRC_QR_THR_WIDTH
#define WM8962_DRC_QR_DCY_MASK
#define WM8962_DRC_QR_DCY_SHIFT
#define WM8962_DRC_QR_DCY_WIDTH
#define WM8962_DRC_NG_EXP_MASK
#define WM8962_DRC_NG_EXP_SHIFT
#define WM8962_DRC_NG_EXP_WIDTH
#define WM8962_DRC_HI_COMP_MASK
#define WM8962_DRC_HI_COMP_SHIFT
#define WM8962_DRC_HI_COMP_WIDTH
#define WM8962_DRC_LO_COMP_MASK
#define WM8962_DRC_LO_COMP_SHIFT
#define WM8962_DRC_LO_COMP_WIDTH

/*
 * R279 (0x117) - DRC 4
 */
#define WM8962_DRC_KNEE_IP_MASK
#define WM8962_DRC_KNEE_IP_SHIFT
#define WM8962_DRC_KNEE_IP_WIDTH
#define WM8962_DRC_KNEE_OP_MASK
#define WM8962_DRC_KNEE_OP_SHIFT
#define WM8962_DRC_KNEE_OP_WIDTH

/*
 * R280 (0x118) - DRC 5
 */
#define WM8962_DRC_KNEE2_IP_MASK
#define WM8962_DRC_KNEE2_IP_SHIFT
#define WM8962_DRC_KNEE2_IP_WIDTH
#define WM8962_DRC_KNEE2_OP_MASK
#define WM8962_DRC_KNEE2_OP_SHIFT
#define WM8962_DRC_KNEE2_OP_WIDTH

/*
 * R285 (0x11D) - Tloopback
 */
#define WM8962_TLB_ENA
#define WM8962_TLB_ENA_MASK
#define WM8962_TLB_ENA_SHIFT
#define WM8962_TLB_ENA_WIDTH
#define WM8962_TLB_MODE
#define WM8962_TLB_MODE_MASK
#define WM8962_TLB_MODE_SHIFT
#define WM8962_TLB_MODE_WIDTH

/*
 * R335 (0x14F) - EQ1
 */
#define WM8962_EQ_SHARED_COEFF
#define WM8962_EQ_SHARED_COEFF_MASK
#define WM8962_EQ_SHARED_COEFF_SHIFT
#define WM8962_EQ_SHARED_COEFF_WIDTH
#define WM8962_EQ_SHARED_COEFF_SEL
#define WM8962_EQ_SHARED_COEFF_SEL_MASK
#define WM8962_EQ_SHARED_COEFF_SEL_SHIFT
#define WM8962_EQ_SHARED_COEFF_SEL_WIDTH
#define WM8962_EQ_ENA
#define WM8962_EQ_ENA_MASK
#define WM8962_EQ_ENA_SHIFT
#define WM8962_EQ_ENA_WIDTH

/*
 * R336 (0x150) - EQ2
 */
#define WM8962_EQL_B1_GAIN_MASK
#define WM8962_EQL_B1_GAIN_SHIFT
#define WM8962_EQL_B1_GAIN_WIDTH
#define WM8962_EQL_B2_GAIN_MASK
#define WM8962_EQL_B2_GAIN_SHIFT
#define WM8962_EQL_B2_GAIN_WIDTH
#define WM8962_EQL_B3_GAIN_MASK
#define WM8962_EQL_B3_GAIN_SHIFT
#define WM8962_EQL_B3_GAIN_WIDTH

/*
 * R337 (0x151) - EQ3
 */
#define WM8962_EQL_B4_GAIN_MASK
#define WM8962_EQL_B4_GAIN_SHIFT
#define WM8962_EQL_B4_GAIN_WIDTH
#define WM8962_EQL_B5_GAIN_MASK
#define WM8962_EQL_B5_GAIN_SHIFT
#define WM8962_EQL_B5_GAIN_WIDTH

/*
 * R338 (0x152) - EQ4
 */
#define WM8962_EQL_B1_A_MASK
#define WM8962_EQL_B1_A_SHIFT
#define WM8962_EQL_B1_A_WIDTH

/*
 * R339 (0x153) - EQ5
 */
#define WM8962_EQL_B1_B_MASK
#define WM8962_EQL_B1_B_SHIFT
#define WM8962_EQL_B1_B_WIDTH

/*
 * R340 (0x154) - EQ6
 */
#define WM8962_EQL_B1_PG_MASK
#define WM8962_EQL_B1_PG_SHIFT
#define WM8962_EQL_B1_PG_WIDTH

/*
 * R341 (0x155) - EQ7
 */
#define WM8962_EQL_B2_A_MASK
#define WM8962_EQL_B2_A_SHIFT
#define WM8962_EQL_B2_A_WIDTH

/*
 * R342 (0x156) - EQ8
 */
#define WM8962_EQL_B2_B_MASK
#define WM8962_EQL_B2_B_SHIFT
#define WM8962_EQL_B2_B_WIDTH

/*
 * R343 (0x157) - EQ9
 */
#define WM8962_EQL_B2_C_MASK
#define WM8962_EQL_B2_C_SHIFT
#define WM8962_EQL_B2_C_WIDTH

/*
 * R344 (0x158) - EQ10
 */
#define WM8962_EQL_B2_PG_MASK
#define WM8962_EQL_B2_PG_SHIFT
#define WM8962_EQL_B2_PG_WIDTH

/*
 * R345 (0x159) - EQ11
 */
#define WM8962_EQL_B3_A_MASK
#define WM8962_EQL_B3_A_SHIFT
#define WM8962_EQL_B3_A_WIDTH

/*
 * R346 (0x15A) - EQ12
 */
#define WM8962_EQL_B3_B_MASK
#define WM8962_EQL_B3_B_SHIFT
#define WM8962_EQL_B3_B_WIDTH

/*
 * R347 (0x15B) - EQ13
 */
#define WM8962_EQL_B3_C_MASK
#define WM8962_EQL_B3_C_SHIFT
#define WM8962_EQL_B3_C_WIDTH

/*
 * R348 (0x15C) - EQ14
 */
#define WM8962_EQL_B3_PG_MASK
#define WM8962_EQL_B3_PG_SHIFT
#define WM8962_EQL_B3_PG_WIDTH

/*
 * R349 (0x15D) - EQ15
 */
#define WM8962_EQL_B4_A_MASK
#define WM8962_EQL_B4_A_SHIFT
#define WM8962_EQL_B4_A_WIDTH

/*
 * R350 (0x15E) - EQ16
 */
#define WM8962_EQL_B4_B_MASK
#define WM8962_EQL_B4_B_SHIFT
#define WM8962_EQL_B4_B_WIDTH

/*
 * R351 (0x15F) - EQ17
 */
#define WM8962_EQL_B4_C_MASK
#define WM8962_EQL_B4_C_SHIFT
#define WM8962_EQL_B4_C_WIDTH

/*
 * R352 (0x160) - EQ18
 */
#define WM8962_EQL_B4_PG_MASK
#define WM8962_EQL_B4_PG_SHIFT
#define WM8962_EQL_B4_PG_WIDTH

/*
 * R353 (0x161) - EQ19
 */
#define WM8962_EQL_B5_A_MASK
#define WM8962_EQL_B5_A_SHIFT
#define WM8962_EQL_B5_A_WIDTH

/*
 * R354 (0x162) - EQ20
 */
#define WM8962_EQL_B5_B_MASK
#define WM8962_EQL_B5_B_SHIFT
#define WM8962_EQL_B5_B_WIDTH

/*
 * R355 (0x163) - EQ21
 */
#define WM8962_EQL_B5_PG_MASK
#define WM8962_EQL_B5_PG_SHIFT
#define WM8962_EQL_B5_PG_WIDTH

/*
 * R356 (0x164) - EQ22
 */
#define WM8962_EQR_B1_GAIN_MASK
#define WM8962_EQR_B1_GAIN_SHIFT
#define WM8962_EQR_B1_GAIN_WIDTH
#define WM8962_EQR_B2_GAIN_MASK
#define WM8962_EQR_B2_GAIN_SHIFT
#define WM8962_EQR_B2_GAIN_WIDTH
#define WM8962_EQR_B3_GAIN_MASK
#define WM8962_EQR_B3_GAIN_SHIFT
#define WM8962_EQR_B3_GAIN_WIDTH

/*
 * R357 (0x165) - EQ23
 */
#define WM8962_EQR_B4_GAIN_MASK
#define WM8962_EQR_B4_GAIN_SHIFT
#define WM8962_EQR_B4_GAIN_WIDTH
#define WM8962_EQR_B5_GAIN_MASK
#define WM8962_EQR_B5_GAIN_SHIFT
#define WM8962_EQR_B5_GAIN_WIDTH

/*
 * R358 (0x166) - EQ24
 */
#define WM8962_EQR_B1_A_MASK
#define WM8962_EQR_B1_A_SHIFT
#define WM8962_EQR_B1_A_WIDTH

/*
 * R359 (0x167) - EQ25
 */
#define WM8962_EQR_B1_B_MASK
#define WM8962_EQR_B1_B_SHIFT
#define WM8962_EQR_B1_B_WIDTH

/*
 * R360 (0x168) - EQ26
 */
#define WM8962_EQR_B1_PG_MASK
#define WM8962_EQR_B1_PG_SHIFT
#define WM8962_EQR_B1_PG_WIDTH

/*
 * R361 (0x169) - EQ27
 */
#define WM8962_EQR_B2_A_MASK
#define WM8962_EQR_B2_A_SHIFT
#define WM8962_EQR_B2_A_WIDTH

/*
 * R362 (0x16A) - EQ28
 */
#define WM8962_EQR_B2_B_MASK
#define WM8962_EQR_B2_B_SHIFT
#define WM8962_EQR_B2_B_WIDTH

/*
 * R363 (0x16B) - EQ29
 */
#define WM8962_EQR_B2_C_MASK
#define WM8962_EQR_B2_C_SHIFT
#define WM8962_EQR_B2_C_WIDTH

/*
 * R364 (0x16C) - EQ30
 */
#define WM8962_EQR_B2_PG_MASK
#define WM8962_EQR_B2_PG_SHIFT
#define WM8962_EQR_B2_PG_WIDTH

/*
 * R365 (0x16D) - EQ31
 */
#define WM8962_EQR_B3_A_MASK
#define WM8962_EQR_B3_A_SHIFT
#define WM8962_EQR_B3_A_WIDTH

/*
 * R366 (0x16E) - EQ32
 */
#define WM8962_EQR_B3_B_MASK
#define WM8962_EQR_B3_B_SHIFT
#define WM8962_EQR_B3_B_WIDTH

/*
 * R367 (0x16F) - EQ33
 */
#define WM8962_EQR_B3_C_MASK
#define WM8962_EQR_B3_C_SHIFT
#define WM8962_EQR_B3_C_WIDTH

/*
 * R368 (0x170) - EQ34
 */
#define WM8962_EQR_B3_PG_MASK
#define WM8962_EQR_B3_PG_SHIFT
#define WM8962_EQR_B3_PG_WIDTH

/*
 * R369 (0x171) - EQ35
 */
#define WM8962_EQR_B4_A_MASK
#define WM8962_EQR_B4_A_SHIFT
#define WM8962_EQR_B4_A_WIDTH

/*
 * R370 (0x172) - EQ36
 */
#define WM8962_EQR_B4_B_MASK
#define WM8962_EQR_B4_B_SHIFT
#define WM8962_EQR_B4_B_WIDTH

/*
 * R371 (0x173) - EQ37
 */
#define WM8962_EQR_B4_C_MASK
#define WM8962_EQR_B4_C_SHIFT
#define WM8962_EQR_B4_C_WIDTH

/*
 * R372 (0x174) - EQ38
 */
#define WM8962_EQR_B4_PG_MASK
#define WM8962_EQR_B4_PG_SHIFT
#define WM8962_EQR_B4_PG_WIDTH

/*
 * R373 (0x175) - EQ39
 */
#define WM8962_EQR_B5_A_MASK
#define WM8962_EQR_B5_A_SHIFT
#define WM8962_EQR_B5_A_WIDTH

/*
 * R374 (0x176) - EQ40
 */
#define WM8962_EQR_B5_B_MASK
#define WM8962_EQR_B5_B_SHIFT
#define WM8962_EQR_B5_B_WIDTH

/*
 * R375 (0x177) - EQ41
 */
#define WM8962_EQR_B5_PG_MASK
#define WM8962_EQR_B5_PG_SHIFT
#define WM8962_EQR_B5_PG_WIDTH

/*
 * R513 (0x201) - GPIO 2
 */
#define WM8962_GP2_POL
#define WM8962_GP2_POL_MASK
#define WM8962_GP2_POL_SHIFT
#define WM8962_GP2_POL_WIDTH
#define WM8962_GP2_LVL
#define WM8962_GP2_LVL_MASK
#define WM8962_GP2_LVL_SHIFT
#define WM8962_GP2_LVL_WIDTH
#define WM8962_GP2_FN_MASK
#define WM8962_GP2_FN_SHIFT
#define WM8962_GP2_FN_WIDTH

/*
 * R514 (0x202) - GPIO 3
 */
#define WM8962_GP3_POL
#define WM8962_GP3_POL_MASK
#define WM8962_GP3_POL_SHIFT
#define WM8962_GP3_POL_WIDTH
#define WM8962_GP3_LVL
#define WM8962_GP3_LVL_MASK
#define WM8962_GP3_LVL_SHIFT
#define WM8962_GP3_LVL_WIDTH
#define WM8962_GP3_FN_MASK
#define WM8962_GP3_FN_SHIFT
#define WM8962_GP3_FN_WIDTH

/*
 * R516 (0x204) - GPIO 5
 */
#define WM8962_GP5_DIR
#define WM8962_GP5_DIR_MASK
#define WM8962_GP5_DIR_SHIFT
#define WM8962_GP5_DIR_WIDTH
#define WM8962_GP5_PU
#define WM8962_GP5_PU_MASK
#define WM8962_GP5_PU_SHIFT
#define WM8962_GP5_PU_WIDTH
#define WM8962_GP5_PD
#define WM8962_GP5_PD_MASK
#define WM8962_GP5_PD_SHIFT
#define WM8962_GP5_PD_WIDTH
#define WM8962_GP5_POL
#define WM8962_GP5_POL_MASK
#define WM8962_GP5_POL_SHIFT
#define WM8962_GP5_POL_WIDTH
#define WM8962_GP5_OP_CFG
#define WM8962_GP5_OP_CFG_MASK
#define WM8962_GP5_OP_CFG_SHIFT
#define WM8962_GP5_OP_CFG_WIDTH
#define WM8962_GP5_DB
#define WM8962_GP5_DB_MASK
#define WM8962_GP5_DB_SHIFT
#define WM8962_GP5_DB_WIDTH
#define WM8962_GP5_LVL
#define WM8962_GP5_LVL_MASK
#define WM8962_GP5_LVL_SHIFT
#define WM8962_GP5_LVL_WIDTH
#define WM8962_GP5_FN_MASK
#define WM8962_GP5_FN_SHIFT
#define WM8962_GP5_FN_WIDTH

/*
 * R517 (0x205) - GPIO 6
 */
#define WM8962_GP6_DIR
#define WM8962_GP6_DIR_MASK
#define WM8962_GP6_DIR_SHIFT
#define WM8962_GP6_DIR_WIDTH
#define WM8962_GP6_PU
#define WM8962_GP6_PU_MASK
#define WM8962_GP6_PU_SHIFT
#define WM8962_GP6_PU_WIDTH
#define WM8962_GP6_PD
#define WM8962_GP6_PD_MASK
#define WM8962_GP6_PD_SHIFT
#define WM8962_GP6_PD_WIDTH
#define WM8962_GP6_POL
#define WM8962_GP6_POL_MASK
#define WM8962_GP6_POL_SHIFT
#define WM8962_GP6_POL_WIDTH
#define WM8962_GP6_OP_CFG
#define WM8962_GP6_OP_CFG_MASK
#define WM8962_GP6_OP_CFG_SHIFT
#define WM8962_GP6_OP_CFG_WIDTH
#define WM8962_GP6_DB
#define WM8962_GP6_DB_MASK
#define WM8962_GP6_DB_SHIFT
#define WM8962_GP6_DB_WIDTH
#define WM8962_GP6_LVL
#define WM8962_GP6_LVL_MASK
#define WM8962_GP6_LVL_SHIFT
#define WM8962_GP6_LVL_WIDTH
#define WM8962_GP6_FN_MASK
#define WM8962_GP6_FN_SHIFT
#define WM8962_GP6_FN_WIDTH

/*
 * R560 (0x230) - Interrupt Status 1
 */
#define WM8962_GP6_EINT
#define WM8962_GP6_EINT_MASK
#define WM8962_GP6_EINT_SHIFT
#define WM8962_GP6_EINT_WIDTH
#define WM8962_GP5_EINT
#define WM8962_GP5_EINT_MASK
#define WM8962_GP5_EINT_SHIFT
#define WM8962_GP5_EINT_WIDTH

/*
 * R561 (0x231) - Interrupt Status 2
 */
#define WM8962_MICSCD_EINT
#define WM8962_MICSCD_EINT_MASK
#define WM8962_MICSCD_EINT_SHIFT
#define WM8962_MICSCD_EINT_WIDTH
#define WM8962_MICD_EINT
#define WM8962_MICD_EINT_MASK
#define WM8962_MICD_EINT_SHIFT
#define WM8962_MICD_EINT_WIDTH
#define WM8962_FIFOS_ERR_EINT
#define WM8962_FIFOS_ERR_EINT_MASK
#define WM8962_FIFOS_ERR_EINT_SHIFT
#define WM8962_FIFOS_ERR_EINT_WIDTH
#define WM8962_ALC_LOCK_EINT
#define WM8962_ALC_LOCK_EINT_MASK
#define WM8962_ALC_LOCK_EINT_SHIFT
#define WM8962_ALC_LOCK_EINT_WIDTH
#define WM8962_ALC_THRESH_EINT
#define WM8962_ALC_THRESH_EINT_MASK
#define WM8962_ALC_THRESH_EINT_SHIFT
#define WM8962_ALC_THRESH_EINT_WIDTH
#define WM8962_ALC_SAT_EINT
#define WM8962_ALC_SAT_EINT_MASK
#define WM8962_ALC_SAT_EINT_SHIFT
#define WM8962_ALC_SAT_EINT_WIDTH
#define WM8962_ALC_PKOVR_EINT
#define WM8962_ALC_PKOVR_EINT_MASK
#define WM8962_ALC_PKOVR_EINT_SHIFT
#define WM8962_ALC_PKOVR_EINT_WIDTH
#define WM8962_ALC_NGATE_EINT
#define WM8962_ALC_NGATE_EINT_MASK
#define WM8962_ALC_NGATE_EINT_SHIFT
#define WM8962_ALC_NGATE_EINT_WIDTH
#define WM8962_WSEQ_DONE_EINT
#define WM8962_WSEQ_DONE_EINT_MASK
#define WM8962_WSEQ_DONE_EINT_SHIFT
#define WM8962_WSEQ_DONE_EINT_WIDTH
#define WM8962_DRC_ACTDET_EINT
#define WM8962_DRC_ACTDET_EINT_MASK
#define WM8962_DRC_ACTDET_EINT_SHIFT
#define WM8962_DRC_ACTDET_EINT_WIDTH
#define WM8962_FLL_LOCK_EINT
#define WM8962_FLL_LOCK_EINT_MASK
#define WM8962_FLL_LOCK_EINT_SHIFT
#define WM8962_FLL_LOCK_EINT_WIDTH
#define WM8962_PLL3_LOCK_EINT
#define WM8962_PLL3_LOCK_EINT_MASK
#define WM8962_PLL3_LOCK_EINT_SHIFT
#define WM8962_PLL3_LOCK_EINT_WIDTH
#define WM8962_PLL2_LOCK_EINT
#define WM8962_PLL2_LOCK_EINT_MASK
#define WM8962_PLL2_LOCK_EINT_SHIFT
#define WM8962_PLL2_LOCK_EINT_WIDTH
#define WM8962_TEMP_SHUT_EINT
#define WM8962_TEMP_SHUT_EINT_MASK
#define WM8962_TEMP_SHUT_EINT_SHIFT
#define WM8962_TEMP_SHUT_EINT_WIDTH

/*
 * R568 (0x238) - Interrupt Status 1 Mask
 */
#define WM8962_IM_GP6_EINT
#define WM8962_IM_GP6_EINT_MASK
#define WM8962_IM_GP6_EINT_SHIFT
#define WM8962_IM_GP6_EINT_WIDTH
#define WM8962_IM_GP5_EINT
#define WM8962_IM_GP5_EINT_MASK
#define WM8962_IM_GP5_EINT_SHIFT
#define WM8962_IM_GP5_EINT_WIDTH

/*
 * R569 (0x239) - Interrupt Status 2 Mask
 */
#define WM8962_IM_MICSCD_EINT
#define WM8962_IM_MICSCD_EINT_MASK
#define WM8962_IM_MICSCD_EINT_SHIFT
#define WM8962_IM_MICSCD_EINT_WIDTH
#define WM8962_IM_MICD_EINT
#define WM8962_IM_MICD_EINT_MASK
#define WM8962_IM_MICD_EINT_SHIFT
#define WM8962_IM_MICD_EINT_WIDTH
#define WM8962_IM_FIFOS_ERR_EINT
#define WM8962_IM_FIFOS_ERR_EINT_MASK
#define WM8962_IM_FIFOS_ERR_EINT_SHIFT
#define WM8962_IM_FIFOS_ERR_EINT_WIDTH
#define WM8962_IM_ALC_LOCK_EINT
#define WM8962_IM_ALC_LOCK_EINT_MASK
#define WM8962_IM_ALC_LOCK_EINT_SHIFT
#define WM8962_IM_ALC_LOCK_EINT_WIDTH
#define WM8962_IM_ALC_THRESH_EINT
#define WM8962_IM_ALC_THRESH_EINT_MASK
#define WM8962_IM_ALC_THRESH_EINT_SHIFT
#define WM8962_IM_ALC_THRESH_EINT_WIDTH
#define WM8962_IM_ALC_SAT_EINT
#define WM8962_IM_ALC_SAT_EINT_MASK
#define WM8962_IM_ALC_SAT_EINT_SHIFT
#define WM8962_IM_ALC_SAT_EINT_WIDTH
#define WM8962_IM_ALC_PKOVR_EINT
#define WM8962_IM_ALC_PKOVR_EINT_MASK
#define WM8962_IM_ALC_PKOVR_EINT_SHIFT
#define WM8962_IM_ALC_PKOVR_EINT_WIDTH
#define WM8962_IM_ALC_NGATE_EINT
#define WM8962_IM_ALC_NGATE_EINT_MASK
#define WM8962_IM_ALC_NGATE_EINT_SHIFT
#define WM8962_IM_ALC_NGATE_EINT_WIDTH
#define WM8962_IM_WSEQ_DONE_EINT
#define WM8962_IM_WSEQ_DONE_EINT_MASK
#define WM8962_IM_WSEQ_DONE_EINT_SHIFT
#define WM8962_IM_WSEQ_DONE_EINT_WIDTH
#define WM8962_IM_DRC_ACTDET_EINT
#define WM8962_IM_DRC_ACTDET_EINT_MASK
#define WM8962_IM_DRC_ACTDET_EINT_SHIFT
#define WM8962_IM_DRC_ACTDET_EINT_WIDTH
#define WM8962_IM_FLL_LOCK_EINT
#define WM8962_IM_FLL_LOCK_EINT_MASK
#define WM8962_IM_FLL_LOCK_EINT_SHIFT
#define WM8962_IM_FLL_LOCK_EINT_WIDTH
#define WM8962_IM_PLL3_LOCK_EINT
#define WM8962_IM_PLL3_LOCK_EINT_MASK
#define WM8962_IM_PLL3_LOCK_EINT_SHIFT
#define WM8962_IM_PLL3_LOCK_EINT_WIDTH
#define WM8962_IM_PLL2_LOCK_EINT
#define WM8962_IM_PLL2_LOCK_EINT_MASK
#define WM8962_IM_PLL2_LOCK_EINT_SHIFT
#define WM8962_IM_PLL2_LOCK_EINT_WIDTH
#define WM8962_IM_TEMP_SHUT_EINT
#define WM8962_IM_TEMP_SHUT_EINT_MASK
#define WM8962_IM_TEMP_SHUT_EINT_SHIFT
#define WM8962_IM_TEMP_SHUT_EINT_WIDTH

/*
 * R576 (0x240) - Interrupt Control
 */
#define WM8962_IRQ_POL
#define WM8962_IRQ_POL_MASK
#define WM8962_IRQ_POL_SHIFT
#define WM8962_IRQ_POL_WIDTH

/*
 * R584 (0x248) - IRQ Debounce
 */
#define WM8962_FLL_LOCK_DB
#define WM8962_FLL_LOCK_DB_MASK
#define WM8962_FLL_LOCK_DB_SHIFT
#define WM8962_FLL_LOCK_DB_WIDTH
#define WM8962_PLL3_LOCK_DB
#define WM8962_PLL3_LOCK_DB_MASK
#define WM8962_PLL3_LOCK_DB_SHIFT
#define WM8962_PLL3_LOCK_DB_WIDTH
#define WM8962_PLL2_LOCK_DB
#define WM8962_PLL2_LOCK_DB_MASK
#define WM8962_PLL2_LOCK_DB_SHIFT
#define WM8962_PLL2_LOCK_DB_WIDTH
#define WM8962_TEMP_SHUT_DB
#define WM8962_TEMP_SHUT_DB_MASK
#define WM8962_TEMP_SHUT_DB_SHIFT
#define WM8962_TEMP_SHUT_DB_WIDTH

/*
 * R586 (0x24A) -  MICINT Source Pol
 */
#define WM8962_MICSCD_IRQ_POL
#define WM8962_MICSCD_IRQ_POL_MASK
#define WM8962_MICSCD_IRQ_POL_SHIFT
#define WM8962_MICSCD_IRQ_POL_WIDTH
#define WM8962_MICD_IRQ_POL
#define WM8962_MICD_IRQ_POL_MASK
#define WM8962_MICD_IRQ_POL_SHIFT
#define WM8962_MICD_IRQ_POL_WIDTH

/*
 * R768 (0x300) - DSP2 Power Management
 */
#define WM8962_DSP2_ENA
#define WM8962_DSP2_ENA_MASK
#define WM8962_DSP2_ENA_SHIFT
#define WM8962_DSP2_ENA_WIDTH

/*
 * R1037 (0x40D) - DSP2_ExecControl
 */
#define WM8962_DSP2_STOPC
#define WM8962_DSP2_STOPC_MASK
#define WM8962_DSP2_STOPC_SHIFT
#define WM8962_DSP2_STOPC_WIDTH
#define WM8962_DSP2_STOPS
#define WM8962_DSP2_STOPS_MASK
#define WM8962_DSP2_STOPS_SHIFT
#define WM8962_DSP2_STOPS_WIDTH
#define WM8962_DSP2_STOPI
#define WM8962_DSP2_STOPI_MASK
#define WM8962_DSP2_STOPI_SHIFT
#define WM8962_DSP2_STOPI_WIDTH
#define WM8962_DSP2_STOP
#define WM8962_DSP2_STOP_MASK
#define WM8962_DSP2_STOP_SHIFT
#define WM8962_DSP2_STOP_WIDTH
#define WM8962_DSP2_RUNR
#define WM8962_DSP2_RUNR_MASK
#define WM8962_DSP2_RUNR_SHIFT
#define WM8962_DSP2_RUNR_WIDTH
#define WM8962_DSP2_RUN
#define WM8962_DSP2_RUN_MASK
#define WM8962_DSP2_RUN_SHIFT
#define WM8962_DSP2_RUN_WIDTH

/*
 * R8192 (0x2000) - DSP2 Instruction RAM 0
 */
#define WM8962_DSP2_INSTR_RAM_1024_10_9_0_MASK
#define WM8962_DSP2_INSTR_RAM_1024_10_9_0_SHIFT
#define WM8962_DSP2_INSTR_RAM_1024_10_9_0_WIDTH

/*
 * R9216 (0x2400) - DSP2 Address RAM 2
 */
#define WM8962_DSP2_ADDR_RAM_1024_38_37_32_MASK
#define WM8962_DSP2_ADDR_RAM_1024_38_37_32_SHIFT
#define WM8962_DSP2_ADDR_RAM_1024_38_37_32_WIDTH

/*
 * R9217 (0x2401) - DSP2 Address RAM 1
 */
#define WM8962_DSP2_ADDR_RAM_1024_38_31_16_MASK
#define WM8962_DSP2_ADDR_RAM_1024_38_31_16_SHIFT
#define WM8962_DSP2_ADDR_RAM_1024_38_31_16_WIDTH

/*
 * R9218 (0x2402) - DSP2 Address RAM 0
 */
#define WM8962_DSP2_ADDR_RAM_1024_38_15_0_MASK
#define WM8962_DSP2_ADDR_RAM_1024_38_15_0_SHIFT
#define WM8962_DSP2_ADDR_RAM_1024_38_15_0_WIDTH

/*
 * R12288 (0x3000) - DSP2 Data1 RAM 1
 */
#define WM8962_DSP2_DATA1_RAM_384_24_23_16_MASK
#define WM8962_DSP2_DATA1_RAM_384_24_23_16_SHIFT
#define WM8962_DSP2_DATA1_RAM_384_24_23_16_WIDTH

/*
 * R12289 (0x3001) - DSP2 Data1 RAM 0
 */
#define WM8962_DSP2_DATA1_RAM_384_24_15_0_MASK
#define WM8962_DSP2_DATA1_RAM_384_24_15_0_SHIFT
#define WM8962_DSP2_DATA1_RAM_384_24_15_0_WIDTH

/*
 * R13312 (0x3400) - DSP2 Data2 RAM 1
 */
#define WM8962_DSP2_DATA2_RAM_384_24_23_16_MASK
#define WM8962_DSP2_DATA2_RAM_384_24_23_16_SHIFT
#define WM8962_DSP2_DATA2_RAM_384_24_23_16_WIDTH

/*
 * R13313 (0x3401) - DSP2 Data2 RAM 0
 */
#define WM8962_DSP2_DATA2_RAM_384_24_15_0_MASK
#define WM8962_DSP2_DATA2_RAM_384_24_15_0_SHIFT
#define WM8962_DSP2_DATA2_RAM_384_24_15_0_WIDTH

/*
 * R14336 (0x3800) - DSP2 Data3 RAM 1
 */
#define WM8962_DSP2_DATA3_RAM_384_24_23_16_MASK
#define WM8962_DSP2_DATA3_RAM_384_24_23_16_SHIFT
#define WM8962_DSP2_DATA3_RAM_384_24_23_16_WIDTH

/*
 * R14337 (0x3801) - DSP2 Data3 RAM 0
 */
#define WM8962_DSP2_DATA3_RAM_384_24_15_0_MASK
#define WM8962_DSP2_DATA3_RAM_384_24_15_0_SHIFT
#define WM8962_DSP2_DATA3_RAM_384_24_15_0_WIDTH

/*
 * R15360 (0x3C00) - DSP2 Coeff RAM 0
 */
#define WM8962_DSP2_CMAP_RAM_384_11_10_0_MASK
#define WM8962_DSP2_CMAP_RAM_384_11_10_0_SHIFT
#define WM8962_DSP2_CMAP_RAM_384_11_10_0_WIDTH

/*
 * R16384 (0x4000) - RETUNEADC_SHARED_COEFF_1
 */
#define WM8962_ADC_RETUNE_SCV
#define WM8962_ADC_RETUNE_SCV_MASK
#define WM8962_ADC_RETUNE_SCV_SHIFT
#define WM8962_ADC_RETUNE_SCV_WIDTH
#define WM8962_RETUNEADC_SHARED_COEFF_22_16_MASK
#define WM8962_RETUNEADC_SHARED_COEFF_22_16_SHIFT
#define WM8962_RETUNEADC_SHARED_COEFF_22_16_WIDTH

/*
 * R16385 (0x4001) - RETUNEADC_SHARED_COEFF_0
 */
#define WM8962_RETUNEADC_SHARED_COEFF_15_00_MASK
#define WM8962_RETUNEADC_SHARED_COEFF_15_00_SHIFT
#define WM8962_RETUNEADC_SHARED_COEFF_15_00_WIDTH

/*
 * R16386 (0x4002) - RETUNEDAC_SHARED_COEFF_1
 */
#define WM8962_DAC_RETUNE_SCV
#define WM8962_DAC_RETUNE_SCV_MASK
#define WM8962_DAC_RETUNE_SCV_SHIFT
#define WM8962_DAC_RETUNE_SCV_WIDTH
#define WM8962_RETUNEDAC_SHARED_COEFF_23_16_MASK
#define WM8962_RETUNEDAC_SHARED_COEFF_23_16_SHIFT
#define WM8962_RETUNEDAC_SHARED_COEFF_23_16_WIDTH

/*
 * R16387 (0x4003) - RETUNEDAC_SHARED_COEFF_0
 */
#define WM8962_RETUNEDAC_SHARED_COEFF_15_00_MASK
#define WM8962_RETUNEDAC_SHARED_COEFF_15_00_SHIFT
#define WM8962_RETUNEDAC_SHARED_COEFF_15_00_WIDTH

/*
 * R16388 (0x4004) - SOUNDSTAGE_ENABLES_1
 */
#define WM8962_SOUNDSTAGE_ENABLES_23_16_MASK
#define WM8962_SOUNDSTAGE_ENABLES_23_16_SHIFT
#define WM8962_SOUNDSTAGE_ENABLES_23_16_WIDTH

/*
 * R16389 (0x4005) - SOUNDSTAGE_ENABLES_0
 */
#define WM8962_SOUNDSTAGE_ENABLES_15_06_MASK
#define WM8962_SOUNDSTAGE_ENABLES_15_06_SHIFT
#define WM8962_SOUNDSTAGE_ENABLES_15_06_WIDTH
#define WM8962_RTN_ADC_ENA
#define WM8962_RTN_ADC_ENA_MASK
#define WM8962_RTN_ADC_ENA_SHIFT
#define WM8962_RTN_ADC_ENA_WIDTH
#define WM8962_RTN_DAC_ENA
#define WM8962_RTN_DAC_ENA_MASK
#define WM8962_RTN_DAC_ENA_SHIFT
#define WM8962_RTN_DAC_ENA_WIDTH
#define WM8962_HDBASS_ENA
#define WM8962_HDBASS_ENA_MASK
#define WM8962_HDBASS_ENA_SHIFT
#define WM8962_HDBASS_ENA_WIDTH
#define WM8962_HPF2_ENA
#define WM8962_HPF2_ENA_MASK
#define WM8962_HPF2_ENA_SHIFT
#define WM8962_HPF2_ENA_WIDTH
#define WM8962_HPF1_ENA
#define WM8962_HPF1_ENA_MASK
#define WM8962_HPF1_ENA_SHIFT
#define WM8962_HPF1_ENA_WIDTH
#define WM8962_VSS_ENA
#define WM8962_VSS_ENA_MASK
#define WM8962_VSS_ENA_SHIFT
#define WM8962_VSS_ENA_WIDTH

int wm8962_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack);

#endif