linux/sound/soc/codecs/wm8978.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * wm8978.c  --  WM8978 ALSA SoC Audio Codec driver
 *
 * Copyright (C) 2009-2010 Guennadi Liakhovetski <[email protected]>
 * Copyright (C) 2007 Carlos Munoz <[email protected]>
 * Copyright 2006-2009 Wolfson Microelectronics PLC.
 * Based on wm8974 and wm8990 by Liam Girdwood <[email protected]>
 */

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include <asm/div64.h>

#include "wm8978.h"

static const struct reg_default wm8978_reg_defaults[] =;

static bool wm8978_volatile(struct device *dev, unsigned int reg)
{}

/* codec private data */
struct wm8978_priv {};

static const char *wm8978_companding[] =;
static const char *wm8978_eqmode[] =;
static const char *wm8978_bw[] =;
static const char *wm8978_eq1[] =;
static const char *wm8978_eq2[] =;
static const char *wm8978_eq3[] =;
static const char *wm8978_eq4[] =;
static const char *wm8978_eq5[] =;
static const char *wm8978_alc3[] =;
static const char *wm8978_alc1[] =;

static SOC_ENUM_SINGLE_DECL(adc_compand, WM8978_COMPANDING_CONTROL, 1,
			    wm8978_companding);
static SOC_ENUM_SINGLE_DECL(dac_compand, WM8978_COMPANDING_CONTROL, 3,
			    wm8978_companding);
static SOC_ENUM_SINGLE_DECL(eqmode, WM8978_EQ1, 8, wm8978_eqmode);
static SOC_ENUM_SINGLE_DECL(eq1, WM8978_EQ1, 5, wm8978_eq1);
static SOC_ENUM_SINGLE_DECL(eq2bw, WM8978_EQ2, 8, wm8978_bw);
static SOC_ENUM_SINGLE_DECL(eq2, WM8978_EQ2, 5, wm8978_eq2);
static SOC_ENUM_SINGLE_DECL(eq3bw, WM8978_EQ3, 8, wm8978_bw);
static SOC_ENUM_SINGLE_DECL(eq3, WM8978_EQ3, 5, wm8978_eq3);
static SOC_ENUM_SINGLE_DECL(eq4bw, WM8978_EQ4, 8, wm8978_bw);
static SOC_ENUM_SINGLE_DECL(eq4, WM8978_EQ4, 5, wm8978_eq4);
static SOC_ENUM_SINGLE_DECL(eq5, WM8978_EQ5, 5, wm8978_eq5);
static SOC_ENUM_SINGLE_DECL(alc3, WM8978_ALC_CONTROL_3, 8, wm8978_alc3);
static SOC_ENUM_SINGLE_DECL(alc1, WM8978_ALC_CONTROL_1, 7, wm8978_alc1);

static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
static const DECLARE_TLV_DB_SCALE(boost_tlv, -1500, 300, 1);
static const DECLARE_TLV_DB_SCALE(limiter_tlv, 0, 100, 0);

static const struct snd_kcontrol_new wm8978_snd_controls[] =;

/* Mixer #1: Output (OUT1, OUT2) Mixer: mix AUX, Input mixer output and DAC */
static const struct snd_kcontrol_new wm8978_left_out_mixer[] =;

static const struct snd_kcontrol_new wm8978_right_out_mixer[] =;

/* OUT3/OUT4 Mixer not implemented */

/* Mixer #2: Input PGA Mute */
static const struct snd_kcontrol_new wm8978_left_input_mixer[] =;
static const struct snd_kcontrol_new wm8978_right_input_mixer[] =;

static const struct snd_soc_dapm_widget wm8978_dapm_widgets[] =;

static const struct snd_soc_dapm_route wm8978_dapm_routes[] =;

/* PLL divisors */
struct wm8978_pll_div {};

#define FIXED_PLL_SIZE

static void pll_factors(struct snd_soc_component *component,
		struct wm8978_pll_div *pll_div, unsigned int target, unsigned int source)
{}

/* MCLK dividers */
static const int mclk_numerator[]	=;
static const int mclk_denominator[]	=;

/*
 * find index >= idx, such that, for a given f_out,
 * 3 * f_mclk / 4 <= f_PLLOUT < 13 * f_mclk / 4
 * f_out can be f_256fs or f_opclk, currently only used for f_256fs. Can be
 * generalised for f_opclk with suitable coefficient arrays, but currently
 * the OPCLK divisor is calculated directly, not iteratively.
 */
static int wm8978_enum_mclk(unsigned int f_out, unsigned int f_mclk,
			    unsigned int *f_pllout)
{}

/*
 * Calculate internal frequencies and dividers, according to Figure 40
 * "PLL and Clock Select Circuit" in WM8978 datasheet Rev. 2.6
 */
static int wm8978_configure_pll(struct snd_soc_component *component)
{}

/*
 * Configure WM8978 clock dividers.
 */
static int wm8978_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
				 int div_id, int div)
{}

/*
 * @freq:	when .set_pll() us not used, freq is codec MCLK input frequency
 */
static int wm8978_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
				 unsigned int freq, int dir)
{}

/*
 * Set ADC and Voice DAC format.
 */
static int wm8978_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{}

/*
 * Set PCM DAI bit size and sample rate.
 */
static int wm8978_hw_params(struct snd_pcm_substream *substream,
			    struct snd_pcm_hw_params *params,
			    struct snd_soc_dai *dai)
{}

static int wm8978_mute(struct snd_soc_dai *dai, int mute, int direction)
{}

static int wm8978_set_bias_level(struct snd_soc_component *component,
				 enum snd_soc_bias_level level)
{}

#define WM8978_FORMATS

static const struct snd_soc_dai_ops wm8978_dai_ops =;

/* Also supports 12kHz */
static struct snd_soc_dai_driver wm8978_dai =;

static int wm8978_suspend(struct snd_soc_component *component)
{}

static int wm8978_resume(struct snd_soc_component *component)
{}

/*
 * These registers contain an "update" bit - bit 8. This means, for example,
 * that one can write new DAC digital volume for both channels, but only when
 * the update bit is set, will also the volume be updated - simultaneously for
 * both channels.
 */
static const int update_reg[] =;

static int wm8978_probe(struct snd_soc_component *component)
{}

static const struct snd_soc_component_driver soc_component_dev_wm8978 =;

static const struct regmap_config wm8978_regmap_config =;

static int wm8978_i2c_probe(struct i2c_client *i2c)
{}

static const struct i2c_device_id wm8978_i2c_id[] =;
MODULE_DEVICE_TABLE(i2c, wm8978_i2c_id);

static const struct of_device_id wm8978_of_match[] =;
MODULE_DEVICE_TABLE(of, wm8978_of_match);

static struct i2c_driver wm8978_i2c_driver =;

module_i2c_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();