linux/drivers/clk/renesas/clk-r8a7740.c

// SPDX-License-Identifier: GPL-2.0
/*
 * r8a7740 Core CPG Clocks
 *
 * Copyright (C) 2014  Ulrich Hecht
 */

#include <linux/clk-provider.h>
#include <linux/clk/renesas.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/spinlock.h>

struct r8a7740_cpg { … };

#define CPG_FRQCRA …
#define CPG_FRQCRB …
#define CPG_PLLC2CR …
#define CPG_USBCKCR …
#define CPG_FRQCRC …

struct div4_clk { … };

static struct div4_clk div4_clks[] = …;

static const struct clk_div_table div4_div_table[] = …;

static u32 cpg_mode __initdata;

static struct clk * __init
r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
			   void __iomem *base, const char *name)
{ … }

static void __init r8a7740_cpg_clocks_init(struct device_node *np)
{ … }
CLK_OF_DECLARE(r8a7740_cpg_clks, "renesas,r8a7740-cpg-clocks",
	       r8a7740_cpg_clocks_init);