linux/drivers/clk/renesas/rcar-gen3-cpg.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * R-Car Gen3 Clock Pulse Generator
 *
 * Copyright (C) 2015-2018 Glider bvba
 * Copyright (C) 2018 Renesas Electronics Corp.
 *
 */

#ifndef __CLK_RENESAS_RCAR_GEN3_CPG_H__
#define __CLK_RENESAS_RCAR_GEN3_CPG_H__

enum rcar_gen3_clk_types { … };

#define DEF_GEN3_SDH(_name, _id, _parent, _offset) …

#define DEF_GEN3_SD(_name, _id, _parent, _offset) …

#define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) …

#define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \
		    _div_clean) …

#define DEF_GEN3_OSC(_name, _id, _parent, _div) …

#define DEF_GEN3_RCKSEL(_name, _id, _parent0, _div0, _parent1, _div1) …

#define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) …

#define DEF_FIXED_RPCSRC_E3(_name, _id, _parent0, _parent1) …
#define DEF_FIXED_RPCSRC_D3(_name, _id, _parent0, _parent1) …

struct rcar_gen3_cpg_pll_config { … };

#define CPG_RPCCKCR …
#define CPG_RCKCR …

struct clk *rcar_gen3_cpg_clk_register(struct device *dev,
	const struct cpg_core_clk *core, const struct cpg_mssr_info *info,
	struct clk **clks, void __iomem *base,
	struct raw_notifier_head *notifiers);
int rcar_gen3_cpg_init(const struct rcar_gen3_cpg_pll_config *config,
		       unsigned int clk_extalr, u32 mode);

#endif