// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved. */ #include <linux/bitops.h> #include <linux/device.h> #include <linux/gpio/consumer.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/printk.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/soundwire/sdw.h> #include <linux/soundwire/sdw_registers.h> #include <linux/soundwire/sdw_type.h> #include <sound/pcm.h> #include <sound/pcm_params.h> #include <sound/soc-dapm.h> #include <sound/soc.h> #include <sound/tlv.h> #define WSA883X_BASE … #define WSA883X_ANA_BG_TSADC_BASE … #define WSA883X_REF_CTRL … #define WSA883X_TEST_CTL_0 … #define WSA883X_BIAS_0 … #define WSA883X_OP_CTL … #define WSA883X_IREF_CTL … #define WSA883X_ISENS_CTL … #define WSA883X_CLK_CTL … #define WSA883X_TEST_CTL_1 … #define WSA883X_BIAS_1 … #define WSA883X_ADC_CTL … #define WSA883X_DOUT_MSB … #define WSA883X_DOUT_LSB … #define WSA883X_VBAT_SNS … #define WSA883X_ITRIM_CODE … #define WSA883X_ANA_IVSENSE_BASE … #define WSA883X_EN … #define WSA883X_OVERRIDE1 … #define WSA883X_OVERRIDE2 … #define WSA883X_VSENSE1 … #define WSA883X_ISENSE1 … #define WSA883X_ISENSE2 … #define WSA883X_ISENSE_CAL … #define WSA883X_MISC … #define WSA883X_ADC_0 … #define WSA883X_ADC_1 … #define WSA883X_ADC_2 … #define WSA883X_ADC_3 … #define WSA883X_ADC_4 … #define WSA883X_ADC_5 … #define WSA883X_ADC_6 … #define WSA883X_ADC_7 … #define WSA883X_STATUS … #define WSA883X_ANA_SPK_TOP_BASE … #define WSA883X_DAC_CTRL_REG … #define WSA883X_DAC_EN_DEBUG_REG … #define WSA883X_DAC_OPAMP_BIAS1_REG … #define WSA883X_DAC_OPAMP_BIAS2_REG … #define WSA883X_DAC_VCM_CTRL_REG … #define WSA883X_DAC_VOLTAGE_CTRL_REG … #define WSA883X_ATEST1_REG … #define WSA883X_ATEST2_REG … #define WSA883X_SPKR_TOP_BIAS_REG1 … #define WSA883X_SPKR_TOP_BIAS_REG2 … #define WSA883X_SPKR_TOP_BIAS_REG3 … #define WSA883X_SPKR_TOP_BIAS_REG4 … #define WSA883X_SPKR_CLIP_DET_REG … #define WSA883X_SPKR_DRV_LF_BLK_EN … #define WSA883X_SPKR_DRV_LF_EN … #define WSA883X_SPKR_DRV_LF_MASK_DCC_CTL … #define WSA883X_SPKR_DRV_LF_MISC_CTL … #define WSA883X_SPKR_DRV_LF_REG_GAIN … #define WSA883X_SPKR_DRV_OS_CAL_CTL … #define WSA883X_SPKR_DRV_OS_CAL_CTL1 … #define WSA883X_SPKR_PWM_CLK_CTL … #define WSA883X_SPKR_PWM_FREQ_SEL_MASK … #define WSA883X_SPKR_PWM_FREQ_F300KHZ … #define WSA883X_SPKR_PWM_FREQ_F600KHZ … #define WSA883X_SPKR_PDRV_HS_CTL … #define WSA883X_SPKR_PDRV_LS_CTL … #define WSA883X_SPKR_PWRSTG_DBG … #define WSA883X_SPKR_OCP_CTL … #define WSA883X_SPKR_BBM_CTL … #define WSA883X_PA_STATUS0 … #define WSA883X_PA_STATUS1 … #define WSA883X_PA_STATUS2 … #define WSA883X_ANA_BOOST_BASE … #define WSA883X_EN_CTRL … #define WSA883X_CURRENT_LIMIT … #define WSA883X_IBIAS1 … #define WSA883X_IBIAS2 … #define WSA883X_IBIAS3 … #define WSA883X_LDO_PROG … #define WSA883X_STABILITY_CTRL1 … #define WSA883X_STABILITY_CTRL2 … #define WSA883X_PWRSTAGE_CTRL1 … #define WSA883X_PWRSTAGE_CTRL2 … #define WSA883X_BYPASS_1 … #define WSA883X_BYPASS_2 … #define WSA883X_ZX_CTRL_1 … #define WSA883X_ZX_CTRL_2 … #define WSA883X_MISC1 … #define WSA883X_MISC2 … #define WSA883X_GMAMP_SUP1 … #define WSA883X_PWRSTAGE_CTRL3 … #define WSA883X_PWRSTAGE_CTRL4 … #define WSA883X_TEST1 … #define WSA883X_SPARE1 … #define WSA883X_SPARE2 … #define WSA883X_ANA_PON_LDOL_BASE … #define WSA883X_PON_CTL_0 … #define WSA883X_PON_CLT_1 … #define WSA883X_PON_CTL_2 … #define WSA883X_PON_CTL_3 … #define WSA883X_CKWD_CTL_0 … #define WSA883X_CKWD_CTL_1 … #define WSA883X_CKWD_CTL_2 … #define WSA883X_CKSK_CTL_0 … #define WSA883X_PADSW_CTL_0 … #define WSA883X_TEST_0 … #define WSA883X_TEST_1 … #define WSA883X_STATUS_0 … #define WSA883X_STATUS_1 … #define WSA883X_DIG_CTRL_BASE … #define WSA883X_CHIP_ID0 … #define WSA883X_CHIP_ID1 … #define WSA883X_CHIP_ID2 … #define WSA883X_CHIP_ID3 … #define WSA883X_BUS_ID … #define WSA883X_CDC_RST_CTL … #define WSA883X_TOP_CLK_CFG … #define WSA883X_CDC_PATH_MODE … #define WSA883X_RXD_MODE_MASK … #define WSA883X_RXD_MODE_NORMAL … #define WSA883X_RXD_MODE_HIFI … #define WSA883X_CDC_CLK_CTL … #define WSA883X_SWR_RESET_EN … #define WSA883X_RESET_CTL … #define WSA883X_PA_FSM_CTL … #define WSA883X_GLOBAL_PA_EN_MASK … #define WSA883X_GLOBAL_PA_ENABLE … #define WSA883X_PA_FSM_TIMER0 … #define WSA883X_PA_FSM_TIMER1 … #define WSA883X_PA_FSM_STA … #define WSA883X_PA_FSM_ERR_COND … #define WSA883X_PA_FSM_MSK … #define WSA883X_PA_FSM_BYP … #define WSA883X_PA_FSM_DBG … #define WSA883X_TADC_VALUE_CTL … #define WSA883X_TEMP_DETECT_CTL … #define WSA883X_TEMP_MSB … #define WSA883X_TEMP_LSB … #define WSA883X_TEMP_CONFIG0 … #define WSA883X_TEMP_CONFIG1 … #define WSA883X_VBAT_ADC_FLT_CTL … #define WSA883X_VBAT_ADC_FLT_EN_MASK … #define WSA883X_VBAT_ADC_COEF_SEL_MASK … #define WSA883X_VBAT_ADC_COEF_F_1DIV2 … #define WSA883X_VBAT_ADC_COEF_F_1DIV16 … #define WSA883X_VBAT_DIN_MSB … #define WSA883X_VBAT_DIN_LSB … #define WSA883X_VBAT_DOUT … #define WSA883X_SDM_PDM9_LSB … #define WSA883X_SDM_PDM9_MSB … #define WSA883X_CDC_RX_CTL … #define WSA883X_CDC_SPK_DSM_A1_0 … #define WSA883X_CDC_SPK_DSM_A1_1 … #define WSA883X_CDC_SPK_DSM_A2_0 … #define WSA883X_CDC_SPK_DSM_A2_1 … #define WSA883X_CDC_SPK_DSM_A3_0 … #define WSA883X_CDC_SPK_DSM_A3_1 … #define WSA883X_CDC_SPK_DSM_A4_0 … #define WSA883X_CDC_SPK_DSM_A4_1 … #define WSA883X_CDC_SPK_DSM_A5_0 … #define WSA883X_CDC_SPK_DSM_A5_1 … #define WSA883X_CDC_SPK_DSM_A6_0 … #define WSA883X_CDC_SPK_DSM_A7_0 … #define WSA883X_CDC_SPK_DSM_C_0 … #define WSA883X_CDC_SPK_DSM_C_1 … #define WSA883X_CDC_SPK_DSM_C_2 … #define WSA883X_CDC_SPK_DSM_C_3 … #define WSA883X_CDC_SPK_DSM_R1 … #define WSA883X_CDC_SPK_DSM_R2 … #define WSA883X_CDC_SPK_DSM_R3 … #define WSA883X_CDC_SPK_DSM_R4 … #define WSA883X_CDC_SPK_DSM_R5 … #define WSA883X_CDC_SPK_DSM_R6 … #define WSA883X_CDC_SPK_DSM_R7 … #define WSA883X_CDC_SPK_GAIN_PDM_0 … #define WSA883X_CDC_SPK_GAIN_PDM_1 … #define WSA883X_CDC_SPK_GAIN_PDM_2 … #define WSA883X_PDM_WD_CTL … #define WSA883X_PDM_EN_MASK … #define WSA883X_PDM_ENABLE … #define WSA883X_DEM_BYPASS_DATA0 … #define WSA883X_DEM_BYPASS_DATA1 … #define WSA883X_DEM_BYPASS_DATA2 … #define WSA883X_DEM_BYPASS_DATA3 … #define WSA883X_WAVG_CTL … #define WSA883X_WAVG_LRA_PER_0 … #define WSA883X_WAVG_LRA_PER_1 … #define WSA883X_WAVG_DELTA_THETA_0 … #define WSA883X_WAVG_DELTA_THETA_1 … #define WSA883X_WAVG_DIRECT_AMP_0 … #define WSA883X_WAVG_DIRECT_AMP_1 … #define WSA883X_WAVG_PTRN_AMP0_0 … #define WSA883X_WAVG_PTRN_AMP0_1 … #define WSA883X_WAVG_PTRN_AMP1_0 … #define WSA883X_WAVG_PTRN_AMP1_1 … #define WSA883X_WAVG_PTRN_AMP2_0 … #define WSA883X_WAVG_PTRN_AMP2_1 … #define WSA883X_WAVG_PTRN_AMP3_0 … #define WSA883X_WAVG_PTRN_AMP3_1 … #define WSA883X_WAVG_PTRN_AMP4_0 … #define WSA883X_WAVG_PTRN_AMP4_1 … #define WSA883X_WAVG_PTRN_AMP5_0 … #define WSA883X_WAVG_PTRN_AMP5_1 … #define WSA883X_WAVG_PTRN_AMP6_0 … #define WSA883X_WAVG_PTRN_AMP6_1 … #define WSA883X_WAVG_PTRN_AMP7_0 … #define WSA883X_WAVG_PTRN_AMP7_1 … #define WSA883X_WAVG_PER_0_1 … #define WSA883X_WAVG_PER_2_3 … #define WSA883X_WAVG_PER_4_5 … #define WSA883X_WAVG_PER_6_7 … #define WSA883X_WAVG_STA … #define WSA883X_DRE_CTL_0 … #define WSA883X_DRE_OFFSET_MASK … #define WSA883X_DRE_PROG_DELAY_MASK … #define WSA883X_DRE_CTL_1 … #define WSA883X_DRE_GAIN_EN_MASK … #define WSA883X_DRE_GAIN_FROM_CSR … #define WSA883X_DRE_IDLE_DET_CTL … #define WSA883X_CLSH_CTL_0 … #define WSA883X_CLSH_CTL_1 … #define WSA883X_CLSH_V_HD_PA … #define WSA883X_CLSH_V_PA_MIN … #define WSA883X_CLSH_OVRD_VAL … #define WSA883X_CLSH_HARD_MAX … #define WSA883X_CLSH_SOFT_MAX … #define WSA883X_CLSH_SIG_DP … #define WSA883X_TAGC_CTL … #define WSA883X_TAGC_TIME … #define WSA883X_TAGC_E2E_GAIN … #define WSA883X_TAGC_FORCE_VAL … #define WSA883X_VAGC_CTL … #define WSA883X_VAGC_TIME … #define WSA883X_VAGC_ATTN_LVL_1_2 … #define WSA883X_VAGC_ATTN_LVL_3 … #define WSA883X_INTR_MODE … #define WSA883X_INTR_MASK0 … #define WSA883X_INTR_MASK1 … #define WSA883X_INTR_STATUS0 … #define WSA883X_INTR_STATUS1 … #define WSA883X_INTR_CLEAR0 … #define WSA883X_INTR_CLEAR1 … #define WSA883X_INTR_LEVEL0 … #define WSA883X_INTR_LEVEL1 … #define WSA883X_INTR_SET0 … #define WSA883X_INTR_SET1 … #define WSA883X_INTR_TEST0 … #define WSA883X_INTR_TEST1 … #define WSA883X_OTP_CTRL0 … #define WSA883X_OTP_CTRL1 … #define WSA883X_HDRIVE_CTL_GROUP1 … #define WSA883X_PIN_CTL … #define WSA883X_PIN_CTL_OE … #define WSA883X_PIN_WDATA_IOPAD … #define WSA883X_PIN_STATUS … #define WSA883X_I2C_SLAVE_CTL … #define WSA883X_PDM_TEST_MODE … #define WSA883X_ATE_TEST_MODE … #define WSA883X_DIG_DEBUG_MODE … #define WSA883X_DIG_DEBUG_SEL … #define WSA883X_DIG_DEBUG_EN … #define WSA883X_SWR_HM_TEST0 … #define WSA883X_SWR_HM_TEST1 … #define WSA883X_SWR_PAD_CTL … #define WSA883X_TADC_DETECT_DBG_CTL … #define WSA883X_TADC_DEBUG_MSB … #define WSA883X_TADC_DEBUG_LSB … #define WSA883X_SAMPLE_EDGE_SEL … #define WSA883X_SWR_EDGE_SEL … #define WSA883X_TEST_MODE_CTL … #define WSA883X_IOPAD_CTL … #define WSA883X_ANA_CSR_DBG_ADD … #define WSA883X_ANA_CSR_DBG_CTL … #define WSA883X_SPARE_R … #define WSA883X_SPARE_0 … #define WSA883X_SPARE_1 … #define WSA883X_SPARE_2 … #define WSA883X_SCODE … #define WSA883X_DIG_TRIM_BASE … #define WSA883X_OTP_REG_0 … #define WSA883X_ID_MASK … #define WSA883X_OTP_REG_1 … #define WSA883X_OTP_REG_2 … #define WSA883X_OTP_REG_3 … #define WSA883X_OTP_REG_4 … #define WSA883X_OTP_REG_5 … #define WSA883X_OTP_REG_6 … #define WSA883X_OTP_REG_7 … #define WSA883X_OTP_REG_8 … #define WSA883X_OTP_REG_9 … #define WSA883X_OTP_REG_10 … #define WSA883X_OTP_REG_11 … #define WSA883X_OTP_REG_12 … #define WSA883X_OTP_REG_13 … #define WSA883X_OTP_REG_14 … #define WSA883X_OTP_REG_15 … #define WSA883X_OTP_REG_16 … #define WSA883X_OTP_REG_17 … #define WSA883X_OTP_REG_18 … #define WSA883X_OTP_REG_19 … #define WSA883X_OTP_REG_20 … #define WSA883X_OTP_REG_21 … #define WSA883X_OTP_REG_22 … #define WSA883X_OTP_REG_23 … #define WSA883X_OTP_REG_24 … #define WSA883X_OTP_REG_25 … #define WSA883X_OTP_REG_26 … #define WSA883X_OTP_REG_27 … #define WSA883X_OTP_REG_28 … #define WSA883X_OTP_REG_29 … #define WSA883X_OTP_REG_30 … #define WSA883X_OTP_REG_31 … #define WSA883X_OTP_REG_32 … #define WSA883X_OTP_REG_33 … #define WSA883X_OTP_REG_34 … #define WSA883X_OTP_REG_35 … #define WSA883X_OTP_REG_63 … #define WSA883X_DIG_EMEM_BASE … #define WSA883X_EMEM_0 … #define WSA883X_EMEM_1 … #define WSA883X_EMEM_2 … #define WSA883X_EMEM_3 … #define WSA883X_EMEM_4 … #define WSA883X_EMEM_5 … #define WSA883X_EMEM_6 … #define WSA883X_EMEM_7 … #define WSA883X_EMEM_8 … #define WSA883X_EMEM_9 … #define WSA883X_EMEM_10 … #define WSA883X_EMEM_11 … #define WSA883X_EMEM_12 … #define WSA883X_EMEM_13 … #define WSA883X_EMEM_14 … #define WSA883X_EMEM_15 … #define WSA883X_EMEM_16 … #define WSA883X_EMEM_17 … #define WSA883X_EMEM_18 … #define WSA883X_EMEM_19 … #define WSA883X_EMEM_20 … #define WSA883X_EMEM_21 … #define WSA883X_EMEM_22 … #define WSA883X_EMEM_23 … #define WSA883X_EMEM_24 … #define WSA883X_EMEM_25 … #define WSA883X_EMEM_26 … #define WSA883X_EMEM_27 … #define WSA883X_EMEM_28 … #define WSA883X_EMEM_29 … #define WSA883X_EMEM_30 … #define WSA883X_EMEM_31 … #define WSA883X_EMEM_32 … #define WSA883X_EMEM_33 … #define WSA883X_EMEM_34 … #define WSA883X_EMEM_35 … #define WSA883X_EMEM_36 … #define WSA883X_EMEM_37 … #define WSA883X_EMEM_38 … #define WSA883X_EMEM_39 … #define WSA883X_EMEM_40 … #define WSA883X_EMEM_41 … #define WSA883X_EMEM_42 … #define WSA883X_EMEM_43 … #define WSA883X_EMEM_44 … #define WSA883X_EMEM_45 … #define WSA883X_EMEM_46 … #define WSA883X_EMEM_47 … #define WSA883X_EMEM_48 … #define WSA883X_EMEM_49 … #define WSA883X_EMEM_50 … #define WSA883X_EMEM_51 … #define WSA883X_EMEM_52 … #define WSA883X_EMEM_53 … #define WSA883X_EMEM_54 … #define WSA883X_EMEM_55 … #define WSA883X_EMEM_56 … #define WSA883X_EMEM_57 … #define WSA883X_EMEM_58 … #define WSA883X_EMEM_59 … #define WSA883X_EMEM_60 … #define WSA883X_EMEM_61 … #define WSA883X_EMEM_62 … #define WSA883X_EMEM_63 … #define WSA883X_NUM_REGISTERS … #define WSA883X_MAX_REGISTER … #define WSA883X_VERSION_1_0 … #define WSA883X_VERSION_1_1 … #define WSA883X_MAX_SWR_PORTS … #define WSA883X_RATES … /* Fractional Rates */ #define WSA883X_FRAC_RATES … #define WSA883X_FORMATS … struct wsa883x_priv { … }; enum { … }; enum { … }; enum wsa_port_ids { … }; static const char * const wsa_dev_mode_text[] = …; enum { … }; static const struct soc_enum wsa_dev_mode_enum = …; /* 4 ports */ static struct sdw_dpn_prop wsa_sink_dpn_prop[WSA883X_MAX_SWR_PORTS] = …; static const struct sdw_port_config wsa883x_pconfig[WSA883X_MAX_SWR_PORTS] = …; static struct reg_default wsa883x_defaults[] = …; static bool wsa883x_readonly_register(struct device *dev, unsigned int reg) { … } static bool wsa883x_writeable_register(struct device *dev, unsigned int reg) { … } static bool wsa883x_volatile_register(struct device *dev, unsigned int reg) { … } static const struct regmap_config wsa883x_regmap_config = …; static const struct reg_sequence reg_init[] = …; static void wsa883x_init(struct wsa883x_priv *wsa883x) { … } static int wsa883x_update_status(struct sdw_slave *slave, enum sdw_slave_status status) { … } static int wsa883x_port_prep(struct sdw_slave *slave, struct sdw_prepare_ch *prepare_ch, enum sdw_port_prep_ops state) { … } static const struct sdw_slave_ops wsa883x_slave_ops = …; static int wsa_dev_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(pa_gain, 0, 14, TLV_DB_SCALE_ITEM(-300, 0, 0), 15, 29, TLV_DB_SCALE_ITEM(-300, 150, 0), 30, 31, TLV_DB_SCALE_ITEM(1800, 0, 0), ); static int wsa883x_get_swr_port(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int wsa883x_set_swr_port(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int wsa883x_get_comp_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int wsa883x_set_comp_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int wsa883x_codec_probe(struct snd_soc_component *comp) { … } static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { … } static const struct snd_soc_dapm_widget wsa883x_dapm_widgets[] = …; static const struct snd_kcontrol_new wsa883x_snd_controls[] = …; static const struct snd_soc_dapm_route wsa883x_audio_map[] = …; static const struct snd_soc_component_driver wsa883x_component_drv = …; static int wsa883x_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { … } static int wsa883x_hw_free(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { … } static int wsa883x_set_sdw_stream(struct snd_soc_dai *dai, void *stream, int direction) { … } static int wsa883x_digital_mute(struct snd_soc_dai *dai, int mute, int stream) { … } static const struct snd_soc_dai_ops wsa883x_dai_ops = …; static struct snd_soc_dai_driver wsa883x_dais[] = …; static int wsa883x_probe(struct sdw_slave *pdev, const struct sdw_device_id *id) { … } static int __maybe_unused wsa883x_runtime_suspend(struct device *dev) { … } static int __maybe_unused wsa883x_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops wsa883x_pm_ops = …; static const struct sdw_device_id wsa883x_swr_id[] = …; MODULE_DEVICE_TABLE(sdw, wsa883x_swr_id); static struct sdw_driver wsa883x_codec_driver = …; module_sdw_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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