linux/include/dt-bindings/clock/r8a77470-cpg-mssr.h

/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright (C) 2018 Renesas Electronics Corp.
 */
#ifndef __DT_BINDINGS_CLOCK_R8A77470_CPG_MSSR_H__
#define __DT_BINDINGS_CLOCK_R8A77470_CPG_MSSR_H__

#include <dt-bindings/clock/renesas-cpg-mssr.h>

/* r8a77470 CPG Core Clocks */
#define R8A77470_CLK_Z2
#define R8A77470_CLK_ZTR
#define R8A77470_CLK_ZTRD2
#define R8A77470_CLK_ZT
#define R8A77470_CLK_ZX
#define R8A77470_CLK_ZS
#define R8A77470_CLK_HP
#define R8A77470_CLK_B
#define R8A77470_CLK_LB
#define R8A77470_CLK_P
#define R8A77470_CLK_CL
#define R8A77470_CLK_CP
#define R8A77470_CLK_M2
#define R8A77470_CLK_ZB3
#define R8A77470_CLK_SDH
#define R8A77470_CLK_SD0
#define R8A77470_CLK_SD1
#define R8A77470_CLK_SD2
#define R8A77470_CLK_MP
#define R8A77470_CLK_QSPI
#define R8A77470_CLK_CPEX
#define R8A77470_CLK_RCAN
#define R8A77470_CLK_R
#define R8A77470_CLK_OSC

#endif /* __DT_BINDINGS_CLOCK_R8A77470_CPG_MSSR_H__ */