#ifndef __DT_BINDINGS_CLOCK_R8A7779_H__
#define __DT_BINDINGS_CLOCK_R8A7779_H__
#define R8A7779_CLK_PLLA …
#define R8A7779_CLK_Z …
#define R8A7779_CLK_ZS …
#define R8A7779_CLK_S …
#define R8A7779_CLK_S1 …
#define R8A7779_CLK_P …
#define R8A7779_CLK_B …
#define R8A7779_CLK_OUT …
#define R8A7779_CLK_PWM …
#define R8A7779_CLK_HSPI …
#define R8A7779_CLK_TMU2 …
#define R8A7779_CLK_TMU1 …
#define R8A7779_CLK_TMU0 …
#define R8A7779_CLK_HSCIF1 …
#define R8A7779_CLK_HSCIF0 …
#define R8A7779_CLK_SCIF5 …
#define R8A7779_CLK_SCIF4 …
#define R8A7779_CLK_SCIF3 …
#define R8A7779_CLK_SCIF2 …
#define R8A7779_CLK_SCIF1 …
#define R8A7779_CLK_SCIF0 …
#define R8A7779_CLK_I2C3 …
#define R8A7779_CLK_I2C2 …
#define R8A7779_CLK_I2C1 …
#define R8A7779_CLK_I2C0 …
#define R8A7779_CLK_USB01 …
#define R8A7779_CLK_USB2 …
#define R8A7779_CLK_DU …
#define R8A7779_CLK_VIN2 …
#define R8A7779_CLK_VIN1 …
#define R8A7779_CLK_VIN0 …
#define R8A7779_CLK_ETHER …
#define R8A7779_CLK_SATA …
#define R8A7779_CLK_PCIE …
#define R8A7779_CLK_VIN3 …
#define R8A7779_CLK_SDHI3 …
#define R8A7779_CLK_SDHI2 …
#define R8A7779_CLK_SDHI1 …
#define R8A7779_CLK_SDHI0 …
#define R8A7779_CLK_MMC1 …
#define R8A7779_CLK_MMC0 …
#endif