linux/include/dt-bindings/clock/r8a77970-cpg-mssr.h

/* SPDX-License-Identifier: GPL-2.0+
 *
 * Copyright (C) 2016 Renesas Electronics Corp.
 * Copyright (C) 2017 Cogent Embedded, Inc.
 */
#ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__
#define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__

#include <dt-bindings/clock/renesas-cpg-mssr.h>

/* r8a77970 CPG Core Clocks */
#define R8A77970_CLK_Z2 …
#define R8A77970_CLK_ZR …
#define R8A77970_CLK_ZTR …
#define R8A77970_CLK_ZTRD2 …
#define R8A77970_CLK_ZT …
#define R8A77970_CLK_ZX …
#define R8A77970_CLK_S1D1 …
#define R8A77970_CLK_S1D2 …
#define R8A77970_CLK_S1D4 …
#define R8A77970_CLK_S2D1 …
#define R8A77970_CLK_S2D2 …
#define R8A77970_CLK_S2D4 …
#define R8A77970_CLK_LB …
#define R8A77970_CLK_CL …
#define R8A77970_CLK_ZB3 …
#define R8A77970_CLK_ZB3D2 …
#define R8A77970_CLK_DDR …
#define R8A77970_CLK_CR …
#define R8A77970_CLK_CRD2 …
#define R8A77970_CLK_SD0H …
#define R8A77970_CLK_SD0 …
#define R8A77970_CLK_RPC …
#define R8A77970_CLK_RPCD2 …
#define R8A77970_CLK_MSO …
#define R8A77970_CLK_CANFD …
#define R8A77970_CLK_CSI0 …
#define R8A77970_CLK_FRAY …
#define R8A77970_CLK_CP …
#define R8A77970_CLK_CPEX …
#define R8A77970_CLK_R …
#define R8A77970_CLK_OSC …

#endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */