linux/drivers/clk/renesas/r8a77980-cpg-mssr.c

// SPDX-License-Identifier: GPL-2.0
/*
 * r8a77980 Clock Pulse Generator / Module Standby and Software Reset
 *
 * Copyright (C) 2018 Renesas Electronics Corp.
 * Copyright (C) 2018 Cogent Embedded, Inc.
 *
 * Based on r8a7795-cpg-mssr.c
 *
 * Copyright (C) 2015 Glider bvba
 */

#include <linux/device.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/soc/renesas/rcar-rst.h>
#include <linux/sys_soc.h>

#include <dt-bindings/clock/r8a77980-cpg-mssr.h>

#include "renesas-cpg-mssr.h"
#include "rcar-gen3-cpg.h"

enum clk_ids { … };

static const struct cpg_core_clk r8a77980_core_clks[] __initconst = …;

static const struct mssr_mod_clk r8a77980_mod_clks[] __initconst = …;

static const unsigned int r8a77980_crit_mod_clks[] __initconst = …;

/*
 * CPG Clock Data
 */

/*
 *   MD		EXTAL		PLL2	PLL1	PLL3	OSC
 * 14 13	(MHz)
 * --------------------------------------------------------
 * 0  0		16.66 x 1	x240	x192	x192	/16
 * 0  1		20    x 1	x200	x160	x160	/19
 * 1  0		27    x 1	x148	x118	x118	/26
 * 1  1		33.33 / 2	x240	x192	x192	/32
 */
#define CPG_PLL_CONFIG_INDEX(md) …

static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[4] __initconst = …;

static int __init r8a77980_cpg_mssr_init(struct device *dev)
{ … }

const struct cpg_mssr_info r8a77980_cpg_mssr_info __initconst = …;