// SPDX-License-Identifier: GPL-2.0 /* * r8a7796 (R-Car M3-W/W+) Clock Pulse Generator / Module Standby and Software * Reset * * Copyright (C) 2016-2019 Glider bvba * Copyright (C) 2018-2019 Renesas Electronics Corp. * * Based on r8a7795-cpg-mssr.c * * Copyright (C) 2015 Glider bvba * Copyright (C) 2015 Renesas Electronics Corp. */ #include <linux/device.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/of.h> #include <linux/soc/renesas/rcar-rst.h> #include <dt-bindings/clock/r8a7796-cpg-mssr.h> #include "renesas-cpg-mssr.h" #include "rcar-gen3-cpg.h" enum clk_ids { … }; static const struct cpg_core_clk r8a7796_core_clks[] __initconst = …; static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = …; static const unsigned int r8a7796_crit_mod_clks[] __initconst = …; /* * CPG Clock Data */ /* * MD EXTAL PLL0 PLL1 PLL2 PLL3 PLL4 OSC * 14 13 19 17 (MHz) *------------------------------------------------------------------------- * 0 0 0 0 16.66 x 1 x180 x192 x144 x192 x144 /16 * 0 0 0 1 16.66 x 1 x180 x192 x144 x128 x144 /16 * 0 0 1 0 Prohibited setting * 0 0 1 1 16.66 x 1 x180 x192 x144 x192 x144 /16 * 0 1 0 0 20 x 1 x150 x160 x120 x160 x120 /19 * 0 1 0 1 20 x 1 x150 x160 x120 x106 x120 /19 * 0 1 1 0 Prohibited setting * 0 1 1 1 20 x 1 x150 x160 x120 x160 x120 /19 * 1 0 0 0 25 x 1 x120 x128 x96 x128 x96 /24 * 1 0 0 1 25 x 1 x120 x128 x96 x84 x96 /24 * 1 0 1 0 Prohibited setting * 1 0 1 1 25 x 1 x120 x128 x96 x128 x96 /24 * 1 1 0 0 33.33 / 2 x180 x192 x144 x192 x144 /32 * 1 1 0 1 33.33 / 2 x180 x192 x144 x128 x144 /32 * 1 1 1 0 Prohibited setting * 1 1 1 1 33.33 / 2 x180 x192 x144 x192 x144 /32 */ #define CPG_PLL_CONFIG_INDEX(md) … static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = …; /* * Fixups for R-Car M3-W+ */ static const unsigned int r8a77961_mod_nullify[] __initconst = …; static int __init r8a7796_cpg_mssr_init(struct device *dev) { … } const struct cpg_mssr_info r8a7796_cpg_mssr_info __initconst = …;