linux/sound/soc/codecs/lpass-va-macro.c

// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_clk.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/tlv.h>

#include "lpass-macro-common.h"

/* VA macro registers */
#define CDC_VA_CLK_RST_CTRL_MCLK_CONTROL
#define CDC_VA_MCLK_CONTROL_EN
#define CDC_VA_CLK_RST_CTRL_FS_CNT_CONTROL
#define CDC_VA_FS_CONTROL_EN
#define CDC_VA_FS_COUNTER_CLR
#define CDC_VA_CLK_RST_CTRL_SWR_CONTROL
#define CDC_VA_SWR_RESET_MASK
#define CDC_VA_SWR_RESET_ENABLE
#define CDC_VA_SWR_CLK_EN_MASK
#define CDC_VA_SWR_CLK_ENABLE
#define CDC_VA_TOP_CSR_TOP_CFG0
#define CDC_VA_FS_BROADCAST_EN
#define CDC_VA_TOP_CSR_DMIC0_CTL
#define CDC_VA_TOP_CSR_DMIC1_CTL
#define CDC_VA_TOP_CSR_DMIC2_CTL
#define CDC_VA_TOP_CSR_DMIC3_CTL
#define CDC_VA_DMIC_EN_MASK
#define CDC_VA_DMIC_ENABLE
#define CDC_VA_DMIC_CLK_SEL_MASK
#define CDC_VA_DMIC_CLK_SEL_SHFT
#define CDC_VA_DMIC_CLK_SEL_DIV0
#define CDC_VA_DMIC_CLK_SEL_DIV1
#define CDC_VA_DMIC_CLK_SEL_DIV2
#define CDC_VA_DMIC_CLK_SEL_DIV3
#define CDC_VA_DMIC_CLK_SEL_DIV4
#define CDC_VA_DMIC_CLK_SEL_DIV5
#define CDC_VA_TOP_CSR_DMIC_CFG
#define CDC_VA_RESET_ALL_DMICS_MASK
#define CDC_VA_RESET_ALL_DMICS_RESET
#define CDC_VA_RESET_ALL_DMICS_DISABLE
#define CDC_VA_DMIC3_FREQ_CHANGE_MASK
#define CDC_VA_DMIC3_FREQ_CHANGE_EN
#define CDC_VA_DMIC2_FREQ_CHANGE_MASK
#define CDC_VA_DMIC2_FREQ_CHANGE_EN
#define CDC_VA_DMIC1_FREQ_CHANGE_MASK
#define CDC_VA_DMIC1_FREQ_CHANGE_EN
#define CDC_VA_DMIC0_FREQ_CHANGE_MASK
#define CDC_VA_DMIC0_FREQ_CHANGE_EN
#define CDC_VA_DMIC_FREQ_CHANGE_DISABLE
#define CDC_VA_TOP_CSR_DEBUG_BUS
#define CDC_VA_TOP_CSR_DEBUG_EN
#define CDC_VA_TOP_CSR_TX_I2S_CTL
#define CDC_VA_TOP_CSR_I2S_CLK
#define CDC_VA_TOP_CSR_I2S_RESET
#define CDC_VA_TOP_CSR_CORE_ID_0
#define CDC_VA_TOP_CSR_CORE_ID_1
#define CDC_VA_TOP_CSR_CORE_ID_2
#define CDC_VA_TOP_CSR_CORE_ID_3
#define CDC_VA_TOP_CSR_SWR_MIC_CTL0
#define CDC_VA_TOP_CSR_SWR_MIC_CTL1
#define CDC_VA_TOP_CSR_SWR_MIC_CTL2
#define CDC_VA_SWR_MIC_CLK_SEL_0_1_MASK
#define CDC_VA_SWR_MIC_CLK_SEL_0_1_DIV1
#define CDC_VA_TOP_CSR_SWR_CTRL
#define CDC_VA_INP_MUX_ADC_MUX0_CFG0
#define CDC_VA_INP_MUX_ADC_MUX0_CFG1
#define CDC_VA_INP_MUX_ADC_MUX1_CFG0
#define CDC_VA_INP_MUX_ADC_MUX1_CFG1
#define CDC_VA_INP_MUX_ADC_MUX2_CFG0
#define CDC_VA_INP_MUX_ADC_MUX2_CFG1
#define CDC_VA_INP_MUX_ADC_MUX3_CFG0
#define CDC_VA_INP_MUX_ADC_MUX3_CFG1
#define CDC_VA_TX0_TX_PATH_CTL
#define CDC_VA_TX_PATH_CLK_EN_MASK
#define CDC_VA_TX_PATH_CLK_EN
#define CDC_VA_TX_PATH_CLK_DISABLE
#define CDC_VA_TX_PATH_PGA_MUTE_EN_MASK
#define CDC_VA_TX_PATH_PGA_MUTE_EN
#define CDC_VA_TX_PATH_PGA_MUTE_DISABLE
#define CDC_VA_TX0_TX_PATH_CFG0
#define CDC_VA_ADC_MODE_MASK
#define CDC_VA_ADC_MODE_SHIFT
#define TX_HPF_CUT_OFF_FREQ_MASK
#define CF_MIN_3DB_4HZ
#define CF_MIN_3DB_75HZ
#define CF_MIN_3DB_150HZ
#define CDC_VA_TX0_TX_PATH_CFG1
#define CDC_VA_TX0_TX_VOL_CTL
#define CDC_VA_TX0_TX_PATH_SEC0
#define CDC_VA_TX0_TX_PATH_SEC1
#define CDC_VA_TX0_TX_PATH_SEC2
#define CDC_VA_TX_HPF_CUTOFF_FREQ_CHANGE_MASK
#define CDC_VA_TX_HPF_CUTOFF_FREQ_CHANGE_REQ
#define CDC_VA_TX_HPF_ZERO_GATE_MASK
#define CDC_VA_TX_HPF_ZERO_NO_GATE
#define CDC_VA_TX_HPF_ZERO_GATE
#define CDC_VA_TX0_TX_PATH_SEC3
#define CDC_VA_TX0_TX_PATH_SEC4
#define CDC_VA_TX0_TX_PATH_SEC5
#define CDC_VA_TX0_TX_PATH_SEC6
#define CDC_VA_TX0_TX_PATH_SEC7
#define CDC_VA_TX1_TX_PATH_CTL
#define CDC_VA_TX1_TX_PATH_CFG0
#define CDC_VA_TX1_TX_PATH_CFG1
#define CDC_VA_TX1_TX_VOL_CTL
#define CDC_VA_TX1_TX_PATH_SEC0
#define CDC_VA_TX1_TX_PATH_SEC1
#define CDC_VA_TX1_TX_PATH_SEC2
#define CDC_VA_TX1_TX_PATH_SEC3
#define CDC_VA_TX1_TX_PATH_SEC4
#define CDC_VA_TX1_TX_PATH_SEC5
#define CDC_VA_TX1_TX_PATH_SEC6
#define CDC_VA_TX2_TX_PATH_CTL
#define CDC_VA_TX2_TX_PATH_CFG0
#define CDC_VA_TX2_TX_PATH_CFG1
#define CDC_VA_TX2_TX_VOL_CTL
#define CDC_VA_TX2_TX_PATH_SEC0
#define CDC_VA_TX2_TX_PATH_SEC1
#define CDC_VA_TX2_TX_PATH_SEC2
#define CDC_VA_TX2_TX_PATH_SEC3
#define CDC_VA_TX2_TX_PATH_SEC4
#define CDC_VA_TX2_TX_PATH_SEC5
#define CDC_VA_TX2_TX_PATH_SEC6
#define CDC_VA_TX3_TX_PATH_CTL
#define CDC_VA_TX3_TX_PATH_CFG0
#define CDC_VA_TX_PATH_ADC_DMIC_SEL_MASK
#define CDC_VA_TX_PATH_ADC_DMIC_SEL_DMIC
#define CDC_VA_TX_PATH_ADC_DMIC_SEL_ADC
#define CDC_VA_TX3_TX_PATH_CFG1
#define CDC_VA_TX3_TX_VOL_CTL
#define CDC_VA_TX3_TX_PATH_SEC0
#define CDC_VA_TX3_TX_PATH_SEC1
#define CDC_VA_TX3_TX_PATH_SEC2
#define CDC_VA_TX3_TX_PATH_SEC3
#define CDC_VA_TX3_TX_PATH_SEC4
#define CDC_VA_TX3_TX_PATH_SEC5
#define CDC_VA_TX3_TX_PATH_SEC6

#define VA_MAX_OFFSET

#define VA_MACRO_NUM_DECIMATORS
#define VA_MACRO_RATES
#define VA_MACRO_FORMATS

#define VA_MACRO_MCLK_FREQ
#define VA_MACRO_TX_PATH_OFFSET
#define VA_MACRO_SWR_MIC_MUX_SEL_MASK
#define VA_MACRO_ADC_MUX_CFG_OFFSET

static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);

enum {};

enum {};

enum {};

#define VA_NUM_CLKS_MAX

struct va_macro {};

#define to_va_macro(_hw)

struct va_macro_data {};

static const struct va_macro_data sm8250_va_data =;

static const struct va_macro_data sm8450_va_data =;

static const struct va_macro_data sm8550_va_data =;

static bool va_is_volatile_register(struct device *dev, unsigned int reg)
{}

static const struct reg_default va_defaults[] =;

static bool va_is_rw_register(struct device *dev, unsigned int reg)
{}

static bool va_is_readable_register(struct device *dev, unsigned int reg)
{}

static const struct regmap_config va_regmap_config =;

static int va_clk_rsc_fs_gen_request(struct va_macro *va, bool enable)
{}

static int va_macro_mclk_enable(struct va_macro *va, bool mclk_enable)
{}

static int va_macro_mclk_event(struct snd_soc_dapm_widget *w,
			       struct snd_kcontrol *kcontrol, int event)
{}

static int va_macro_put_dec_enum(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{}

static int va_macro_tx_mixer_get(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{}

static int va_macro_tx_mixer_put(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{}

static int va_dmic_clk_enable(struct snd_soc_component *component,
			      u32 dmic, bool enable)
{}

static int va_macro_enable_dmic(struct snd_soc_dapm_widget *w,
				struct snd_kcontrol *kcontrol, int event)
{}

static int va_macro_enable_dec(struct snd_soc_dapm_widget *w,
			       struct snd_kcontrol *kcontrol, int event)
{}

static int va_macro_dec_mode_get(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{}

static int va_macro_dec_mode_put(struct snd_kcontrol *kcontrol,
				 struct snd_ctl_elem_value *ucontrol)
{}

static int va_macro_hw_params(struct snd_pcm_substream *substream,
			      struct snd_pcm_hw_params *params,
			      struct snd_soc_dai *dai)
{}

static int va_macro_get_channel_map(const struct snd_soc_dai *dai,
				    unsigned int *tx_num, unsigned int *tx_slot,
				    unsigned int *rx_num, unsigned int *rx_slot)
{}

static int va_macro_digital_mute(struct snd_soc_dai *dai, int mute, int stream)
{}

static const struct snd_soc_dai_ops va_macro_dai_ops =;

static struct snd_soc_dai_driver va_macro_dais[] =;

static const char * const adc_mux_text[] =;

static SOC_ENUM_SINGLE_DECL(va_dec0_enum, CDC_VA_INP_MUX_ADC_MUX0_CFG1,
		   0, adc_mux_text);
static SOC_ENUM_SINGLE_DECL(va_dec1_enum, CDC_VA_INP_MUX_ADC_MUX1_CFG1,
		   0, adc_mux_text);
static SOC_ENUM_SINGLE_DECL(va_dec2_enum, CDC_VA_INP_MUX_ADC_MUX2_CFG1,
		   0, adc_mux_text);
static SOC_ENUM_SINGLE_DECL(va_dec3_enum, CDC_VA_INP_MUX_ADC_MUX3_CFG1,
		   0, adc_mux_text);

static const struct snd_kcontrol_new va_dec0_mux =;
static const struct snd_kcontrol_new va_dec1_mux =;
static const struct snd_kcontrol_new va_dec2_mux =;
static const struct snd_kcontrol_new va_dec3_mux =;

static const char * const dmic_mux_text[] =;

static SOC_ENUM_SINGLE_DECL(va_dmic0_enum, CDC_VA_INP_MUX_ADC_MUX0_CFG0,
			4, dmic_mux_text);

static SOC_ENUM_SINGLE_DECL(va_dmic1_enum, CDC_VA_INP_MUX_ADC_MUX1_CFG0,
			4, dmic_mux_text);

static SOC_ENUM_SINGLE_DECL(va_dmic2_enum, CDC_VA_INP_MUX_ADC_MUX2_CFG0,
			4, dmic_mux_text);

static SOC_ENUM_SINGLE_DECL(va_dmic3_enum, CDC_VA_INP_MUX_ADC_MUX3_CFG0,
			4, dmic_mux_text);

static const struct snd_kcontrol_new va_dmic0_mux =;

static const struct snd_kcontrol_new va_dmic1_mux =;

static const struct snd_kcontrol_new va_dmic2_mux =;

static const struct snd_kcontrol_new va_dmic3_mux =;

static const struct snd_kcontrol_new va_aif1_cap_mixer[] =;

static const struct snd_kcontrol_new va_aif2_cap_mixer[] =;

static const struct snd_kcontrol_new va_aif3_cap_mixer[] =;

static const struct snd_soc_dapm_widget va_macro_dapm_widgets[] =;

static const struct snd_soc_dapm_route va_audio_map[] =;

static const char * const dec_mode_mux_text[] =;

static const struct soc_enum dec_mode_mux_enum[] =;

static const struct snd_kcontrol_new va_macro_snd_controls[] =;

static int va_macro_component_probe(struct snd_soc_component *component)
{}

static const struct snd_soc_component_driver va_macro_component_drv =;

static int fsgen_gate_enable(struct clk_hw *hw)
{}

static void fsgen_gate_disable(struct clk_hw *hw)
{}

static int fsgen_gate_is_enabled(struct clk_hw *hw)
{}

static const struct clk_ops fsgen_gate_ops =;

static int va_macro_register_fsgen_output(struct va_macro *va)
{}

static int va_macro_validate_dmic_sample_rate(u32 dmic_sample_rate,
					      struct va_macro *va)
{}

static void va_macro_set_lpass_codec_version(struct va_macro *va)
{}

static int va_macro_probe(struct platform_device *pdev)
{}

static void va_macro_remove(struct platform_device *pdev)
{}

static int __maybe_unused va_macro_runtime_suspend(struct device *dev)
{}

static int __maybe_unused va_macro_runtime_resume(struct device *dev)
{}


static const struct dev_pm_ops va_macro_pm_ops =;

static const struct of_device_id va_macro_dt_match[] =;
MODULE_DEVICE_TABLE(of, va_macro_dt_match);

static struct platform_driver va_macro_driver =;

module_platform_driver();
MODULE_DESCRIPTION();
MODULE_LICENSE();