// SPDX-License-Identifier: GPL-2.0-only // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. #include <linux/module.h> #include <linux/init.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <sound/soc.h> #include <sound/soc-dapm.h> #include <sound/tlv.h> #include <linux/of_clk.h> #include <linux/clk-provider.h> #include "lpass-macro-common.h" #define CDC_TX_CLK_RST_CTRL_MCLK_CONTROL … #define CDC_TX_MCLK_EN_MASK … #define CDC_TX_MCLK_ENABLE … #define CDC_TX_CLK_RST_CTRL_FS_CNT_CONTROL … #define CDC_TX_FS_CNT_EN_MASK … #define CDC_TX_FS_CNT_ENABLE … #define CDC_TX_CLK_RST_CTRL_SWR_CONTROL … #define CDC_TX_SWR_RESET_MASK … #define CDC_TX_SWR_RESET_ENABLE … #define CDC_TX_SWR_CLK_EN_MASK … #define CDC_TX_SWR_CLK_ENABLE … #define CDC_TX_TOP_CSR_TOP_CFG0 … #define CDC_TX_TOP_CSR_ANC_CFG … #define CDC_TX_TOP_CSR_SWR_CTRL … #define CDC_TX_TOP_CSR_FREQ_MCLK … #define CDC_TX_TOP_CSR_DEBUG_BUS … #define CDC_TX_TOP_CSR_DEBUG_EN … #define CDC_TX_TOP_CSR_TX_I2S_CTL … #define CDC_TX_TOP_CSR_I2S_CLK … #define CDC_TX_TOP_CSR_I2S_RESET … #define CDC_TX_TOP_CSR_SWR_DMICn_CTL(n) … #define CDC_TX_TOP_CSR_SWR_DMIC0_CTL … /* Default divider for AMIC and DMIC clock: DIV2 */ #define CDC_TX_SWR_MIC_CLK_DEFAULT … #define CDC_TX_SWR_DMIC_CLK_SEL_MASK … #define CDC_TX_TOP_CSR_SWR_DMIC1_CTL … #define CDC_TX_TOP_CSR_SWR_DMIC2_CTL … #define CDC_TX_TOP_CSR_SWR_DMIC3_CTL … #define CDC_TX_TOP_CSR_SWR_AMIC0_CTL … #define CDC_TX_TOP_CSR_SWR_AMIC1_CTL … #define CDC_TX_INP_MUX_ADC_MUXn_CFG0(n) … #define CDC_TX_MACRO_SWR_MIC_MUX_SEL_MASK … #define CDC_TX_MACRO_DMIC_MUX_SEL_MASK … #define CDC_TX_INP_MUX_ADC_MUX0_CFG0 … #define CDC_TX_INP_MUX_ADC_MUXn_CFG1(n) … #define CDC_TX_INP_MUX_ADC_MUX0_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX1_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX1_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX2_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX2_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX3_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX3_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX4_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX4_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX5_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX5_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX6_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX6_CFG1 … #define CDC_TX_INP_MUX_ADC_MUX7_CFG0 … #define CDC_TX_INP_MUX_ADC_MUX7_CFG1 … #define CDC_TX_ANC0_CLK_RESET_CTL … #define CDC_TX_ANC0_MODE_1_CTL … #define CDC_TX_ANC0_MODE_2_CTL … #define CDC_TX_ANC0_FF_SHIFT … #define CDC_TX_ANC0_FB_SHIFT … #define CDC_TX_ANC0_LPF_FF_A_CTL … #define CDC_TX_ANC0_LPF_FF_B_CTL … #define CDC_TX_ANC0_LPF_FB_CTL … #define CDC_TX_ANC0_SMLPF_CTL … #define CDC_TX_ANC0_DCFLT_SHIFT_CTL … #define CDC_TX_ANC0_IIR_ADAPT_CTL … #define CDC_TX_ANC0_IIR_COEFF_1_CTL … #define CDC_TX_ANC0_IIR_COEFF_2_CTL … #define CDC_TX_ANC0_FF_A_GAIN_CTL … #define CDC_TX_ANC0_FF_B_GAIN_CTL … #define CDC_TX_ANC0_FB_GAIN_CTL … #define CDC_TXn_TX_PATH_CTL(n) … #define CDC_TXn_PCM_RATE_MASK … #define CDC_TXn_PGA_MUTE_MASK … #define CDC_TXn_CLK_EN_MASK … #define CDC_TX0_TX_PATH_CTL … #define CDC_TXn_TX_PATH_CFG0(n) … #define CDC_TX0_TX_PATH_CFG0 … #define CDC_TXn_PH_EN_MASK … #define CDC_TXn_ADC_MODE_MASK … #define CDC_TXn_HPF_CUT_FREQ_MASK … #define CDC_TXn_ADC_DMIC_SEL_MASK … #define CDC_TX0_TX_PATH_CFG1 … #define CDC_TXn_TX_VOL_CTL(n) … #define CDC_TX0_TX_VOL_CTL … #define CDC_TX0_TX_PATH_SEC0 … #define CDC_TX0_TX_PATH_SEC1 … #define CDC_TXn_TX_PATH_SEC2(n) … #define CDC_TXn_HPF_F_CHANGE_MASK … #define CDC_TXn_HPF_ZERO_GATE_MASK … #define CDC_TX0_TX_PATH_SEC2 … #define CDC_TX0_TX_PATH_SEC3 … #define CDC_TX0_TX_PATH_SEC4 … #define CDC_TX0_TX_PATH_SEC5 … #define CDC_TX0_TX_PATH_SEC6 … #define CDC_TX0_TX_PATH_SEC7 … #define CDC_TX0_MBHC_CTL_EN_MASK … #define CDC_TX1_TX_PATH_CTL … #define CDC_TX1_TX_PATH_CFG0 … #define CDC_TX1_TX_PATH_CFG1 … #define CDC_TX1_TX_VOL_CTL … #define CDC_TX1_TX_PATH_SEC0 … #define CDC_TX1_TX_PATH_SEC1 … #define CDC_TX1_TX_PATH_SEC2 … #define CDC_TX1_TX_PATH_SEC3 … #define CDC_TX1_TX_PATH_SEC4 … #define CDC_TX1_TX_PATH_SEC5 … #define CDC_TX1_TX_PATH_SEC6 … #define CDC_TX2_TX_PATH_CTL … #define CDC_TX2_TX_PATH_CFG0 … #define CDC_TX2_TX_PATH_CFG1 … #define CDC_TX2_TX_VOL_CTL … #define CDC_TX2_TX_PATH_SEC0 … #define CDC_TX2_TX_PATH_SEC1 … #define CDC_TX2_TX_PATH_SEC2 … #define CDC_TX2_TX_PATH_SEC3 … #define CDC_TX2_TX_PATH_SEC4 … #define CDC_TX2_TX_PATH_SEC5 … #define CDC_TX2_TX_PATH_SEC6 … #define CDC_TX3_TX_PATH_CTL … #define CDC_TX3_TX_PATH_CFG0 … #define CDC_TX3_TX_PATH_CFG1 … #define CDC_TX3_TX_VOL_CTL … #define CDC_TX3_TX_PATH_SEC0 … #define CDC_TX3_TX_PATH_SEC1 … #define CDC_TX3_TX_PATH_SEC2 … #define CDC_TX3_TX_PATH_SEC3 … #define CDC_TX3_TX_PATH_SEC4 … #define CDC_TX3_TX_PATH_SEC5 … #define CDC_TX3_TX_PATH_SEC6 … #define CDC_TX4_TX_PATH_CTL … #define CDC_TX4_TX_PATH_CFG0 … #define CDC_TX4_TX_PATH_CFG1 … #define CDC_TX4_TX_VOL_CTL … #define CDC_TX4_TX_PATH_SEC0 … #define CDC_TX4_TX_PATH_SEC1 … #define CDC_TX4_TX_PATH_SEC2 … #define CDC_TX4_TX_PATH_SEC3 … #define CDC_TX4_TX_PATH_SEC4 … #define CDC_TX4_TX_PATH_SEC5 … #define CDC_TX4_TX_PATH_SEC6 … #define CDC_TX5_TX_PATH_CTL … #define CDC_TX5_TX_PATH_CFG0 … #define CDC_TX5_TX_PATH_CFG1 … #define CDC_TX5_TX_VOL_CTL … #define CDC_TX5_TX_PATH_SEC0 … #define CDC_TX5_TX_PATH_SEC1 … #define CDC_TX5_TX_PATH_SEC2 … #define CDC_TX5_TX_PATH_SEC3 … #define CDC_TX5_TX_PATH_SEC4 … #define CDC_TX5_TX_PATH_SEC5 … #define CDC_TX5_TX_PATH_SEC6 … #define CDC_TX6_TX_PATH_CTL … #define CDC_TX6_TX_PATH_CFG0 … #define CDC_TX6_TX_PATH_CFG1 … #define CDC_TX6_TX_VOL_CTL … #define CDC_TX6_TX_PATH_SEC0 … #define CDC_TX6_TX_PATH_SEC1 … #define CDC_TX6_TX_PATH_SEC2 … #define CDC_TX6_TX_PATH_SEC3 … #define CDC_TX6_TX_PATH_SEC4 … #define CDC_TX6_TX_PATH_SEC5 … #define CDC_TX6_TX_PATH_SEC6 … #define CDC_TX7_TX_PATH_CTL … #define CDC_TX7_TX_PATH_CFG0 … #define CDC_TX7_TX_PATH_CFG1 … #define CDC_TX7_TX_VOL_CTL … #define CDC_TX7_TX_PATH_SEC0 … #define CDC_TX7_TX_PATH_SEC1 … #define CDC_TX7_TX_PATH_SEC2 … #define CDC_TX7_TX_PATH_SEC3 … #define CDC_TX7_TX_PATH_SEC4 … #define CDC_TX7_TX_PATH_SEC5 … #define CDC_TX7_TX_PATH_SEC6 … #define TX_MAX_OFFSET … #define TX_MACRO_RATES … #define TX_MACRO_FORMATS … #define CF_MIN_3DB_4HZ … #define CF_MIN_3DB_75HZ … #define CF_MIN_3DB_150HZ … #define TX_ADC_MAX … #define TX_ADC_TO_DMIC(n) … #define NUM_DECIMATORS … #define TX_NUM_CLKS_MAX … #define TX_MACRO_DMIC_UNMUTE_DELAY_MS … #define TX_MACRO_AMIC_UNMUTE_DELAY_MS … #define TX_MACRO_DMIC_HPF_DELAY_MS … #define TX_MACRO_AMIC_HPF_DELAY_MS … #define MCLK_FREQ … enum { … }; enum { … }; enum { … }; enum { … }; struct tx_mute_work { … }; struct hpf_work { … }; struct tx_macro_data { … }; struct tx_macro { … }; #define to_tx_macro(_hw) … static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400); static struct reg_default tx_defaults[] = …; static bool tx_is_volatile_register(struct device *dev, unsigned int reg) { … } static bool tx_is_rw_register(struct device *dev, unsigned int reg) { … } static const struct regmap_config tx_regmap_config = …; static int tx_macro_mclk_enable(struct tx_macro *tx, bool mclk_enable) { … } static bool is_amic_enabled(struct snd_soc_component *component, struct tx_macro *tx, u8 decimator) { … } static void tx_macro_tx_hpf_corner_freq_callback(struct work_struct *work) { … } static void tx_macro_mute_update_callback(struct work_struct *work) { … } static int tx_macro_mclk_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { … } static void tx_macro_update_smic_sel_v9(struct snd_soc_component *component, struct snd_soc_dapm_widget *widget, struct tx_macro *tx, u16 mic_sel_reg, unsigned int val) { … } static void tx_macro_update_smic_sel_v9_2(struct snd_soc_component *component, struct snd_soc_dapm_widget *widget, struct tx_macro *tx, u16 mic_sel_reg, unsigned int val) { … } static int tx_macro_put_dec_enum(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_tx_mixer_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_tx_mixer_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { … } static int tx_macro_dec_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_dec_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_get_bcs(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_set_bcs(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int tx_macro_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { … } static int tx_macro_get_channel_map(const struct snd_soc_dai *dai, unsigned int *tx_num, unsigned int *tx_slot, unsigned int *rx_num, unsigned int *rx_slot) { … } static int tx_macro_digital_mute(struct snd_soc_dai *dai, int mute, int stream) { … } static const struct snd_soc_dai_ops tx_macro_dai_ops = …; static struct snd_soc_dai_driver tx_macro_dai[] = …; static const char * const adc_mux_text[] = …; static SOC_ENUM_SINGLE_DECL(tx_dec0_enum, CDC_TX_INP_MUX_ADC_MUX0_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec1_enum, CDC_TX_INP_MUX_ADC_MUX1_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec2_enum, CDC_TX_INP_MUX_ADC_MUX2_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec3_enum, CDC_TX_INP_MUX_ADC_MUX3_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec4_enum, CDC_TX_INP_MUX_ADC_MUX4_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec5_enum, CDC_TX_INP_MUX_ADC_MUX5_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec6_enum, CDC_TX_INP_MUX_ADC_MUX6_CFG1, 0, adc_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dec7_enum, CDC_TX_INP_MUX_ADC_MUX7_CFG1, 0, adc_mux_text); static const struct snd_kcontrol_new tx_dec0_mux = …; static const struct snd_kcontrol_new tx_dec1_mux = …; static const struct snd_kcontrol_new tx_dec2_mux = …; static const struct snd_kcontrol_new tx_dec3_mux = …; static const struct snd_kcontrol_new tx_dec4_mux = …; static const struct snd_kcontrol_new tx_dec5_mux = …; static const struct snd_kcontrol_new tx_dec6_mux = …; static const struct snd_kcontrol_new tx_dec7_mux = …; static const char * const dmic_mux_text[] = …; static SOC_ENUM_SINGLE_DECL(tx_dmic0_enum, CDC_TX_INP_MUX_ADC_MUX0_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic1_enum, CDC_TX_INP_MUX_ADC_MUX1_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic2_enum, CDC_TX_INP_MUX_ADC_MUX2_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic3_enum, CDC_TX_INP_MUX_ADC_MUX3_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic4_enum, CDC_TX_INP_MUX_ADC_MUX4_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic5_enum, CDC_TX_INP_MUX_ADC_MUX5_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic6_enum, CDC_TX_INP_MUX_ADC_MUX6_CFG0, 4, dmic_mux_text); static SOC_ENUM_SINGLE_DECL(tx_dmic7_enum, CDC_TX_INP_MUX_ADC_MUX7_CFG0, 4, dmic_mux_text); static const struct snd_kcontrol_new tx_dmic0_mux = …; static const struct snd_kcontrol_new tx_dmic1_mux = …; static const struct snd_kcontrol_new tx_dmic2_mux = …; static const struct snd_kcontrol_new tx_dmic3_mux = …; static const struct snd_kcontrol_new tx_dmic4_mux = …; static const struct snd_kcontrol_new tx_dmic5_mux = …; static const struct snd_kcontrol_new tx_dmic6_mux = …; static const struct snd_kcontrol_new tx_dmic7_mux = …; static const char * const dec_mode_mux_text[] = …; static const struct soc_enum dec_mode_mux_enum[] = …; static const struct snd_kcontrol_new tx_aif1_cap_mixer[] = …; static const struct snd_kcontrol_new tx_aif2_cap_mixer[] = …; static const struct snd_kcontrol_new tx_aif3_cap_mixer[] = …; static const struct snd_soc_dapm_widget tx_macro_dapm_widgets[] = …; static const struct snd_soc_dapm_route tx_audio_map[] = …; /* Controls and routes specific to LPASS <= v9.0.0 */ static const char * const smic_mux_text_v9[] = …; static SOC_ENUM_SINGLE_DECL(tx_smic0_enum_v9, CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic1_enum_v9, CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic2_enum_v9, CDC_TX_INP_MUX_ADC_MUX2_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic3_enum_v9, CDC_TX_INP_MUX_ADC_MUX3_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic4_enum_v9, CDC_TX_INP_MUX_ADC_MUX4_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic5_enum_v9, CDC_TX_INP_MUX_ADC_MUX5_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic6_enum_v9, CDC_TX_INP_MUX_ADC_MUX6_CFG0, 0, smic_mux_text_v9); static SOC_ENUM_SINGLE_DECL(tx_smic7_enum_v9, CDC_TX_INP_MUX_ADC_MUX7_CFG0, 0, smic_mux_text_v9); static const struct snd_kcontrol_new tx_smic0_mux_v9 = …; static const struct snd_kcontrol_new tx_smic1_mux_v9 = …; static const struct snd_kcontrol_new tx_smic2_mux_v9 = …; static const struct snd_kcontrol_new tx_smic3_mux_v9 = …; static const struct snd_kcontrol_new tx_smic4_mux_v9 = …; static const struct snd_kcontrol_new tx_smic5_mux_v9 = …; static const struct snd_kcontrol_new tx_smic6_mux_v9 = …; static const struct snd_kcontrol_new tx_smic7_mux_v9 = …; static const struct snd_soc_dapm_widget tx_macro_dapm_widgets_v9[] = …; static const struct snd_soc_dapm_route tx_audio_map_v9[] = …; /* Controls and routes specific to LPASS >= v9.2.0 */ static const char * const smic_mux_text_v9_2[] = …; static SOC_ENUM_SINGLE_DECL(tx_smic0_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX0_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic1_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX1_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic2_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX2_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic3_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX3_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic4_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX4_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic5_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX5_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic6_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX6_CFG0, 0, smic_mux_text_v9_2); static SOC_ENUM_SINGLE_DECL(tx_smic7_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX7_CFG0, 0, smic_mux_text_v9_2); static const struct snd_kcontrol_new tx_smic0_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic1_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic2_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic3_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic4_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic5_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic6_mux_v9_2 = …; static const struct snd_kcontrol_new tx_smic7_mux_v9_2 = …; static const struct snd_soc_dapm_widget tx_macro_dapm_widgets_v9_2[] = …; static const struct snd_soc_dapm_route tx_audio_map_v9_2[] = …; static const struct snd_kcontrol_new tx_macro_snd_controls[] = …; static int tx_macro_component_extend(struct snd_soc_component *comp) { … } static int tx_macro_component_probe(struct snd_soc_component *comp) { … } static int swclk_gate_enable(struct clk_hw *hw) { … } static void swclk_gate_disable(struct clk_hw *hw) { … } static int swclk_gate_is_enabled(struct clk_hw *hw) { … } static unsigned long swclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { … } static const struct clk_ops swclk_gate_ops = …; static int tx_macro_register_mclk_output(struct tx_macro *tx) { … } static const struct snd_soc_component_driver tx_macro_component_drv = …; static int tx_macro_probe(struct platform_device *pdev) { … } static void tx_macro_remove(struct platform_device *pdev) { … } static int __maybe_unused tx_macro_runtime_suspend(struct device *dev) { … } static int __maybe_unused tx_macro_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops tx_macro_pm_ops = …; static const struct tx_macro_data lpass_ver_9 = …; static const struct tx_macro_data lpass_ver_9_2 = …; static const struct tx_macro_data lpass_ver_10_sm6115 = …; static const struct tx_macro_data lpass_ver_11 = …; static const struct of_device_id tx_macro_dt_match[] = …; MODULE_DEVICE_TABLE(of, tx_macro_dt_match); static struct platform_driver tx_macro_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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