linux/drivers/clk/renesas/clk-sh73a0.c

// SPDX-License-Identifier: GPL-2.0
/*
 * sh73a0 Core CPG Clocks
 *
 * Copyright (C) 2014  Ulrich Hecht
 */

#include <linux/clk-provider.h>
#include <linux/clk/renesas.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/slab.h>
#include <linux/spinlock.h>

struct sh73a0_cpg { … };

#define CPG_FRQCRA …
#define CPG_FRQCRB …
#define CPG_SD0CKCR …
#define CPG_SD1CKCR …
#define CPG_SD2CKCR …
#define CPG_PLLECR …
#define CPG_PLL0CR …
#define CPG_PLL1CR …
#define CPG_PLL2CR …
#define CPG_PLL3CR …
#define CPG_CKSCR …
#define CPG_DSI0PHYCR …
#define CPG_DSI1PHYCR …

struct div4_clk { … };

static const struct div4_clk div4_clks[] = …;

static const struct clk_div_table div4_div_table[] = …;

static const struct clk_div_table z_div_table[] = …;

static struct clk * __init
sh73a0_cpg_register_clock(struct device_node *np, struct sh73a0_cpg *cpg,
			  void __iomem *base, const char *name)
{ … }

static void __init sh73a0_cpg_clocks_init(struct device_node *np)
{ … }
CLK_OF_DECLARE(sh73a0_cpg_clks, "renesas,sh73a0-cpg-clocks",
	       sh73a0_cpg_clocks_init);