linux/sound/soc/atmel/mchp-spdiftx.c

// SPDX-License-Identifier: GPL-2.0
//
// Driver for Microchip S/PDIF TX Controller
//
// Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
//
// Author: Codrin Ciubotariu <[email protected]>

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/spinlock.h>

#include <sound/asoundef.h>
#include <sound/dmaengine_pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>

/*
 * ---- S/PDIF Transmitter Controller Register map ----
 */
#define SPDIFTX_CR
#define SPDIFTX_MR
#define SPDIFTX_CDR

#define SPDIFTX_IER
#define SPDIFTX_IDR
#define SPDIFTX_IMR
#define SPDIFTX_ISR

#define SPDIFTX_CH1UD(reg)
#define SPDIFTX_CH1S(reg)

#define SPDIFTX_VERSION

/*
 * ---- Control Register (Write-only) ----
 */
#define SPDIFTX_CR_SWRST
#define SPDIFTX_CR_FCLR

/*
 * ---- Mode Register (Read/Write) ----
 */
/* Transmit Enable */
#define SPDIFTX_MR_TXEN_MASK
#define SPDIFTX_MR_TXEN_DISABLE
#define SPDIFTX_MR_TXEN_ENABLE

/* Multichannel Transfer */
#define SPDIFTX_MR_MULTICH_MASK
#define SPDIFTX_MR_MULTICH_MONO
#define SPDIFTX_MR_MULTICH_DUAL

/* Data Word Endian Mode */
#define SPDIFTX_MR_ENDIAN_MASK
#define SPDIFTX_MR_ENDIAN_LITTLE
#define SPDIFTX_MR_ENDIAN_BIG

/* Data Justification */
#define SPDIFTX_MR_JUSTIFY_MASK
#define SPDIFTX_MR_JUSTIFY_LSB
#define SPDIFTX_MR_JUSTIFY_MSB

/* Common Audio Register Transfer Mode */
#define SPDIFTX_MR_CMODE_MASK
#define SPDIFTX_MR_CMODE_INDEX_ACCESS
#define SPDIFTX_MR_CMODE_TOGGLE_ACCESS
#define SPDIFTX_MR_CMODE_INTERLVD_ACCESS

/* Valid Bits per Sample */
#define SPDIFTX_MR_VBPS_MASK

/* Chunk Size */
#define SPDIFTX_MR_CHUNK_MASK

/* Validity Bits for Channels 1 and 2 */
#define SPDIFTX_MR_VALID1
#define SPDIFTX_MR_VALID2

/* Disable Null Frame on underrun */
#define SPDIFTX_MR_DNFR_MASK
#define SPDIFTX_MR_DNFR_INVALID
#define SPDIFTX_MR_DNFR_VALID

/* Bytes per Sample */
#define SPDIFTX_MR_BPS_MASK

/*
 * ---- Interrupt Enable/Disable/Mask/Status Register (Write/Read-only) ----
 */
#define SPDIFTX_IR_TXRDY
#define SPDIFTX_IR_TXEMPTY
#define SPDIFTX_IR_TXFULL
#define SPDIFTX_IR_TXCHUNK
#define SPDIFTX_IR_TXUDR
#define SPDIFTX_IR_TXOVR
#define SPDIFTX_IR_CSRDY
#define SPDIFTX_IR_UDRDY
#define SPDIFTX_IR_TXRDYCH(ch)
#define SPDIFTX_IR_SECE
#define SPDIFTX_IR_TXUDRCH(ch)
#define SPDIFTX_IR_BEND

static bool mchp_spdiftx_readable_reg(struct device *dev, unsigned int reg)
{}

static bool mchp_spdiftx_writeable_reg(struct device *dev, unsigned int reg)
{}

static bool mchp_spdiftx_precious_reg(struct device *dev, unsigned int reg)
{}

static const struct regmap_config mchp_spdiftx_regmap_config =;

#define SPDIFTX_GCLK_RATIO

#define SPDIFTX_CS_BITS
#define SPDIFTX_UD_BITS

struct mchp_spdiftx_mixer_control {};

struct mchp_spdiftx_dev {};

static inline int mchp_spdiftx_is_running(struct mchp_spdiftx_dev *dev)
{}

static void mchp_spdiftx_channel_status_write(struct mchp_spdiftx_dev *dev)
{}

static void mchp_spdiftx_user_data_write(struct mchp_spdiftx_dev *dev)
{}

static irqreturn_t mchp_spdiftx_interrupt(int irq, void *dev_id)
{}

static int mchp_spdiftx_dai_startup(struct snd_pcm_substream *substream,
				    struct snd_soc_dai *dai)
{}

static void mchp_spdiftx_dai_shutdown(struct snd_pcm_substream *substream,
				      struct snd_soc_dai *dai)
{}

static int mchp_spdiftx_trigger(struct snd_pcm_substream *substream, int cmd,
				struct snd_soc_dai *dai)
{}

static int mchp_spdiftx_hw_params(struct snd_pcm_substream *substream,
				  struct snd_pcm_hw_params *params,
				  struct snd_soc_dai *dai)
{}

static int mchp_spdiftx_hw_free(struct snd_pcm_substream *substream,
				struct snd_soc_dai *dai)
{}

#define MCHP_SPDIFTX_RATES

#define MCHP_SPDIFTX_FORMATS

static int mchp_spdiftx_info(struct snd_kcontrol *kcontrol,
			     struct snd_ctl_elem_info *uinfo)
{}

static int mchp_spdiftx_cs_get(struct snd_kcontrol *kcontrol,
			       struct snd_ctl_elem_value *uvalue)
{}

static int mchp_spdiftx_cs_put(struct snd_kcontrol *kcontrol,
			       struct snd_ctl_elem_value *uvalue)
{}

static int mchp_spdiftx_cs_mask(struct snd_kcontrol *kcontrol,
				struct snd_ctl_elem_value *uvalue)
{}

static int mchp_spdiftx_subcode_get(struct snd_kcontrol *kcontrol,
				    struct snd_ctl_elem_value *uvalue)
{}

static int mchp_spdiftx_subcode_put(struct snd_kcontrol *kcontrol,
				    struct snd_ctl_elem_value *uvalue)
{}

static struct snd_kcontrol_new mchp_spdiftx_ctrls[] =;

static int mchp_spdiftx_dai_probe(struct snd_soc_dai *dai)
{}

static const struct snd_soc_dai_ops mchp_spdiftx_dai_ops =;

static struct snd_soc_dai_driver mchp_spdiftx_dai =;

static const struct snd_soc_component_driver mchp_spdiftx_component =;

static const struct of_device_id mchp_spdiftx_dt_ids[] =;
MODULE_DEVICE_TABLE(of, mchp_spdiftx_dt_ids);

static int mchp_spdiftx_runtime_suspend(struct device *dev)
{}

static int mchp_spdiftx_runtime_resume(struct device *dev)
{}

static const struct dev_pm_ops mchp_spdiftx_pm_ops =;

static int mchp_spdiftx_probe(struct platform_device *pdev)
{}

static void mchp_spdiftx_remove(struct platform_device *pdev)
{}

static struct platform_driver mchp_spdiftx_driver =;

module_platform_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();